Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41879465	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

13820054

1

T1

27

T2

17

T3

11297

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	49211787	1			T1	70		T2	20		T3	24251
values[0x0]	3243810	1			T1	33		T2	11		T3	3894
values[0x1]	3243922	1			T1	32		T2	9		T3	3928

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30652124	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

25047395

1

T1

65

T2

18

T3

16641

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	193959	1			T3	114		T20	3		T21	16
valid_sources[0x01]	184702	1			T1	1		T3	124		T20	4
valid_sources[0x02]	188515	1			T3	106		T20	2		T21	46
valid_sources[0x03]	302255	1			T3	115		T20	2		T21	18
valid_sources[0x04]	192640	1			T1	1		T3	125		T20	3
valid_sources[0x05]	280919	1			T3	134		T7	2		T20	1
valid_sources[0x06]	181371	1			T3	123		T6	48		T20	5
valid_sources[0x07]	197260	1			T3	116		T7	103		T20	10
valid_sources[0x08]	217684	1			T3	134		T20	15		T21	2
valid_sources[0x09]	190020	1			T1	3		T3	128		T20	14
valid_sources[0x0a]	194022	1			T3	130		T20	8		T21	3
valid_sources[0x0b]	502759	1			T3	114		T20	2		T21	1
valid_sources[0x0c]	183376	1			T3	119		T20	10		T21	41
valid_sources[0x0d]	190593	1			T3	129		T20	4		T21	37
valid_sources[0x0e]	178882	1			T1	1		T3	118		T20	8
valid_sources[0x0f]	198318	1			T1	2		T3	139		T20	8
valid_sources[0x10]	335419	1			T3	108		T20	1		T21	25
valid_sources[0x11]	185233	1			T3	141		T22	8		T32	6
valid_sources[0x12]	185699	1			T3	121		T20	3		T21	24
valid_sources[0x13]	210624	1			T3	117		T20	4		T22	6
valid_sources[0x14]	204215	1			T1	1		T3	134		T20	7
valid_sources[0x15]	208668	1			T3	107		T20	4		T21	36
valid_sources[0x16]	218339	1			T1	1		T3	131		T20	6
valid_sources[0x17]	188466	1			T3	136		T20	3		T21	35
valid_sources[0x18]	202776	1			T3	110		T20	11		T21	4
valid_sources[0x19]	206611	1			T3	132		T20	4		T21	28
valid_sources[0x1a]	222178	1			T3	134		T20	6		T21	53
valid_sources[0x1b]	249620	1			T3	97		T8	2153		T20	5
valid_sources[0x1c]	191290	1			T1	2		T3	112		T20	4
valid_sources[0x1d]	301131	1			T3	110		T20	4		T21	26
valid_sources[0x1e]	197962	1			T1	1		T3	115		T20	3
valid_sources[0x1f]	183872	1			T3	130		T20	12		T22	1
valid_sources[0x20]	185483	1			T3	92		T20	6		T21	35
valid_sources[0x21]	190244	1			T3	112		T20	7		T21	9
valid_sources[0x22]	187546	1			T1	1		T3	115		T20	4
valid_sources[0x23]	200275	1			T2	5		T3	131		T7	2
valid_sources[0x24]	208588	1			T3	94		T6	235		T20	1
valid_sources[0x25]	195942	1			T3	118		T20	4		T21	25
valid_sources[0x26]	348252	1			T3	153		T20	5		T21	18
valid_sources[0x27]	182987	1			T3	108		T20	9		T21	7
valid_sources[0x28]	196362	1			T3	128		T20	11		T21	17
valid_sources[0x29]	272754	1			T3	120		T20	2		T21	4
valid_sources[0x2a]	198537	1			T3	128		T20	16		T21	5
valid_sources[0x2b]	202163	1			T3	109		T20	7		T21	42
valid_sources[0x2c]	194827	1			T1	1		T3	119		T20	4
valid_sources[0x2d]	459423	1			T3	134		T20	5		T21	26
valid_sources[0x2e]	300182	1			T3	105		T20	4		T21	4
valid_sources[0x2f]	363769	1			T3	129		T7	78		T20	4
valid_sources[0x30]	204164	1			T3	128		T7	225		T20	4
valid_sources[0x31]	182266	1			T3	137		T20	9		T21	32
valid_sources[0x32]	196570	1			T1	2		T3	147		T20	2
valid_sources[0x33]	186137	1			T3	132		T20	4		T21	39
valid_sources[0x34]	185002	1			T3	138		T20	4		T22	5
valid_sources[0x35]	213765	1			T3	137		T20	5		T21	23
valid_sources[0x36]	207530	1			T3	131		T20	5		T21	39
valid_sources[0x37]	446872	1			T1	1		T3	128		T20	3
valid_sources[0x38]	188505	1			T3	110		T8	3992		T20	4
valid_sources[0x39]	185942	1			T1	4		T3	112		T20	1
valid_sources[0x3a]	185187	1			T3	135		T20	7		T21	27
valid_sources[0x3b]	198686	1			T1	2		T3	128		T20	1
valid_sources[0x3c]	218305	1			T1	1		T3	126		T20	6
valid_sources[0x3d]	185356	1			T3	114		T7	2		T20	6
valid_sources[0x3e]	196250	1			T1	3		T3	94		T20	1
valid_sources[0x3f]	185352	1			T3	117		T20	5		T21	20
valid_sources[0x40]	202312	1			T3	117		T7	2		T20	3
valid_sources[0x41]	203494	1			T1	1		T3	108		T6	1
valid_sources[0x42]	202984	1			T3	141		T20	4		T21	19
valid_sources[0x43]	193917	1			T3	123		T20	6		T21	31
valid_sources[0x44]	186391	1			T3	113		T20	12		T21	14
valid_sources[0x45]	205423	1			T3	118		T20	5		T21	63
valid_sources[0x46]	200747	1			T3	123		T20	4		T21	10
valid_sources[0x47]	190322	1			T1	1		T3	117		T20	2
valid_sources[0x48]	184289	1			T3	133		T20	4		T22	4
valid_sources[0x49]	195702	1			T1	3		T3	109		T20	5
valid_sources[0x4a]	185523	1			T3	138		T20	5		T21	1
valid_sources[0x4b]	213634	1			T3	141		T20	2		T21	10
valid_sources[0x4c]	209111	1			T1	2		T3	144		T20	3
valid_sources[0x4d]	211987	1			T3	156		T20	6		T21	26
valid_sources[0x4e]	181855	1			T3	119		T20	3		T21	23
valid_sources[0x4f]	193488	1			T3	130		T21	11		T22	4
valid_sources[0x50]	186835	1			T3	141		T20	2		T22	5
valid_sources[0x51]	194081	1			T3	126		T20	5		T21	66
valid_sources[0x52]	186962	1			T3	130		T20	3		T21	55
valid_sources[0x53]	262952	1			T3	118		T20	9		T21	40
valid_sources[0x54]	245573	1			T3	138		T20	1		T21	26
valid_sources[0x55]	185652	1			T3	147		T21	21		T22	2
valid_sources[0x56]	196463	1			T3	114		T20	7		T21	17
valid_sources[0x57]	188516	1			T3	136		T20	2		T21	21
valid_sources[0x58]	229892	1			T1	1		T3	118		T20	8
valid_sources[0x59]	186243	1			T3	104		T20	6		T22	1
valid_sources[0x5a]	199925	1			T3	98		T20	2		T21	22
valid_sources[0x5b]	198015	1			T3	143		T20	3		T21	37
valid_sources[0x5c]	225340	1			T3	123		T20	9		T21	19
valid_sources[0x5d]	198996	1			T3	135		T21	82		T22	3
valid_sources[0x5e]	191182	1			T3	99		T20	2		T21	17
valid_sources[0x5f]	235209	1			T1	1		T3	116		T20	11
valid_sources[0x60]	188013	1			T1	1		T3	111		T20	2
valid_sources[0x61]	187321	1			T3	112		T20	9		T21	19
valid_sources[0x62]	189238	1			T3	124		T20	3		T22	3
valid_sources[0x63]	193055	1			T1	2		T3	142		T20	2
valid_sources[0x64]	192256	1			T3	120		T20	4		T21	16
valid_sources[0x65]	186397	1			T3	107		T20	4		T21	14
valid_sources[0x66]	186292	1			T3	118		T20	4		T21	32
valid_sources[0x67]	207310	1			T3	138		T20	1		T21	7
valid_sources[0x68]	204828	1			T3	146		T20	1		T21	26
valid_sources[0x69]	186895	1			T3	116		T20	7		T21	17
valid_sources[0x6a]	189796	1			T3	140		T20	4		T21	4
valid_sources[0x6b]	184908	1			T3	97		T20	5		T21	43
valid_sources[0x6c]	194351	1			T3	123		T20	12		T21	31
valid_sources[0x6d]	199998	1			T3	141		T20	3		T21	28
valid_sources[0x6e]	193144	1			T3	129		T20	5		T21	32
valid_sources[0x6f]	181631	1			T3	108		T20	7		T21	20
valid_sources[0x70]	190656	1			T3	129		T20	7		T21	1
valid_sources[0x71]	186879	1			T3	139		T20	2		T21	1
valid_sources[0x72]	198360	1			T3	144		T20	3		T21	69
valid_sources[0x73]	204080	1			T1	3		T3	121		T20	2
valid_sources[0x74]	252892	1			T3	140		T20	1		T21	2
valid_sources[0x75]	1089764	1			T3	127		T20	5		T21	27
valid_sources[0x76]	194130	1			T3	115		T20	4		T21	2
valid_sources[0x77]	239419	1			T3	114		T20	2		T21	40
valid_sources[0x78]	189441	1			T3	124		T7	2		T20	1
valid_sources[0x79]	190611	1			T3	148		T6	184		T20	6
valid_sources[0x7a]	197503	1			T3	116		T20	2		T21	41
valid_sources[0x7b]	331969	1			T3	134		T20	7		T21	4
valid_sources[0x7c]	186419	1			T1	3		T3	136		T20	2
valid_sources[0x7d]	187292	1			T3	126		T20	3		T21	30
valid_sources[0x7e]	195466	1			T3	121		T20	2		T21	6
valid_sources[0x7f]	198492	1			T3	153		T20	3		T21	11
valid_sources[0x80]	197429	1			T1	1		T3	136		T20	12

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

11254864

1

T1

1

T2

11

T3

8164

values[0x0]

all_enables

biggest_size

1639176

1

T1

17

T2

4

T3

1982

values[0x1]

all_enables

biggest_size

926014

1

T1

9

T2

2

T3

1151