Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42914595	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

14735378

1

T1

2066

T2

132891

T3

79229

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	51857212	1			T1	5406		T2	382029		T3	319226
values[0x0]	2896808	1			T1	1043		T2	29289		T3	811
values[0x1]	2895953	1			T1	1018		T2	29086		T3	833

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31265224	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

26384749

1

T1

3523

T2

216501

T3

149587

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	189799	1			T1	17		T2	1592		T3	1272
valid_sources[0x01]	209728	1			T1	43		T2	1970		T3	1309
valid_sources[0x02]	184936	1			T1	23		T2	1828		T3	1250
valid_sources[0x03]	228752	1			T1	49		T2	2005		T3	1354
valid_sources[0x04]	204725	1			T1	5		T2	1592		T3	1190
valid_sources[0x05]	203286	1			T1	29		T2	1491		T3	1174
valid_sources[0x06]	200781	1			T1	35		T2	1722		T3	1272
valid_sources[0x07]	184656	1			T1	52		T2	1631		T3	1245
valid_sources[0x08]	181900	1			T1	28		T2	1500		T3	1294
valid_sources[0x09]	189697	1			T1	34		T2	1978		T3	1205
valid_sources[0x0a]	181114	1			T1	19		T2	1751		T3	1213
valid_sources[0x0b]	206171	1			T1	45		T2	1838		T3	1270
valid_sources[0x0c]	197548	1			T1	29		T2	1491		T3	1218
valid_sources[0x0d]	184764	1			T1	25		T2	1573		T3	1305
valid_sources[0x0e]	213491	1			T1	26		T2	1953		T3	1303
valid_sources[0x0f]	195166	1			T1	25		T2	1846		T3	1322
valid_sources[0x10]	196580	1			T1	38		T2	1889		T3	1104
valid_sources[0x11]	189935	1			T1	56		T2	1727		T3	1189
valid_sources[0x12]	185331	1			T1	42		T2	1712		T3	1267
valid_sources[0x13]	189808	1			T1	29		T2	1610		T3	1271
valid_sources[0x14]	202847	1			T1	33		T2	1823		T3	1213
valid_sources[0x15]	356643	1			T1	30		T2	1710		T3	1169
valid_sources[0x16]	187049	1			T1	25		T2	1615		T3	1300
valid_sources[0x17]	206221	1			T1	13		T2	1865		T3	1254
valid_sources[0x18]	935277	1			T1	14		T2	1586		T3	1194
valid_sources[0x19]	196885	1			T1	13		T2	1559		T3	1300
valid_sources[0x1a]	213722	1			T1	36		T2	1593		T3	1296
valid_sources[0x1b]	231481	1			T1	32		T2	1763		T3	1193
valid_sources[0x1c]	196543	1			T1	7		T2	1775		T3	1299
valid_sources[0x1d]	183919	1			T1	23		T2	1812		T3	1282
valid_sources[0x1e]	180144	1			T1	43		T2	1729		T3	1373
valid_sources[0x1f]	233225	1			T1	34		T2	1732		T3	1212
valid_sources[0x20]	214307	1			T1	21		T2	1733		T3	1253
valid_sources[0x21]	192258	1			T1	26		T2	1696		T3	1227
valid_sources[0x22]	188874	1			T1	19		T2	1763		T3	1261
valid_sources[0x23]	217514	1			T1	29		T2	1530		T3	1264
valid_sources[0x24]	215097	1			T1	29		T2	1875		T3	1279
valid_sources[0x25]	195447	1			T1	24		T2	1461		T3	1252
valid_sources[0x26]	193598	1			T1	28		T2	1678		T3	1294
valid_sources[0x27]	179706	1			T1	13		T2	1823		T3	1225
valid_sources[0x28]	203028	1			T1	21		T2	1715		T3	1271
valid_sources[0x29]	200784	1			T1	23		T2	1582		T3	1232
valid_sources[0x2a]	198007	1			T1	11		T2	1734		T3	1256
valid_sources[0x2b]	701347	1			T1	28		T2	1594		T3	1245
valid_sources[0x2c]	190083	1			T1	35		T2	1809		T3	1320
valid_sources[0x2d]	225712	1			T1	30		T2	1650		T3	1145
valid_sources[0x2e]	221859	1			T1	27		T2	1787		T3	1291
valid_sources[0x2f]	287912	1			T1	21		T2	1495		T3	1259
valid_sources[0x30]	229208	1			T1	15		T2	1735		T3	1209
valid_sources[0x31]	195418	1			T1	32		T2	1765		T3	1165
valid_sources[0x32]	206641	1			T1	28		T2	1655		T3	1273
valid_sources[0x33]	218795	1			T1	16		T2	1750		T3	1271
valid_sources[0x34]	184878	1			T1	35		T2	1962		T3	1287
valid_sources[0x35]	188444	1			T1	40		T2	1840		T3	1235
valid_sources[0x36]	188402	1			T1	41		T2	1613		T3	1304
valid_sources[0x37]	314097	1			T1	18		T2	1861		T3	1226
valid_sources[0x38]	184054	1			T1	56		T2	1746		T3	1268
valid_sources[0x39]	182674	1			T1	32		T2	1719		T3	1308
valid_sources[0x3a]	267267	1			T1	27		T2	1674		T3	1246
valid_sources[0x3b]	207572	1			T1	29		T2	1625		T3	1240
valid_sources[0x3c]	261299	1			T1	23		T2	1503		T3	1312
valid_sources[0x3d]	193470	1			T1	41		T2	1577		T3	1312
valid_sources[0x3e]	182979	1			T1	35		T2	1762		T3	1292
valid_sources[0x3f]	187884	1			T1	33		T2	1542		T3	1249
valid_sources[0x40]	183159	1			T1	40		T2	1896		T3	1270
valid_sources[0x41]	194970	1			T1	22		T2	1873		T3	1228
valid_sources[0x42]	204861	1			T1	25		T2	1801		T3	1224
valid_sources[0x43]	202371	1			T1	15		T2	1482		T3	1307
valid_sources[0x44]	192752	1			T1	42		T2	1773		T3	1374
valid_sources[0x45]	193842	1			T1	24		T2	1664		T3	1242
valid_sources[0x46]	384087	1			T1	13		T2	1810		T3	1274
valid_sources[0x47]	262289	1			T1	22		T2	1791		T3	1238
valid_sources[0x48]	192222	1			T1	26		T2	1631		T3	1246
valid_sources[0x49]	208193	1			T1	19		T2	1902		T3	1282
valid_sources[0x4a]	183325	1			T1	30		T2	1765		T3	1173
valid_sources[0x4b]	201232	1			T1	37		T2	1689		T3	1234
valid_sources[0x4c]	184990	1			T1	18		T2	1821		T3	1297
valid_sources[0x4d]	185439	1			T1	15		T2	2028		T3	1222
valid_sources[0x4e]	209942	1			T1	16		T2	1738		T3	1236
valid_sources[0x4f]	188531	1			T1	30		T2	1651		T3	1256
valid_sources[0x50]	267947	1			T1	23		T2	1559		T3	1229
valid_sources[0x51]	217906	1			T1	16		T2	1528		T3	1228
valid_sources[0x52]	194991	1			T1	30		T2	1815		T3	1227
valid_sources[0x53]	200912	1			T1	45		T2	1790		T3	1282
valid_sources[0x54]	187602	1			T1	20		T2	1571		T3	1278
valid_sources[0x55]	215568	1			T1	18		T2	2124		T3	1211
valid_sources[0x56]	199575	1			T1	27		T2	2060		T3	1277
valid_sources[0x57]	187244	1			T1	26		T2	1407		T3	1315
valid_sources[0x58]	200245	1			T1	28		T2	1643		T3	1218
valid_sources[0x59]	336262	1			T1	26		T2	1583		T3	1261
valid_sources[0x5a]	178402	1			T1	26		T2	1641		T3	1247
valid_sources[0x5b]	192160	1			T1	25		T2	2046		T3	1212
valid_sources[0x5c]	207033	1			T1	44		T2	1757		T3	1237
valid_sources[0x5d]	210166	1			T1	27		T2	1599		T3	1218
valid_sources[0x5e]	183390	1			T1	47		T2	1866		T3	1185
valid_sources[0x5f]	195533	1			T1	35		T2	1506		T3	1310
valid_sources[0x60]	191598	1			T1	33		T2	1814		T3	1179
valid_sources[0x61]	193910	1			T1	29		T2	1696		T3	1254
valid_sources[0x62]	186404	1			T1	39		T2	1553		T3	1279
valid_sources[0x63]	237811	1			T1	59		T2	1740		T3	1250
valid_sources[0x64]	204433	1			T1	32		T2	1806		T3	1215
valid_sources[0x65]	195092	1			T1	26		T2	1487		T3	1283
valid_sources[0x66]	376028	1			T1	30		T2	1676		T3	1246
valid_sources[0x67]	195648	1			T1	25		T2	1715		T3	1234
valid_sources[0x68]	181165	1			T1	25		T2	1862		T3	1111
valid_sources[0x69]	196907	1			T1	12		T2	1742		T3	1242
valid_sources[0x6a]	183390	1			T1	34		T2	1627		T3	1261
valid_sources[0x6b]	654210	1			T1	29		T2	1645		T3	1213
valid_sources[0x6c]	203268	1			T1	13		T2	1598		T3	1231
valid_sources[0x6d]	181347	1			T1	28		T2	1590		T3	1321
valid_sources[0x6e]	261493	1			T1	20		T2	1772		T3	1272
valid_sources[0x6f]	191010	1			T1	31		T2	1740		T3	1287
valid_sources[0x70]	180092	1			T1	48		T2	1808		T3	1187
valid_sources[0x71]	186014	1			T1	38		T2	1882		T3	1300
valid_sources[0x72]	197393	1			T1	24		T2	1865		T3	1221
valid_sources[0x73]	190005	1			T1	39		T2	1683		T3	1280
valid_sources[0x74]	193477	1			T1	23		T2	1629		T3	1275
valid_sources[0x75]	229736	1			T1	9		T2	1379		T3	1332
valid_sources[0x76]	195866	1			T1	43		T2	1656		T3	1231
valid_sources[0x77]	396549	1			T1	39		T2	1748		T3	1186
valid_sources[0x78]	183872	1			T1	27		T2	1729		T3	1315
valid_sources[0x79]	216677	1			T1	41		T2	1697		T3	1338
valid_sources[0x7a]	225794	1			T1	21		T2	1640		T3	1352
valid_sources[0x7b]	178389	1			T1	46		T2	1633		T3	1299
valid_sources[0x7c]	779259	1			T1	27		T2	1555		T3	1285
valid_sources[0x7d]	184623	1			T1	47		T2	1775		T3	1325
valid_sources[0x7e]	183969	1			T1	14		T2	1849		T3	1339
valid_sources[0x7f]	345332	1			T1	24		T2	1666		T3	1260
valid_sources[0x80]	270728	1			T1	24		T2	1562		T3	1218

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

12425023

1

T1

1218

T2

109835

T3

78385

values[0x0]

all_enables

biggest_size

1471521

1

T1

510

T2

14906

T3

475

values[0x1]

all_enables

biggest_size

838834

1

T1

338

T2

8150

T3

369