Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46666341	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

15561078

1

T1

29612

T2

1905

T3

2165

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	55151493	1			T1	68738		T2	10201		T3	4350
values[0x0]	3537038	1			T1	9548		T2	880		T3	1324
values[0x1]	3538888	1			T1	9594		T2	915		T3	1388

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34136487	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

28090932

1

T1

44824

T2

5719

T3

3428

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	216137	1			T1	359		T2	68		T3	39
valid_sources[0x01]	212162	1			T1	351		T2	48		T3	41
valid_sources[0x02]	200722	1			T1	366		T2	77		T3	31
valid_sources[0x03]	211851	1			T1	360		T2	32		T3	18
valid_sources[0x04]	202355	1			T1	314		T2	37		T3	21
valid_sources[0x05]	192969	1			T1	354		T2	42		T3	16
valid_sources[0x06]	193666	1			T1	347		T2	69		T3	28
valid_sources[0x07]	268183	1			T1	298		T2	74		T3	24
valid_sources[0x08]	196295	1			T1	405		T2	30		T3	23
valid_sources[0x09]	214082	1			T1	319		T2	36		T3	23
valid_sources[0x0a]	200552	1			T1	334		T2	44		T3	35
valid_sources[0x0b]	192781	1			T1	331		T2	38		T3	32
valid_sources[0x0c]	199718	1			T1	357		T2	63		T3	24
valid_sources[0x0d]	194579	1			T1	321		T2	48		T3	13
valid_sources[0x0e]	201105	1			T1	363		T2	47		T3	26
valid_sources[0x0f]	311706	1			T1	351		T2	71		T3	29
valid_sources[0x10]	197760	1			T1	324		T2	59		T3	30
valid_sources[0x11]	198630	1			T1	352		T2	54		T3	39
valid_sources[0x12]	193765	1			T1	343		T2	41		T3	24
valid_sources[0x13]	202498	1			T1	362		T2	46		T3	29
valid_sources[0x14]	192913	1			T1	326		T2	63		T3	34
valid_sources[0x15]	200659	1			T1	352		T2	36		T3	18
valid_sources[0x16]	187556	1			T1	334		T2	58		T3	40
valid_sources[0x17]	190482	1			T1	344		T2	45		T3	25
valid_sources[0x18]	201223	1			T1	334		T2	36		T3	21
valid_sources[0x19]	184595	1			T1	321		T2	35		T3	39
valid_sources[0x1a]	217323	1			T1	302		T2	33		T3	38
valid_sources[0x1b]	206224	1			T1	380		T2	39		T3	28
valid_sources[0x1c]	409875	1			T1	352		T2	59		T3	24
valid_sources[0x1d]	203895	1			T1	339		T2	66		T3	18
valid_sources[0x1e]	235368	1			T1	345		T2	35		T3	27
valid_sources[0x1f]	188428	1			T1	336		T2	34		T3	43
valid_sources[0x20]	388068	1			T1	383		T2	42		T3	25
valid_sources[0x21]	336636	1			T1	338		T2	69		T3	33
valid_sources[0x22]	209171	1			T1	368		T2	71		T3	26
valid_sources[0x23]	187852	1			T1	354		T2	30		T3	27
valid_sources[0x24]	371493	1			T1	330		T2	66		T3	28
valid_sources[0x25]	213480	1			T1	335		T2	57		T3	42
valid_sources[0x26]	195861	1			T1	352		T2	66		T3	11
valid_sources[0x27]	208999	1			T1	371		T2	36		T3	23
valid_sources[0x28]	209521	1			T1	316		T2	32		T3	24
valid_sources[0x29]	212489	1			T1	348		T2	53		T3	31
valid_sources[0x2a]	1120017	1			T1	361		T2	72		T3	27
valid_sources[0x2b]	229803	1			T1	382		T2	36		T3	32
valid_sources[0x2c]	215795	1			T1	342		T2	38		T3	18
valid_sources[0x2d]	207764	1			T1	344		T2	44		T3	45
valid_sources[0x2e]	182594	1			T1	354		T2	38		T3	20
valid_sources[0x2f]	195746	1			T1	343		T2	45		T3	34
valid_sources[0x30]	229054	1			T1	324		T2	36		T3	21
valid_sources[0x31]	186911	1			T1	338		T2	52		T3	28
valid_sources[0x32]	220316	1			T1	338		T2	38		T3	24
valid_sources[0x33]	194021	1			T1	315		T2	38		T3	19
valid_sources[0x34]	222624	1			T1	351		T2	51		T3	23
valid_sources[0x35]	221689	1			T1	344		T2	64		T3	27
valid_sources[0x36]	194826	1			T1	329		T2	74		T3	36
valid_sources[0x37]	198689	1			T1	356		T2	37		T3	29
valid_sources[0x38]	214704	1			T1	335		T2	54		T3	22
valid_sources[0x39]	211808	1			T1	344		T2	73		T3	19
valid_sources[0x3a]	211488	1			T1	350		T2	19		T3	22
valid_sources[0x3b]	290562	1			T1	320		T2	44		T3	48
valid_sources[0x3c]	191441	1			T1	349		T2	54		T3	38
valid_sources[0x3d]	192988	1			T1	339		T2	49		T3	18
valid_sources[0x3e]	188160	1			T1	344		T2	63		T3	30
valid_sources[0x3f]	200611	1			T1	321		T2	53		T3	22
valid_sources[0x40]	194573	1			T1	376		T2	26		T3	26
valid_sources[0x41]	207347	1			T1	338		T2	73		T3	20
valid_sources[0x42]	199471	1			T1	361		T2	60		T3	26
valid_sources[0x43]	191125	1			T1	369		T2	38		T3	26
valid_sources[0x44]	278203	1			T1	341		T2	59		T3	29
valid_sources[0x45]	206089	1			T1	347		T2	50		T3	27
valid_sources[0x46]	207387	1			T1	315		T2	43		T3	28
valid_sources[0x47]	214756	1			T1	315		T2	27		T3	24
valid_sources[0x48]	261212	1			T1	363		T2	73		T3	31
valid_sources[0x49]	215266	1			T1	331		T2	43		T3	30
valid_sources[0x4a]	328943	1			T1	332		T2	64		T3	38
valid_sources[0x4b]	200722	1			T1	354		T2	35		T3	23
valid_sources[0x4c]	831091	1			T1	372		T2	34		T3	18
valid_sources[0x4d]	221042	1			T1	350		T2	34		T3	40
valid_sources[0x4e]	199521	1			T1	328		T2	50		T3	35
valid_sources[0x4f]	191888	1			T1	325		T2	53		T3	25
valid_sources[0x50]	196807	1			T1	339		T2	21		T3	32
valid_sources[0x51]	197740	1			T1	345		T2	15		T3	32
valid_sources[0x52]	209253	1			T1	377		T2	36		T3	30
valid_sources[0x53]	188632	1			T1	387		T2	46		T3	29
valid_sources[0x54]	228251	1			T1	377		T2	58		T3	39
valid_sources[0x55]	238901	1			T1	352		T2	85		T3	33
valid_sources[0x56]	191099	1			T1	367		T2	33		T3	27
valid_sources[0x57]	188629	1			T1	332		T2	35		T3	40
valid_sources[0x58]	265409	1			T1	355		T2	42		T3	17
valid_sources[0x59]	227538	1			T1	308		T2	79		T3	23
valid_sources[0x5a]	202681	1			T1	340		T2	26		T3	28
valid_sources[0x5b]	210181	1			T1	358		T2	45		T3	32
valid_sources[0x5c]	237768	1			T1	355		T2	78		T3	29
valid_sources[0x5d]	190775	1			T1	362		T2	19		T3	15
valid_sources[0x5e]	196347	1			T1	330		T2	60		T3	11
valid_sources[0x5f]	191404	1			T1	315		T2	75		T3	38
valid_sources[0x60]	218192	1			T1	304		T2	37		T3	18
valid_sources[0x61]	197613	1			T1	342		T2	36		T3	29
valid_sources[0x62]	202928	1			T1	335		T2	51		T3	26
valid_sources[0x63]	307578	1			T1	325		T2	37		T3	22
valid_sources[0x64]	201891	1			T1	340		T2	24		T3	28
valid_sources[0x65]	190360	1			T1	359		T2	31		T3	45
valid_sources[0x66]	218604	1			T1	333		T2	38		T3	29
valid_sources[0x67]	211104	1			T1	379		T2	18		T3	19
valid_sources[0x68]	213828	1			T1	386		T2	39		T3	22
valid_sources[0x69]	203108	1			T1	352		T2	56		T3	21
valid_sources[0x6a]	208139	1			T1	309		T2	48		T3	17
valid_sources[0x6b]	217099	1			T1	299		T2	76		T3	26
valid_sources[0x6c]	211857	1			T1	345		T2	19		T3	29
valid_sources[0x6d]	192831	1			T1	372		T2	38		T3	25
valid_sources[0x6e]	189364	1			T1	319		T2	50		T3	12
valid_sources[0x6f]	210593	1			T1	364		T2	54		T3	25
valid_sources[0x70]	222666	1			T1	334		T2	62		T3	13
valid_sources[0x71]	200216	1			T1	333		T2	52		T3	31
valid_sources[0x72]	201191	1			T1	387		T2	78		T3	27
valid_sources[0x73]	203190	1			T1	318		T2	37		T3	14
valid_sources[0x74]	288248	1			T1	335		T2	35		T3	33
valid_sources[0x75]	188945	1			T1	333		T2	86		T3	32
valid_sources[0x76]	207583	1			T1	327		T2	46		T3	29
valid_sources[0x77]	225139	1			T1	358		T2	32		T3	24
valid_sources[0x78]	209803	1			T1	343		T2	26		T3	41
valid_sources[0x79]	197491	1			T1	366		T2	66		T3	46
valid_sources[0x7a]	199883	1			T1	319		T2	62		T3	25
valid_sources[0x7b]	341757	1			T1	346		T2	23		T3	41
valid_sources[0x7c]	497291	1			T1	322		T2	48		T3	17
valid_sources[0x7d]	437023	1			T1	312		T2	37		T3	27
valid_sources[0x7e]	189977	1			T1	364		T2	60		T3	31
valid_sources[0x7f]	190371	1			T1	343		T2	47		T3	34
valid_sources[0x80]	1384257	1			T1	320		T2	94		T3	19

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

12758979

1

T1

22067

T2

1203

T3

1387

values[0x0]

all_enables

biggest_size

1790294

1

T1

4823

T2

411

T3

522

values[0x1]

all_enables

biggest_size

1011805

1

T1

2722

T2

291

T3

256