Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_i2c_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 40673601 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 10802702 1 T1 12764 T2 208864 T3 55



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 50572108 1 T1 49231 T2 513082 T3 4383
values[0x0] 451630 1 T1 296 T2 902 T3 68
values[0x1] 452565 1 T1 279 T2 936 T3 81



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29079765 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 22396538 1 T1 23560 T2 283028 T3 1732



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 196534 1 T1 519 T2 2014 T3 19
valid_sources[0x01] 266854 1 T1 4 T2 2076 T3 16
valid_sources[0x02] 209317 1 T1 501 T2 1957 T3 12
valid_sources[0x03] 208439 1 T1 2 T2 1936 T3 19
valid_sources[0x04] 202460 1 T1 11 T2 1993 T3 16
valid_sources[0x05] 190694 1 T1 496 T2 1960 T3 14
valid_sources[0x06] 181894 1 T1 506 T2 1998 T3 17
valid_sources[0x07] 177088 1 T1 3 T2 2092 T3 24
valid_sources[0x08] 186152 1 T1 3 T2 2100 T3 25
valid_sources[0x09] 175011 1 T1 16 T2 2016 T3 14
valid_sources[0x0a] 205004 1 T1 1 T2 1974 T3 17
valid_sources[0x0b] 183568 1 T1 9 T2 2048 T3 19
valid_sources[0x0c] 194607 1 T1 4 T2 1984 T3 15
valid_sources[0x0d] 194095 1 T1 13 T2 1984 T3 33
valid_sources[0x0e] 269589 1 T1 2 T2 2111 T3 18
valid_sources[0x0f] 199007 1 T1 1510 T2 2037 T3 25
valid_sources[0x10] 193534 1 T1 14 T2 2007 T3 20
valid_sources[0x11] 196619 1 T1 3 T2 1920 T3 15
valid_sources[0x12] 216039 1 T1 8 T2 2032 T3 22
valid_sources[0x13] 192506 1 T1 1008 T2 2057 T3 24
valid_sources[0x14] 186638 1 T1 521 T2 1971 T3 18
valid_sources[0x15] 198681 1 T1 2 T2 2046 T3 16
valid_sources[0x16] 275124 1 T1 5 T2 1914 T3 22
valid_sources[0x17] 194453 1 T1 500 T2 1993 T3 11
valid_sources[0x18] 224608 1 T1 3 T2 1951 T3 24
valid_sources[0x19] 185660 1 T1 485 T2 2090 T3 12
valid_sources[0x1a] 367064 1 T1 6 T2 2020 T3 18
valid_sources[0x1b] 188428 1 T1 1 T2 2040 T3 20
valid_sources[0x1c] 202451 1 T1 6 T2 1995 T3 18
valid_sources[0x1d] 191827 1 T1 506 T2 1935 T3 23
valid_sources[0x1e] 220373 1 T2 1943 T3 18 T4 11
valid_sources[0x1f] 178409 1 T1 488 T2 1883 T3 17
valid_sources[0x20] 198356 1 T1 18 T2 1961 T3 16
valid_sources[0x21] 183711 1 T1 503 T2 1879 T3 19
valid_sources[0x22] 187234 1 T1 1005 T2 1982 T3 13
valid_sources[0x23] 196027 1 T1 7 T2 2075 T3 15
valid_sources[0x24] 180146 1 T1 1 T2 1977 T3 21
valid_sources[0x25] 197047 1 T1 505 T2 2029 T3 23
valid_sources[0x26] 275678 1 T1 1494 T2 1995 T3 14
valid_sources[0x27] 181290 1 T1 5 T2 1969 T3 22
valid_sources[0x28] 190029 1 T1 12 T2 1984 T3 16
valid_sources[0x29] 189405 1 T1 15 T2 2042 T3 20
valid_sources[0x2a] 187680 1 T1 2 T2 1983 T3 18
valid_sources[0x2b] 186976 1 T1 509 T2 1953 T3 23
valid_sources[0x2c] 181484 1 T1 14 T2 2054 T3 12
valid_sources[0x2d] 181730 1 T1 9 T2 1990 T3 18
valid_sources[0x2e] 204244 1 T1 11 T2 2091 T3 17
valid_sources[0x2f] 176173 1 T1 9 T2 2034 T3 17
valid_sources[0x30] 202700 1 T1 497 T2 1989 T3 17
valid_sources[0x31] 195953 1 T1 494 T2 2001 T3 13
valid_sources[0x32] 181826 1 T1 1005 T2 1934 T3 12
valid_sources[0x33] 190695 1 T1 4 T2 2055 T3 15
valid_sources[0x34] 190136 1 T1 501 T2 1948 T3 18
valid_sources[0x35] 187079 1 T1 10 T2 1913 T3 13
valid_sources[0x36] 185223 1 T1 2 T2 2007 T3 23
valid_sources[0x37] 182921 1 T1 3 T2 2020 T3 15
valid_sources[0x38] 205339 1 T1 4 T2 2018 T3 14
valid_sources[0x39] 191171 1 T1 4 T2 1968 T3 17
valid_sources[0x3a] 184041 1 T1 3 T2 2010 T3 21
valid_sources[0x3b] 181913 1 T1 505 T2 2021 T3 18
valid_sources[0x3c] 187107 1 T1 10 T2 2060 T3 20
valid_sources[0x3d] 204387 1 T1 1 T2 1945 T3 14
valid_sources[0x3e] 184653 1 T1 7 T2 1963 T3 19
valid_sources[0x3f] 198899 1 T1 3 T2 2106 T3 11
valid_sources[0x40] 185117 1 T1 523 T2 1940 T3 21
valid_sources[0x41] 176851 1 T1 499 T2 2013 T3 22
valid_sources[0x42] 189857 1 T1 15 T2 1994 T3 19
valid_sources[0x43] 218807 1 T1 1 T2 2060 T3 21
valid_sources[0x44] 181309 1 T1 491 T2 2101 T3 14
valid_sources[0x45] 209710 1 T1 1 T2 2016 T3 15
valid_sources[0x46] 195684 1 T1 5 T2 2047 T3 24
valid_sources[0x47] 186068 1 T1 2 T2 1910 T3 13
valid_sources[0x48] 167937 1 T1 3 T2 2017 T3 13
valid_sources[0x49] 188274 1 T1 4 T2 2054 T3 19
valid_sources[0x4a] 189636 1 T1 2 T2 1882 T3 11
valid_sources[0x4b] 230499 1 T1 4 T2 2098 T3 19
valid_sources[0x4c] 184082 1 T2 1912 T3 15 T4 7
valid_sources[0x4d] 201988 1 T1 491 T2 2062 T3 15
valid_sources[0x4e] 195075 1 T1 2 T2 2169 T3 13
valid_sources[0x4f] 178551 1 T1 5 T2 2043 T3 20
valid_sources[0x50] 175100 1 T1 3 T2 2149 T3 25
valid_sources[0x51] 197792 1 T1 2 T2 2056 T3 17
valid_sources[0x52] 172266 1 T1 503 T2 1996 T3 13
valid_sources[0x53] 174928 1 T1 3 T2 2073 T3 15
valid_sources[0x54] 204106 1 T1 1 T2 2021 T3 23
valid_sources[0x55] 182573 1 T1 1 T2 2069 T3 17
valid_sources[0x56] 426667 1 T1 504 T2 2083 T3 18
valid_sources[0x57] 201469 1 T1 5 T2 1966 T3 25
valid_sources[0x58] 188205 1 T1 1 T2 2072 T3 16
valid_sources[0x59] 192839 1 T1 493 T2 1927 T3 23
valid_sources[0x5a] 281985 1 T1 510 T2 1981 T3 31
valid_sources[0x5b] 309464 1 T1 9 T2 1960 T3 19
valid_sources[0x5c] 182145 1 T1 5 T2 1952 T3 12
valid_sources[0x5d] 197632 1 T2 1962 T3 22 T4 19
valid_sources[0x5e] 187189 1 T1 10 T2 2041 T3 17
valid_sources[0x5f] 186457 1 T1 501 T2 1981 T3 22
valid_sources[0x60] 177744 1 T1 996 T2 2077 T3 19
valid_sources[0x61] 173941 1 T1 2 T2 2008 T3 12
valid_sources[0x62] 209116 1 T1 3 T2 2009 T3 17
valid_sources[0x63] 173841 1 T1 5 T2 2018 T3 17
valid_sources[0x64] 223111 1 T1 2 T2 2108 T3 13
valid_sources[0x65] 184161 1 T1 12 T2 2041 T3 22
valid_sources[0x66] 180425 1 T1 499 T2 2055 T3 14
valid_sources[0x67] 217104 1 T2 2172 T3 13 T4 8
valid_sources[0x68] 181060 1 T1 2 T2 1900 T3 15
valid_sources[0x69] 190322 1 T1 10 T2 2010 T3 12
valid_sources[0x6a] 182380 1 T1 497 T2 2083 T3 7
valid_sources[0x6b] 191272 1 T1 507 T2 2018 T3 16
valid_sources[0x6c] 180654 1 T1 1 T2 2011 T3 10
valid_sources[0x6d] 183158 1 T1 1 T2 1977 T3 19
valid_sources[0x6e] 189669 1 T1 494 T2 2042 T3 19
valid_sources[0x6f] 182824 1 T1 9 T2 2088 T3 21
valid_sources[0x70] 206682 1 T1 8 T2 1943 T3 19
valid_sources[0x71] 167508 1 T2 1920 T3 23 T4 12
valid_sources[0x72] 193113 1 T1 11 T2 2085 T3 6
valid_sources[0x73] 195015 1 T1 11 T2 2039 T3 18
valid_sources[0x74] 184136 1 T1 3 T2 1943 T3 24
valid_sources[0x75] 219120 1 T2 1953 T3 13 T4 12
valid_sources[0x76] 225615 1 T1 10 T2 1934 T3 20
valid_sources[0x77] 189500 1 T1 509 T2 2060 T3 13
valid_sources[0x78] 196297 1 T1 4 T2 2004 T3 16
valid_sources[0x79] 247736 1 T1 1 T2 2015 T3 17
valid_sources[0x7a] 188615 1 T1 6 T2 1881 T3 20
valid_sources[0x7b] 251805 1 T1 1009 T2 2063 T3 20
valid_sources[0x7c] 191219 1 T2 2055 T3 19 T4 9
valid_sources[0x7d] 199622 1 T1 500 T2 2044 T3 25
valid_sources[0x7e] 182603 1 T1 19 T2 2088 T3 18
valid_sources[0x7f] 184373 1 T1 2 T2 1953 T3 14
valid_sources[0x80] 182140 1 T1 505 T2 2049 T3 24



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 10404162 1 T1 12409 T2 207750 T3 10
values[0x0] all_enables biggest_size 234020 1 T1 198 T2 584 T3 28
values[0x1] all_enables biggest_size 164520 1 T1 157 T2 530 T3 17

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%