Unified Coverage Report :: Group :: tb.dut.u_i2c_protocol_cov::i2c_protocol_cov_cg

Group : tb.dut.u_i2c_protocol_cov::i2c_protocol_cov_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
16.52	16.52	1	100	1	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_i2c_sva_0.1/i2c_protocol_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
i2c_protocol_cov_cg	16.52	1	100	1	64	64

---

Group Instance : i2c_protocol_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
16.52	1	100	1	64	64

---

Summary for Group Instance i2c_protocol_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	47	38	9	19.15
Crosses	68	58	10	14.71

Variables for Group Instance i2c_protocol_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
RStart_before_read_data_ACK_cp	1	1	0	0.00	100	1	1	0
RStart_during_address_Ack_cp	1	1	0	0.00	100	1	1	0
RStart_during_address_transmission_cp	1	0	1	100.00	100	1	1	0
RStart_during_read_data_cp	1	1	0	0.00	100	1	1	0
RStart_during_rw_bit_cp	1	1	0	0.00	100	1	1	0
RStart_during_write_data_cp	1	1	0	0.00	100	1	1	0
Read_data_ack_before_stop_cp	1	1	0	0.00	100	1	1	0
Rstart_after_Address_Ack_cp	1	1	0	0.00	100	1	1	0
Rstart_after_Address_Nack_cp	1	1	0	0.00	100	1	1	0
Start_followed_by_Rstart_cp	1	0	1	100.00	100	1	1	2
Stop_after_read_data_Nack_cp	1	1	0	0.00	100	1	1	0
Stop_after_read_data_ack_cp	1	1	0	0.00	100	1	1	0
Stop_after_write_data_Nack_cp	1	1	0	0.00	100	1	1	0
Stop_after_write_data_ack_cp	1	1	0	0.00	100	1	1	0
Stop_without_ACK_after_addr_cp	1	1	0	0.00	100	1	1	0
Stop_without_ACK_after_data_cp	1	1	0	0.00	100	1	1	0
Stop_without_ACK_after_read_cp	1	1	0	0.00	100	1	1	0
Stop_without_ACK_after_write_cp	1	1	0	0.00	100	1	1	0
bus_state_cp	17	12	5	29.41	100	1	1	0
ip_mode_cp	2	0	2	100.00	100	1	1	0
num_rd_bytes_cp	5	5	0	0.00	100	1	1	0
num_wr_bytes_cp	5	5	0	0.00	100	1	1	0

Crosses for Group Instance i2c_protocol_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
bus_state_x_ip_mode_cp	34	25	9	26.47	100	1	1	0
num_rd_bytes_x_ip_mode_cp	10	10	0	0.00	100	1	1	0
num_wr_bytes_x_ip_mode_cp	10	10	0	0.00	100	1	1	0
Stop_after_write_data_ack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Stop_after_read_data_ack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Stop_after_write_data_Nack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Stop_after_read_data_Nack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Rstart_after_Address_Ack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Rstart_after_Address_Nack_x_ip_mode_cp	2	2	0	0.00	100	1	1	0
Start_followed_by_Rstart_cp_x_ip_mode_cp	2	1	1	50.00	100	1	1	0

Summary for Variable RStart_before_read_data_ACK_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for RStart_before_read_data_ACK_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Start_before_read_data_ACK_Nack	0	1	1

---

Summary for Variable RStart_during_address_Ack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for RStart_during_address_Ack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Start_during_address_Acknowledge	0	1	1

---

Summary for Variable RStart_during_address_transmission_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for RStart_during_address_transmission_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT
Start_during_address_transmission	1	1			T35	1

---

Summary for Variable RStart_during_read_data_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for RStart_during_read_data_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Start_during_read_data	0	1	1

---

Summary for Variable RStart_during_rw_bit_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for RStart_during_rw_bit_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Start_during_rw_bit	0	1	1

---

Summary for Variable RStart_during_write_data_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for RStart_during_write_data_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Start_during_write_data	0	1	1

---

Summary for Variable Read_data_ack_before_stop_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Read_data_ack_before_stop_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Read_data_ack_before_stop	0	1	1

---

Summary for Variable Rstart_after_Address_Ack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Rstart_after_Address_Ack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Rstart_after_Address_Ack	0	1	1

---

Summary for Variable Rstart_after_Address_Nack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Rstart_after_Address_Nack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Rstart_after_Address_Nack	0	1	1

---

Summary for Variable Start_followed_by_Rstart_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	1	0	1	100.00

Automatically Generated Bins for Start_followed_by_Rstart_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
unused	0	Excluded
[auto[0]]	0	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT
auto[1]	2	1			T66	2

---

Summary for Variable Stop_after_read_data_Nack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_after_read_data_Nack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_after_read_data_Nack	0	1	1

---

Summary for Variable Stop_after_read_data_ack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_after_read_data_ack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_after_read_data_ack	0	1	1

---

Summary for Variable Stop_after_write_data_Nack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_after_write_data_Nack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_after_write_data_Nack	0	1	1

---

Summary for Variable Stop_after_write_data_ack_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_after_write_data_ack_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_after_write_data_ack	0	1	1

---

Summary for Variable Stop_without_ACK_after_addr_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_without_ACK_after_addr_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_without_ACK_after_addr	0	1	1

---

Summary for Variable Stop_without_ACK_after_data_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_without_ACK_after_data_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_without_ACK_after_data	0	1	1

---

Summary for Variable Stop_without_ACK_after_read_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_without_ACK_after_read_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_without_ACK_after_read	0	1	1

---

Summary for Variable Stop_without_ACK_after_write_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for Stop_without_ACK_after_write_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
Stop_without_ACK_after_write	0	1	1

---

Summary for Variable bus_state_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	17	12	5	29.41

User Defined Bins for bus_state_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
write_data_nack	0	1	1
write_data_ack	0	1	1
read_data_nack	0	1	1
read_data_ack	0	1	1
write_data	0	1	1
read_data	0	1	1
write_addr_nack	0	1	1
write_addr_ack	0	1	1
read_addr_nack	0	1	1
read_addr_ack	0	1	1
write	0	1	1
read	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
idle	288	1			T2	5		T4	11		T5	2
stop	10	1			T53	3		T67	2		T66	2
addr	7	1			T35	1		T66	3		T68	3
rstart	2	1			T35	1		T66	1		-	-
start	19	1			T4	1		T35	2		T36	1

---

Summary for Variable ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for ip_mode_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

device

175

1

T2

4

T4

4

T18

5

host

151

1

T2

1

T4

8

T5

2

---

Summary for Variable num_rd_bytes_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	5	0	0.00

User Defined Bins for num_rd_bytes_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
sixtyfour	0	1	1
high	0	1	1
mid	0	1	1
low	0	1	1
one	0	1	1

---

Summary for Variable num_wr_bytes_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	5	0	0.00

User Defined Bins for num_wr_bytes_cp

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
sixtyfour	0	1	1
high	0	1	1
mid	0	1	1
low	0	1	1
one	0	1	1

---

Summary for Cross bus_state_x_ip_mode_cp

Samples crossed: bus_state_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	34	25	9	26.47	25

Automatically Generated Cross Bins for bus_state_x_ip_mode_cp

Element holes

bus_state_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
[write_data_nack , write_data_ack , read_data_nack , read_data_ack , write_data , read_data , write_addr_nack , write_addr_ack , read_addr_nack , read_addr_ack , write , read]	*	--	--	24

Uncovered bins

bus_state_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
[addr]	[host]	0	1	1

Covered bins

bus_state_cp	ip_mode_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
idle	device	144	1			T2	4		T4	3		T18	5
idle	host	144	1			T2	1		T4	8		T5	2
stop	device	6	1			T53	1		T67	2		T69	3
stop	host	4	1			T53	2		T66	2		-	-
addr	device	7	1			T35	1		T66	3		T68	3
rstart	device	1	1			T35	1		-	-		-	-
rstart	host	1	1			T66	1		-	-		-	-
start	device	17	1			T4	1		T35	2		T53	2
start	host	2	1			T36	1		T70	1		-	-

---

Summary for Cross num_rd_bytes_x_ip_mode_cp

Samples crossed: ip_mode_cp num_rd_bytes_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	10	0	0.00	10

Automatically Generated Cross Bins for num_rd_bytes_x_ip_mode_cp

Uncovered bins

ip_mode_cp	num_rd_bytes_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	10

---

Summary for Cross num_wr_bytes_x_ip_mode_cp

Samples crossed: ip_mode_cp num_wr_bytes_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	10	0	0.00	10

Automatically Generated Cross Bins for num_wr_bytes_x_ip_mode_cp

Uncovered bins

ip_mode_cp	num_wr_bytes_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	10

---

Summary for Cross Stop_after_write_data_ack_x_ip_mode_cp

Samples crossed: Stop_after_write_data_ack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Stop_after_write_data_ack_x_ip_mode_cp

Uncovered bins

Stop_after_write_data_ack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Stop_after_read_data_ack_x_ip_mode_cp

Samples crossed: Stop_after_read_data_ack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Stop_after_read_data_ack_x_ip_mode_cp

Uncovered bins

Stop_after_read_data_ack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Stop_after_write_data_Nack_x_ip_mode_cp

Samples crossed: Stop_after_write_data_Nack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Stop_after_write_data_Nack_x_ip_mode_cp

Uncovered bins

Stop_after_write_data_Nack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Stop_after_read_data_Nack_x_ip_mode_cp

Samples crossed: Stop_after_read_data_Nack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Stop_after_read_data_Nack_x_ip_mode_cp

Uncovered bins

Stop_after_read_data_Nack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Rstart_after_Address_Ack_x_ip_mode_cp

Samples crossed: Rstart_after_Address_Ack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Rstart_after_Address_Ack_x_ip_mode_cp

Uncovered bins

Rstart_after_Address_Ack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Rstart_after_Address_Nack_x_ip_mode_cp

Samples crossed: Rstart_after_Address_Nack_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	2	0	0.00	2

Automatically Generated Cross Bins for Rstart_after_Address_Nack_x_ip_mode_cp

Uncovered bins

Rstart_after_Address_Nack_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	2

---

Summary for Cross Start_followed_by_Rstart_cp_x_ip_mode_cp

Samples crossed: Start_followed_by_Rstart_cp ip_mode_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	2	1	1	50.00	1

Automatically Generated Cross Bins for Start_followed_by_Rstart_cp_x_ip_mode_cp

Element holes

Start_followed_by_Rstart_cp	ip_mode_cp	COUNT	AT LEAST	NUMBER	STATUS
*	[device]	0	1	1

Excluded/Illegal bins

Start_followed_by_Rstart_cp	ip_mode_cp	COUNT	STATUS
[auto[0]]	[device , host]	--	Excluded	(2 bins)

Covered bins

Start_followed_by_Rstart_cp	ip_mode_cp	COUNT	AT LEAST	STATUS		TEST	COUNT
auto[1]	host	2	1			T66	2