Unified Coverage Report :: Module :: i2c_target_fsm

Module : i2c_target_fsm

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_target_fsm.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.i2c_core.u_i2c_target_fsm	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.i2c_core.u_i2c_target_fsm

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00			0.00		i2c_core

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : i2c_target_fsm

	Line No.	Total	Covered	Percent
TOTAL		355	0	0.00
ALWAYS	130	8	0	0.00
ALWAYS	144	3	0	0.00
ALWAYS	154	6	0	0.00
ALWAYS	165	5	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	178	1	0	0.00
ALWAYS	182	3	0	0.00
ALWAYS	191	3	0	0.00
ALWAYS	200	7	0	0.00
CONT_ASSIGN	212	1	0	0.00
ALWAYS	216	9	0	0.00
CONT_ASSIGN	231	1	0	0.00
CONT_ASSIGN	233	1	0	0.00
CONT_ASSIGN	235	1	0	0.00
ALWAYS	239	7	0	0.00
ALWAYS	250	5	0	0.00
CONT_ASSIGN	267	1	0	0.00
CONT_ASSIGN	270	1	0	0.00
CONT_ASSIGN	271	1	0	0.00
ALWAYS	302	4	0	0.00
CONT_ASSIGN	319	1	0	0.00
CONT_ASSIGN	323	1	0	0.00
CONT_ASSIGN	327	1	0	0.00
ALWAYS	331	148	0	0.00
CONT_ASSIGN	646	1	0	0.00
CONT_ASSIGN	647	1	0	0.00
CONT_ASSIGN	651	1	0	0.00
CONT_ASSIGN	665	1	0	0.00
CONT_ASSIGN	670	1	0	0.00
ALWAYS	674	119	0	0.00
ALWAYS	1007	3	0	0.00
ALWAYS	1016	3	0	0.00
CONT_ASSIGN	1023	1	0	0.00
CONT_ASSIGN	1024	1	0	0.00
CONT_ASSIGN	1027	1	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_target_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_target_fsm.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
130	0	1
131	0	1
132	0	1
133	0	1
134	0	1
135	0	1
138	0	1
139	0	1
			==> MISSING_ELSE
144	0	1
145	0	1
147	0	1
154	0	1
155	0	1
156	0	1
157	0	1
158	0	1
159	0	1
			==> MISSING_ELSE
165	0	1
166	0	1
167	0	1
169	0	1
171	0	1
175	0	1
176	0	1
177	0	1
178	0	1
182	0	1
183	0	1
185	0	1
191	0	1
192	0	1
194	0	1
200	0	1
201	0	1
202	0	1
203	0	1
205	0	1
206	0	1
207	0	1
212	0	1
216	0	1
217	0	1
218	0	1
219	0	1
220	0	1
223	0	2
224	0	1
226	0	1
231	0	1
233	0	1
235	0	1
239	0	1
240	0	1
241	0	1
242	0	1
243	0	1
244	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
250	0	1
251	0	1
252	0	1
253	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
267	0	1
270	0	1
271	0	1
302	0	1
303	0	1
304	0	1
305	0	1
			==> MISSING_ELSE
319	0	1
323	0	1
327	0	1
331	0	1
332	0	1
333	0	1
334	0	1
335	0	1
336	0	1
337	0	1
338	0	1
339	0	1
340	0	1
341	0	1
342	0	1
343	0	1
344	0	1
345	0	1
346	0	1
347	0	1
348	0	1
349	0	1
350	0	1
352	0	1
357	0	1
358	0	1
359	0	1
360	0	1
361	0	1
362	0	1
371	0	1
372	0	1
373	0	1
377	0	1
378	0	1
380	0	1
381	0	1
382	0	1
383	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
389	0	1
391	0	1
394	0	1
			==> MISSING_ELSE
399	0	1
400	0	1
401	0	1
405	0	1
406	0	1
407	0	1
411	0	1
412	0	1
413	0	1
416	0	1
417	0	1
421	0	1
423	0	1
424	0	1
			==> MISSING_ELSE
427	0	1
428	0	1
430	0	1
			==> MISSING_ELSE
436	0	1
440	0	1
441	0	1
442	0	1
446	0	1
449	0	1
450	0	1
454	0	1
457	0	1
458	0	1
462	0	1
465	0	1
466	0	1
468	0	1
			==> MISSING_ELSE
473	0	1
474	0	1
475	0	1
479	0	1
483	0	1
484	0	1
487	0	1
			==> MISSING_ELSE
492	0	1
493	0	1
494	0	1
498	0	1
499	0	1
500	0	1
504	0	1
505	0	1
506	0	1
508	0	1
509	0	1
510	0	1
511	0	1
			==> MISSING_ELSE
517	0	1
518	0	1
519	0	1
521	0	1
522	0	1
526	0	1
527	0	1
			==> MISSING_ELSE
533	0	1
534	0	1
535	0	1
536	0	1
541	0	1
542	0	1
543	0	1
545	0	1
546	0	1
550	0	1
551	0	1
552	0	1
553	0	1
554	0	1
555	0	1
557	0	1
			==> MISSING_ELSE
563	0	1
564	0	1
565	0	1
567	0	1
571	0	1
			==> MISSING_ELSE
576	0	1
577	0	1
578	0	1
579	0	1
583	0	1
584	0	1
585	0	1
586	0	1
589	0	1
590	0	1
591	0	1
592	0	1
			==> MISSING_ELSE
598	0	1
599	0	1
600	0	1
601	0	1
623	0	1
624	0	1
625	0	1
630	0	1
631	0	1
632	0	1
634	0	1
636	0	1
637	0	1
638	0	1
639	0	1
640	0	1
641	0	1
642	0	1
			==> MISSING_ELSE
646	0	1
647	0	1
651	0	1
665	0	1
670	0	1
674	0	1
675	0	1
676	0	1
677	0	1
678	0	1
680	0	1
692	0	1
693	0	1
694	0	1
			==> MISSING_ELSE
701	0	1
702	0	1
703	0	1
705	0	1
706	0	1
709	0	1
			==> MISSING_ELSE
715	0	1
717	0	1
718	0	1
719	0	1
721	0	1
723	0	1
730	0	1
731	0	1
734	0	1
738	0	1
			==> MISSING_ELSE
745	0	2
			==> MISSING_ELSE
749	0	1
750	0	1
751	0	1
752	0	1
			==> MISSING_ELSE
757	0	1
763	0	1
769	0	1
770	0	1
776	0	1
777	0	1
779	0	1
782	0	1
			==> MISSING_ELSE
788	0	1
789	0	1
791	0	1
796	0	2
			==> MISSING_ELSE
800	0	1
801	0	1
802	0	1
803	0	1
			==> MISSING_ELSE
808	0	1
809	0	1
810	0	1
812	0	1
813	0	1
814	0	1
			==> MISSING_ELSE
820	0	1
821	0	1
			==> MISSING_ELSE
827	0	1
829	0	1
830	0	1
833	0	1
			==> MISSING_ELSE
841	0	1
845	0	1
846	0	1
847	0	1
848	0	1
			==> MISSING_ELSE
853	0	1
855	0	1
856	0	1
857	0	1
858	0	1
859	0	1
863	0	1
865	0	1
			==> MISSING_ELSE
871	0	2
			==> MISSING_ELSE
875	0	1
876	0	1
877	0	1
878	0	1
			==> MISSING_ELSE
883	0	1
884	0	1
			==> MISSING_ELSE
892	0	1
893	0	1
894	0	1
895	0	1
896	0	1
897	0	1
			==> MISSING_ELSE
903	0	1
904	0	1
			==> MISSING_ELSE
912	0	1
913	0	1
914	0	1
920	0	1
			==> MISSING_ELSE
926	0	1
927	0	1
928	0	1
929	0	1
936	0	1
937	0	1
938	0	1
941	0	1
			==> MISSING_ELSE
946	0	1
947	0	1
			==> MISSING_ELSE
958	0	1
959	0	1
960	0	1
961	0	1
962	0	1
963	0	1
			==> MISSING_ELSE
969	0	1
970	0	1
			==> MISSING_ELSE
986	0	1
995	0	1
996	0	1
997	0	1
998	0	1
999	0	1
1000	0	1
1001	0	1
			==> MISSING_ELSE
1007	0	1
1008	0	1
1010	0	1
1016	0	1
1017	0	1
1019	0	1
1023	0	1
1024	0	1
1027	0	1

---

Cond Coverage for Module : i2c_target_fsm

	Total	Covered	Percent
Conditions	120	0	0.00
Logical	120	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       158
 EXPRESSION (start_detect_i && target_idle_o)
             -------1------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       167
 EXPRESSION (auto_ack_load_i && ack_ctrl_stretching)
             -------1-------    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       175
 EXPRESSION (((!ack_ctrl_mode_i)) || (auto_ack_cnt_q > '0))
             ----------1---------    ----------2----------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       212
 EXPRESSION (bit_idx == 4'd8)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       220
 EXPRESSION (scl_i_q && ((!scl_i)))
             ---1---    -----2----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       223
 EXPRESSION (input_byte_clr || bit_ack)
             -------1------    ---2---

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       231
 EXPRESSION (((input_byte[7:1] & target_mask0_i) == target_address0_i) && (target_mask0_i != '0))
             ----------------------------1----------------------------    -----------2----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       231
 SUB-EXPRESSION ((input_byte[7:1] & target_mask0_i) == target_address0_i)
                ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       231
 SUB-EXPRESSION (target_mask0_i != '0)
                -----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       233
 EXPRESSION (((input_byte[7:1] & target_mask1_i) == target_address1_i) && (target_mask1_i != '0))
             ----------------------------1----------------------------    -----------2----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       233
 SUB-EXPRESSION ((input_byte[7:1] & target_mask1_i) == target_address1_i)
                ----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       233
 SUB-EXPRESSION (target_mask1_i != '0)
                -----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       235
 EXPRESSION (address0_match || address1_match)
             -------1------    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       243
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       252
 EXPRESSION (((!scl_i_q)) && scl_i)
             ------1-----    --2--

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       304
 EXPRESSION (bit_ack && address_match)
             ---1---    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       323
 EXPRESSION (target_enable_i & xfer_for_us_q & rw_bit_q & stop_detect_i & ((!expect_stop)))
             -------1-------   ------2------   ----3---   ------4------   --------5-------

-1-	-2-	-3-	-4-	-5-	Status	Tests
0	1	1	1	1	Not Covered
1	0	1	1	1	Not Covered
1	1	0	1	1	Not Covered
1	1	1	0	1	Not Covered
1	1	1	1	0	Not Covered
1	1	1	1	1	Not Covered

 LINE       327
 EXPRESSION (((!nack_transaction_q)) && nack_transaction_d)
             -----------1-----------    ---------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       416
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       508
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       589
 EXPRESSION (nack_timeout || (sw_nack_i && ((!can_auto_ack))))
             ------1-----    ----------------2---------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       589
 SUB-EXPRESSION (sw_nack_i && ((!can_auto_ack)))
                 ----1----    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       623
 EXPRESSION (target_enable_i && (stop_detect_i || bus_timeout_i))
             -------1-------    ----------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       623
 SUB-EXPRESSION (stop_detect_i || bus_timeout_i)
                 ------1------    ------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       625
 EXPRESSION (bus_timeout_i && rw_bit_q)
             ------1------    ----2---

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       631
 EXPRESSION (nack_transaction_q || bus_timeout_i)
             ---------1--------    ------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       636
 EXPRESSION (target_enable_i && start_detect_i)
             -------1-------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       646
 EXPRESSION (((!acq_fifo_plenty_space)) || ((!can_auto_ack)))
             -------------1------------    --------2--------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       651
 EXPRESSION (nack_timeout_en_i && (stretch_active_cnt >= nack_timeout_i))
             --------1--------    -------------------2------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       665
 EXPRESSION (((!tx_fifo_rvalid_i)) || unhandled_tx_stretch_event_i || (acq_fifo_depth_i > 9'(1'b1)))
             ----------1----------    --------------2-------------    --------------3--------------

-1-	-2-	-3-	Status	Tests
0	0	0	Not Covered
0	0	1	Not Covered
0	1	0	Not Covered
1	0	0	Not Covered

 LINE       718
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       757
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       808
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       856
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       883
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       903
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       920
 EXPRESSION (rw_bit_q ? StretchTx : AcquireByte)
             ----1---

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       946
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       958
 EXPRESSION (nack_timeout || (sw_nack_i && ((!can_auto_ack))))
             ------1-----    ----------------2---------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       958
 SUB-EXPRESSION (sw_nack_i && ((!can_auto_ack)))
                 ----1----    --------2--------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       969
 EXPRESSION (tcount_q == 16'b1)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       986
 EXPRESSION (((!target_idle)) && ((!target_enable_i)))
             --------1-------    ----------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       996
 EXPRESSION (target_enable_i && start_detect_i)
             -------1-------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       998
 EXPRESSION (stop_detect_i || bus_timeout_i)
             ------1------    ------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

---

FSM Coverage for Module : i2c_target_fsm

Summary for FSM :: state_q

	Total	Covered	Percent
States	26	0	0.00	(Not included in score)
Transitions	106	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
AcquireAckHold	876	Not Covered
AcquireAckPulse	871	Not Covered
AcquireAckSetup	865	Not Covered
AcquireAckWait	846	Not Covered
AcquireByte	782	Not Covered
AcquireStart	997	Not Covered
AddrAckHold	750	Not Covered
AddrAckPulse	745	Not Covered
AddrAckSetup	721	Not Covered
AddrAckWait	703	Not Covered
AddrRead	693	Not Covered
Idle	995	Not Covered
StretchAcqFull	863	Not Covered
StretchAcqSetup	961	Not Covered
StretchAddr	776	Not Covered
StretchAddrAck	734	Not Covered
StretchAddrAckSetup	895	Not Covered
StretchTx	789	Not Covered
StretchTxSetup	936	Not Covered
TransmitAck	810	Not Covered
TransmitAckPulse	821	Not Covered
TransmitHold	801	Not Covered
TransmitPulse	796	Not Covered
TransmitSetup	791	Not Covered
TransmitWait	779	Not Covered
WaitForStop	709	Not Covered

transitions	Line No.	Covered	Tests
AcquireAckHold->AcquireByte	884	Not Covered
AcquireAckHold->AcquireStart	997	Not Covered
AcquireAckHold->Idle	995	Not Covered
AcquireAckHold->WaitForStop	1001	Not Covered
AcquireAckPulse->AcquireAckHold	876	Not Covered
AcquireAckPulse->AcquireStart	997	Not Covered
AcquireAckPulse->Idle	995	Not Covered
AcquireAckPulse->WaitForStop	1001	Not Covered
AcquireAckSetup->AcquireAckPulse	871	Not Covered
AcquireAckSetup->AcquireStart	997	Not Covered
AcquireAckSetup->Idle	995	Not Covered
AcquireAckSetup->WaitForStop	1001	Not Covered
AcquireAckWait->AcquireAckSetup	865	Not Covered
AcquireAckWait->AcquireStart	997	Not Covered
AcquireAckWait->Idle	995	Not Covered
AcquireAckWait->StretchAcqFull	863	Not Covered
AcquireAckWait->WaitForStop	855	Not Covered
AcquireByte->AcquireAckWait	846	Not Covered
AcquireByte->AcquireStart	997	Not Covered
AcquireByte->Idle	995	Not Covered
AcquireByte->WaitForStop	1001	Not Covered
AcquireStart->AddrRead	693	Not Covered
AcquireStart->Idle	995	Not Covered
AcquireStart->WaitForStop	1001	Not Covered
AddrAckHold->AcquireByte	782	Not Covered
AddrAckHold->AcquireStart	997	Not Covered
AddrAckHold->Idle	995	Not Covered
AddrAckHold->StretchAddr	776	Not Covered
AddrAckHold->TransmitWait	779	Not Covered
AddrAckHold->WaitForStop	769	Not Covered
AddrAckPulse->AcquireStart	997	Not Covered
AddrAckPulse->AddrAckHold	750	Not Covered
AddrAckPulse->Idle	995	Not Covered
AddrAckPulse->WaitForStop	1001	Not Covered
AddrAckSetup->AcquireStart	997	Not Covered
AddrAckSetup->AddrAckPulse	745	Not Covered
AddrAckSetup->Idle	995	Not Covered
AddrAckSetup->WaitForStop	1001	Not Covered
AddrAckWait->AcquireStart	997	Not Covered
AddrAckWait->AddrAckSetup	721	Not Covered
AddrAckWait->Idle	995	Not Covered
AddrAckWait->StretchAddrAck	734	Not Covered
AddrAckWait->WaitForStop	717	Not Covered
AddrRead->AcquireStart	997	Not Covered
AddrRead->AddrAckWait	703	Not Covered
AddrRead->Idle	995	Not Covered
AddrRead->WaitForStop	709	Not Covered
Idle->AcquireStart	997	Not Covered
Idle->WaitForStop	1001	Not Covered
StretchAcqFull->AcquireStart	997	Not Covered
StretchAcqFull->Idle	995	Not Covered
StretchAcqFull->StretchAcqSetup	961	Not Covered
StretchAcqFull->WaitForStop	959	Not Covered
StretchAcqSetup->AcquireAckSetup	970	Not Covered
StretchAcqSetup->AcquireStart	997	Not Covered
StretchAcqSetup->Idle	995	Not Covered
StretchAcqSetup->WaitForStop	1001	Not Covered
StretchAddr->AcquireByte	920	Not Covered
StretchAddr->AcquireStart	997	Not Covered
StretchAddr->Idle	995	Not Covered
StretchAddr->StretchTx	920	Not Covered
StretchAddr->WaitForStop	913	Not Covered
StretchAddrAck->AcquireStart	997	Not Covered
StretchAddrAck->Idle	995	Not Covered
StretchAddrAck->StretchAddrAckSetup	895	Not Covered
StretchAddrAck->WaitForStop	893	Not Covered
StretchAddrAckSetup->AcquireStart	997	Not Covered
StretchAddrAckSetup->AddrAckSetup	904	Not Covered
StretchAddrAckSetup->Idle	995	Not Covered
StretchAddrAckSetup->WaitForStop	1001	Not Covered
StretchTx->AcquireStart	997	Not Covered
StretchTx->Idle	995	Not Covered
StretchTx->StretchTxSetup	936	Not Covered
StretchTx->WaitForStop	928	Not Covered
StretchTxSetup->AcquireStart	997	Not Covered
StretchTxSetup->Idle	995	Not Covered
StretchTxSetup->TransmitSetup	947	Not Covered
StretchTxSetup->WaitForStop	1001	Not Covered
TransmitAck->AcquireStart	997	Not Covered
TransmitAck->Idle	995	Not Covered
TransmitAck->TransmitAckPulse	821	Not Covered
TransmitAck->WaitForStop	1001	Not Covered
TransmitAckPulse->AcquireStart	997	Not Covered
TransmitAckPulse->Idle	995	Not Covered
TransmitAckPulse->TransmitWait	830	Not Covered
TransmitAckPulse->WaitForStop	833	Not Covered
TransmitHold->AcquireStart	997	Not Covered
TransmitHold->Idle	995	Not Covered
TransmitHold->TransmitAck	810	Not Covered
TransmitHold->TransmitSetup	814	Not Covered
TransmitHold->WaitForStop	1001	Not Covered
TransmitPulse->AcquireStart	997	Not Covered
TransmitPulse->Idle	995	Not Covered
TransmitPulse->TransmitHold	801	Not Covered
TransmitPulse->WaitForStop	1001	Not Covered
TransmitSetup->AcquireStart	997	Not Covered
TransmitSetup->Idle	995	Not Covered
TransmitSetup->TransmitPulse	796	Not Covered
TransmitSetup->WaitForStop	1001	Not Covered
TransmitWait->AcquireStart	997	Not Covered
TransmitWait->Idle	995	Not Covered
TransmitWait->StretchTx	789	Not Covered
TransmitWait->TransmitSetup	791	Not Covered
TransmitWait->WaitForStop	1001	Not Covered
WaitForStop->AcquireStart	997	Not Covered
WaitForStop->Idle	995	Not Covered

---

Branch Coverage for Module : i2c_target_fsm

	Line No.	Total	Covered	Percent
Branches		165	0	0.00
IF	131	6	0	0.00
IF	144	2	0	0.00
IF	154	4	0	0.00
IF	165	3	0	0.00
IF	182	2	0	0.00
IF	191	2	0	0.00
IF	200	2	0	0.00
IF	216	5	0	0.00
IF	239	5	0	0.00
IF	250	4	0	0.00
IF	302	3	0	0.00
CASE	352	44	0	0.00
IF	623	5	0	0.00
CASE	680	69	0	0.00
IF	986	5	0	0.00
IF	1007	2	0	0.00
IF	1016	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_i2c_0.1/rtl/i2c_target_fsm.sv' or '../src/lowrisc_ip_i2c_0.1/rtl/i2c_target_fsm.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	131	if (load_tcount)
-2-:	132	case (tcount_sel)
-3-:	138	if (target_enable_i)

Branches:

-1-	-2-	-3-	Status	Tests
1	tSetupData	-	Not Covered
1	tHoldData	-	Not Covered
1	tNoDelay	-	Not Covered
1	default	-	Not Covered
0	-	1	Not Covered
0	-	0	Not Covered

	LineNo.	Expression
-1-:	144	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	154	if ((!rst_ni))
-2-:	156	if (actively_stretching)
-3-:	158	if ((start_detect_i && target_idle_o))

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	-	Not Covered
0	0	1	Not Covered
0	0	0	Not Covered

	LineNo.	Expression
-1-:	165	if ((!rst_ni))
-2-:	167	if ((auto_ack_load_i && ack_ctrl_stretching))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	182	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	191	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	200	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	216	if ((!rst_ni))
-2-:	218	if (start_detect_i)
-3-:	220	if ((scl_i_q && (!scl_i)))
-4-:	223	if ((input_byte_clr || bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	239	if ((!rst_ni))
-2-:	241	if (input_byte_clr)
-3-:	243	if (((!scl_i_q) && scl_i))
-4-:	244	if ((!bit_ack))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	250	if ((!rst_ni))
-2-:	252	if (((!scl_i_q) && scl_i))
-3-:	253	if (bit_ack)

Branches:

-1-	-2-	-3-	Status	Tests
1	-	-	Not Covered
0	1	1	Not Covered
0	1	0	Not Covered
0	0	-	Not Covered

	LineNo.	Expression
-1-:	302	if ((!rst_ni))
-2-:	304	if ((bit_ack && address_match))

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	352	case (state_q)
-2-:	380	if (bit_ack)
-3-:	381	if (address_match)
-4-:	391	if (scl_i)
-5-:	416	if ((tcount_q == 16'b1))
-6-:	417	if (nack_transaction_q)
-7-:	421	if ((!stretch_addr))
-8-:	427	if (restart_det_q)
-9-:	466	if ((!scl_i))
-10-:	484	if (scl_i)
-11-:	508	if ((tcount_q == 16'b1))
-12-:	521	if (nack_timeout)
-13-:	545	if (nack_timeout)
-14-:	552	if ((!stretch_addr))
-15-:	554	if (restart_det_q)
-16-:	567	if (nack_timeout)
-17-:	589	if ((nack_timeout || (sw_nack_i && (!can_auto_ack))))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	Status	Tests
Idle	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireStart	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	1	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	1	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	1	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	1	-	-	0	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
StretchAddrAck	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
StretchAddrAck	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
StretchAddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	0	1	1	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	0	1	0	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
StretchAcqSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	623	if ((target_enable_i && (stop_detect_i || bus_timeout_i)))
-2-:	631	if ((nack_transaction_q || bus_timeout_i))
-3-:	636	if ((target_enable_i && start_detect_i))
-4-:	639	if (arbitration_lost_i)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	1	-	-	Not Covered
1	0	-	-	Not Covered
0	-	1	-	Not Covered
0	-	0	1	Not Covered
0	-	0	0	Not Covered

	LineNo.	Expression
-1-:	680	case (state_q)
-2-:	692	if ((!scl_i))
-3-:	701	if (bit_ack)
-4-:	702	if (address_match)
-5-:	715	if (scl_i)
-6-:	718	if ((tcount_q == 16'b1))
-7-:	719	if ((!nack_addr_after_timeout_i))
-8-:	723	if (nack_transaction_q)
-9-:	731	if (stretch_addr)
-10-:	745	if (scl_i)
-11-:	749	if ((!scl_i))
-12-:	757	if ((tcount_q == 16'b1))
-13-:	763	if (nack_transaction_q)
-14-:	770	if (stretch_addr)
-15-:	777	if (rw_bit_q)
-16-:	788	if (stretch_tx)
-17-:	796	if (scl_i)
-18-:	800	if ((!scl_i))
-19-:	808	if ((tcount_q == 16'b1))
-20-:	809	if (bit_ack)
-21-:	820	if (scl_i)
-22-:	827	if ((!scl_i))
-23-:	829	if (host_ack)
-24-:	845	if (bit_ack)
-25-:	853	if (scl_i)
-26-:	856	if ((tcount_q == 16'b1))
-27-:	857	if (nack_transaction_q)
-28-:	859	if (stretch_rx)
-29-:	871	if (scl_i)
-30-:	875	if ((!scl_i))
-31-:	883	if ((tcount_q == 16'b1))
-32-:	892	if (nack_timeout)
-33-:	894	if ((!stretch_addr))
-34-:	903	if ((tcount_q == 16'b1))
-35-:	912	if (nack_timeout)
-36-:	914	if ((!stretch_addr))
-37-:	920	(rw_bit_q) ? 
-38-:	927	if (nack_timeout)
-39-:	929	if ((!stretch_tx))
-40-:	946	if ((tcount_q == 16'b1))
-41-:	958	if ((nack_timeout || (sw_nack_i && (!can_auto_ack))))
-42-:	960	if ((~stretch_rx))
-43-:	969	if ((tcount_q == 16'b1))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	-21-	-22-	-23-	-24-	-25-	-26-	-27-	-28-	-29-	-30-	-31-	-32-	-33-	-34-	-35-	-36-	-37-	-38-	-39-	-40-	-41-	-42-	-43-	Status	Tests
Idle	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireStart	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireStart	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrRead	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	0	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	0	1	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	0	1	0	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	0	1	0	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckWait	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckSetup	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckPulse	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	1	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	1	0	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	1	0	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AddrAckHold	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
TransmitAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
WaitForStop	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireByte	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	0	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckWait	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckPulse	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
AcquireAckHold	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddrAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddrAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddrAck	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddrAckSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	1	-	-	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	0	-	-	-	-	-	-	Not Covered
StretchAddr	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	-	-	-	Not Covered
StretchTx	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	Not Covered
StretchTxSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	1	-	Not Covered
StretchAcqFull	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	0	-	Not Covered
StretchAcqSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	Not Covered
StretchAcqSetup	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	986	if (((!target_idle) && (!target_enable_i)))
-2-:	996	if ((target_enable_i && start_detect_i))
-3-:	998	if ((stop_detect_i || bus_timeout_i))
-4-:	1000	if (arbitration_lost_i)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	-	Not Covered
0	0	0	1	Not Covered
0	0	0	0	Not Covered

	LineNo.	Expression
-1-:	1007	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	1016	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered