T1084 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.3165197225 |
|
|
Sep 04 02:44:22 AM UTC 24 |
Sep 04 02:44:25 AM UTC 24 |
147156188 ps |
T1085 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.125536758 |
|
|
Sep 04 02:43:54 AM UTC 24 |
Sep 04 02:44:25 AM UTC 24 |
737240145 ps |
T1086 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.308371593 |
|
|
Sep 04 02:44:19 AM UTC 24 |
Sep 04 02:44:26 AM UTC 24 |
523880622 ps |
T1087 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.3787834068 |
|
|
Sep 04 02:44:24 AM UTC 24 |
Sep 04 02:44:27 AM UTC 24 |
96872926 ps |
T1088 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.2414641471 |
|
|
Sep 04 02:43:29 AM UTC 24 |
Sep 04 02:44:28 AM UTC 24 |
6192170741 ps |
T1089 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.3780159053 |
|
|
Sep 04 02:42:33 AM UTC 24 |
Sep 04 02:44:29 AM UTC 24 |
50554077360 ps |
T1090 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.176052707 |
|
|
Sep 04 02:44:26 AM UTC 24 |
Sep 04 02:44:31 AM UTC 24 |
95238506 ps |
T1091 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.170389879 |
|
|
Sep 04 02:43:55 AM UTC 24 |
Sep 04 02:44:33 AM UTC 24 |
2058779784 ps |
T1092 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3699494111 |
|
|
Sep 04 02:43:22 AM UTC 24 |
Sep 04 02:44:34 AM UTC 24 |
4564470381 ps |
T1093 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.4260680735 |
|
|
Sep 04 02:44:25 AM UTC 24 |
Sep 04 02:44:36 AM UTC 24 |
243248085 ps |
T1094 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.1150447656 |
|
|
Sep 04 02:44:24 AM UTC 24 |
Sep 04 02:44:37 AM UTC 24 |
1215756866 ps |
T1095 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.688058366 |
|
|
Sep 04 02:43:52 AM UTC 24 |
Sep 04 02:44:37 AM UTC 24 |
1864156221 ps |
T1096 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/17.i2c_host_perf.2560293094 |
|
|
Sep 04 02:37:22 AM UTC 24 |
Sep 04 02:44:40 AM UTC 24 |
24934047305 ps |
T1097 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.2091616554 |
|
|
Sep 04 02:44:34 AM UTC 24 |
Sep 04 02:44:40 AM UTC 24 |
669661840 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.558797950 |
|
|
Sep 04 02:44:38 AM UTC 24 |
Sep 04 02:44:41 AM UTC 24 |
260734273 ps |
T1098 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.4223771530 |
|
|
Sep 04 02:44:40 AM UTC 24 |
Sep 04 02:44:43 AM UTC 24 |
198555468 ps |
T1099 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.3196337986 |
|
|
Sep 04 02:44:28 AM UTC 24 |
Sep 04 02:44:47 AM UTC 24 |
1827587868 ps |
T1100 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_perf.2388324553 |
|
|
Sep 04 02:44:40 AM UTC 24 |
Sep 04 02:44:47 AM UTC 24 |
1944643771 ps |
T1101 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.2787986260 |
|
|
Sep 04 02:44:37 AM UTC 24 |
Sep 04 02:44:48 AM UTC 24 |
4416918844 ps |
T1102 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_hrst.1413929410 |
|
|
Sep 04 02:44:45 AM UTC 24 |
Sep 04 02:44:49 AM UTC 24 |
415826738 ps |
T1103 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.2993423150 |
|
|
Sep 04 02:43:57 AM UTC 24 |
Sep 04 02:44:50 AM UTC 24 |
21230513992 ps |
T1104 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.1084707153 |
|
|
Sep 04 02:43:50 AM UTC 24 |
Sep 04 02:44:51 AM UTC 24 |
3776916187 ps |
T1105 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/21.i2c_host_perf.1546857847 |
|
|
Sep 04 02:39:08 AM UTC 24 |
Sep 04 02:44:52 AM UTC 24 |
26368838737 ps |
T1106 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.993660726 |
|
|
Sep 04 02:43:34 AM UTC 24 |
Sep 04 02:44:54 AM UTC 24 |
8518535875 ps |
T1107 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.3990011278 |
|
|
Sep 04 02:42:43 AM UTC 24 |
Sep 04 02:44:54 AM UTC 24 |
11819113328 ps |
T1108 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.2199287418 |
|
|
Sep 04 02:44:25 AM UTC 24 |
Sep 04 02:44:54 AM UTC 24 |
1018305894 ps |
T1109 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.311167287 |
|
|
Sep 04 02:44:22 AM UTC 24 |
Sep 04 02:44:54 AM UTC 24 |
3904562092 ps |
T1110 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.2552943068 |
|
|
Sep 04 02:44:49 AM UTC 24 |
Sep 04 02:44:55 AM UTC 24 |
876216232 ps |
T1111 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.439342986 |
|
|
Sep 04 02:44:50 AM UTC 24 |
Sep 04 02:44:55 AM UTC 24 |
125026388 ps |
T1112 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.1664988819 |
|
|
Sep 04 02:44:31 AM UTC 24 |
Sep 04 02:44:56 AM UTC 24 |
4652708614 ps |
T1113 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_alert_test.1724260028 |
|
|
Sep 04 02:44:54 AM UTC 24 |
Sep 04 02:44:56 AM UTC 24 |
17320867 ps |
T1114 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.2515401120 |
|
|
Sep 04 02:44:52 AM UTC 24 |
Sep 04 02:44:57 AM UTC 24 |
592655947 ps |
T1115 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.1028120973 |
|
|
Sep 04 02:44:51 AM UTC 24 |
Sep 04 02:44:57 AM UTC 24 |
5793823868 ps |
T1116 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.2026609119 |
|
|
Sep 04 02:44:43 AM UTC 24 |
Sep 04 02:44:57 AM UTC 24 |
7246061789 ps |
T1117 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_override.2726823984 |
|
|
Sep 04 02:44:56 AM UTC 24 |
Sep 04 02:44:57 AM UTC 24 |
57507020 ps |
T1118 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.3338706607 |
|
|
Sep 04 02:44:54 AM UTC 24 |
Sep 04 02:44:58 AM UTC 24 |
297854246 ps |
T1119 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.365711207 |
|
|
Sep 04 02:44:53 AM UTC 24 |
Sep 04 02:44:58 AM UTC 24 |
461164518 ps |
T1120 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.1630078111 |
|
|
Sep 04 02:44:56 AM UTC 24 |
Sep 04 02:44:58 AM UTC 24 |
781573014 ps |
T1121 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.3329776034 |
|
|
Sep 04 02:44:48 AM UTC 24 |
Sep 04 02:44:59 AM UTC 24 |
1206792617 ps |
T1122 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.4226248698 |
|
|
Sep 04 02:40:56 AM UTC 24 |
Sep 04 02:45:00 AM UTC 24 |
3470493476 ps |
T1123 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.1822725846 |
|
|
Sep 04 02:44:58 AM UTC 24 |
Sep 04 02:45:01 AM UTC 24 |
1000638174 ps |
T1124 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.583234834 |
|
|
Sep 04 02:44:35 AM UTC 24 |
Sep 04 02:45:02 AM UTC 24 |
13379533374 ps |
T1125 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.1728331195 |
|
|
Sep 04 02:44:57 AM UTC 24 |
Sep 04 02:45:03 AM UTC 24 |
285236171 ps |
T1126 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_host_perf.2703568122 |
|
|
Sep 04 02:43:52 AM UTC 24 |
Sep 04 02:45:05 AM UTC 24 |
4795758320 ps |
T1127 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.1024677103 |
|
|
Sep 04 02:44:57 AM UTC 24 |
Sep 04 02:45:05 AM UTC 24 |
180756405 ps |
T1128 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.3555326229 |
|
|
Sep 04 02:44:58 AM UTC 24 |
Sep 04 02:45:07 AM UTC 24 |
5899332798 ps |
T1129 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.759608286 |
|
|
Sep 04 02:45:06 AM UTC 24 |
Sep 04 02:45:09 AM UTC 24 |
198234640 ps |
T1130 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.936981460 |
|
|
Sep 04 02:40:45 AM UTC 24 |
Sep 04 02:45:10 AM UTC 24 |
60745083451 ps |
T1131 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.2788649086 |
|
|
Sep 04 02:45:07 AM UTC 24 |
Sep 04 02:45:10 AM UTC 24 |
264335866 ps |
T1132 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.1028903411 |
|
|
Sep 04 02:45:02 AM UTC 24 |
Sep 04 02:45:10 AM UTC 24 |
6866988239 ps |
T1133 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.3569627528 |
|
|
Sep 04 02:44:29 AM UTC 24 |
Sep 04 02:45:12 AM UTC 24 |
17144121048 ps |
T1134 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.2498795659 |
|
|
Sep 04 02:45:03 AM UTC 24 |
Sep 04 02:45:14 AM UTC 24 |
14540741308 ps |
T1135 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.2282158314 |
|
|
Sep 04 02:45:04 AM UTC 24 |
Sep 04 02:45:16 AM UTC 24 |
5564029554 ps |
T1136 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.1908924044 |
|
|
Sep 04 02:45:02 AM UTC 24 |
Sep 04 02:45:16 AM UTC 24 |
2452489520 ps |
T1137 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.2178571876 |
|
|
Sep 04 02:45:15 AM UTC 24 |
Sep 04 02:45:17 AM UTC 24 |
222374093 ps |
T1138 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.4095275426 |
|
|
Sep 04 02:45:15 AM UTC 24 |
Sep 04 02:45:18 AM UTC 24 |
2898078966 ps |
T1139 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_perf.3520802654 |
|
|
Sep 04 02:45:10 AM UTC 24 |
Sep 04 02:45:19 AM UTC 24 |
602983544 ps |
T1140 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.120105950 |
|
|
Sep 04 02:45:10 AM UTC 24 |
Sep 04 02:45:19 AM UTC 24 |
2099215555 ps |
T1141 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.127486989 |
|
|
Sep 04 02:45:13 AM UTC 24 |
Sep 04 02:45:20 AM UTC 24 |
351603258 ps |
T1142 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_alert_test.2069780749 |
|
|
Sep 04 02:45:19 AM UTC 24 |
Sep 04 02:45:21 AM UTC 24 |
21890477 ps |
T1143 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.259627989 |
|
|
Sep 04 02:45:59 AM UTC 24 |
Sep 04 02:46:05 AM UTC 24 |
2017992099 ps |
T1144 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.1973438304 |
|
|
Sep 04 02:45:18 AM UTC 24 |
Sep 04 02:45:23 AM UTC 24 |
2358227514 ps |
T1145 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.885322732 |
|
|
Sep 04 02:45:01 AM UTC 24 |
Sep 04 02:45:23 AM UTC 24 |
1004964203 ps |
T1146 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.490791703 |
|
|
Sep 04 02:45:17 AM UTC 24 |
Sep 04 02:45:23 AM UTC 24 |
1046062090 ps |
T1147 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_override.155031123 |
|
|
Sep 04 02:45:22 AM UTC 24 |
Sep 04 02:45:24 AM UTC 24 |
60454149 ps |
T1148 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.966635320 |
|
|
Sep 04 02:43:19 AM UTC 24 |
Sep 04 02:45:25 AM UTC 24 |
4951175518 ps |
T1149 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.1654977148 |
|
|
Sep 04 02:45:19 AM UTC 24 |
Sep 04 02:45:25 AM UTC 24 |
1754532895 ps |
T1150 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.4030609963 |
|
|
Sep 04 02:45:17 AM UTC 24 |
Sep 04 02:45:26 AM UTC 24 |
268807154 ps |
T1151 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.4179582223 |
|
|
Sep 04 02:45:24 AM UTC 24 |
Sep 04 02:45:26 AM UTC 24 |
121339659 ps |
T1152 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.1289019682 |
|
|
Sep 04 02:45:26 AM UTC 24 |
Sep 04 02:45:29 AM UTC 24 |
241218232 ps |
T1153 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.2306429760 |
|
|
Sep 04 02:45:24 AM UTC 24 |
Sep 04 02:45:32 AM UTC 24 |
839411658 ps |
T1154 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.821923097 |
|
|
Sep 04 02:45:24 AM UTC 24 |
Sep 04 02:45:33 AM UTC 24 |
2102228687 ps |
T87 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.2509202243 |
|
|
Sep 04 02:44:59 AM UTC 24 |
Sep 04 02:45:33 AM UTC 24 |
1821321039 ps |
T1155 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.1400140269 |
|
|
Sep 04 02:44:56 AM UTC 24 |
Sep 04 02:45:34 AM UTC 24 |
6478201969 ps |
T1156 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_perf.3886978591 |
|
|
Sep 04 02:44:58 AM UTC 24 |
Sep 04 02:45:37 AM UTC 24 |
2895107574 ps |
T1157 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.2676318080 |
|
|
Sep 04 02:45:27 AM UTC 24 |
Sep 04 02:45:38 AM UTC 24 |
226100432 ps |
T1158 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.1349675032 |
|
|
Sep 04 02:44:22 AM UTC 24 |
Sep 04 02:45:40 AM UTC 24 |
13207829540 ps |
T1159 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.1896725067 |
|
|
Sep 04 02:45:27 AM UTC 24 |
Sep 04 02:45:45 AM UTC 24 |
662699888 ps |
T1160 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.621224828 |
|
|
Sep 04 02:44:56 AM UTC 24 |
Sep 04 02:45:49 AM UTC 24 |
8160870353 ps |
T1161 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.3577032071 |
|
|
Sep 04 02:45:32 AM UTC 24 |
Sep 04 02:45:50 AM UTC 24 |
1854106613 ps |
T1162 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.631455382 |
|
|
Sep 04 02:45:39 AM UTC 24 |
Sep 04 02:45:50 AM UTC 24 |
1075153333 ps |
T1163 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_perf.2485506922 |
|
|
Sep 04 02:45:26 AM UTC 24 |
Sep 04 02:45:50 AM UTC 24 |
5717577397 ps |
T1164 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.249615236 |
|
|
Sep 04 02:45:41 AM UTC 24 |
Sep 04 02:45:52 AM UTC 24 |
5110877307 ps |
T1165 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.4148457144 |
|
|
Sep 04 02:45:50 AM UTC 24 |
Sep 04 02:45:53 AM UTC 24 |
179536448 ps |
T1166 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.2774622460 |
|
|
Sep 04 02:45:50 AM UTC 24 |
Sep 04 02:45:53 AM UTC 24 |
2322083135 ps |
T1167 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.2775557095 |
|
|
Sep 04 02:41:00 AM UTC 24 |
Sep 04 02:45:54 AM UTC 24 |
35822287504 ps |
T1168 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_hrst.2087214063 |
|
|
Sep 04 02:45:53 AM UTC 24 |
Sep 04 02:45:56 AM UTC 24 |
269836196 ps |
T1169 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.895863011 |
|
|
Sep 04 02:45:51 AM UTC 24 |
Sep 04 02:45:57 AM UTC 24 |
897557648 ps |
T1170 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.2168036380 |
|
|
Sep 04 02:45:39 AM UTC 24 |
Sep 04 02:45:58 AM UTC 24 |
21290440195 ps |
T1171 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.634160303 |
|
|
Sep 04 02:45:55 AM UTC 24 |
Sep 04 02:45:59 AM UTC 24 |
1218911006 ps |
T1172 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_perf.3274848612 |
|
|
Sep 04 02:45:51 AM UTC 24 |
Sep 04 02:45:59 AM UTC 24 |
8493053937 ps |
T1173 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.379345283 |
|
|
Sep 04 02:45:58 AM UTC 24 |
Sep 04 02:46:01 AM UTC 24 |
563112904 ps |
T1174 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.1864929942 |
|
|
Sep 04 02:45:58 AM UTC 24 |
Sep 04 02:46:03 AM UTC 24 |
966558043 ps |
T1175 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_alert_test.1045678432 |
|
|
Sep 04 02:46:01 AM UTC 24 |
Sep 04 02:46:03 AM UTC 24 |
44530005 ps |
T1176 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_nack_txstretch.3657992392 |
|
|
Sep 04 02:46:00 AM UTC 24 |
Sep 04 02:46:04 AM UTC 24 |
172917668 ps |
T1177 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.996437176 |
|
|
Sep 04 02:45:59 AM UTC 24 |
Sep 04 02:46:04 AM UTC 24 |
426082228 ps |
T262 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.1032406945 |
|
|
Sep 04 02:45:54 AM UTC 24 |
Sep 04 02:46:05 AM UTC 24 |
1997256563 ps |
T1178 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.1219430280 |
|
|
Sep 04 02:45:58 AM UTC 24 |
Sep 04 02:46:05 AM UTC 24 |
143201958 ps |
T1179 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.2140208614 |
|
|
Sep 04 02:44:56 AM UTC 24 |
Sep 04 02:46:06 AM UTC 24 |
3187072961 ps |
T1180 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_override.2170237935 |
|
|
Sep 04 02:46:04 AM UTC 24 |
Sep 04 02:46:07 AM UTC 24 |
17852595 ps |
T1181 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.1667618015 |
|
|
Sep 04 02:41:09 AM UTC 24 |
Sep 04 02:46:08 AM UTC 24 |
20918119501 ps |
T1182 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.3582069787 |
|
|
Sep 04 02:46:06 AM UTC 24 |
Sep 04 02:46:09 AM UTC 24 |
94632618 ps |
T1183 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.1035039071 |
|
|
Sep 04 02:44:22 AM UTC 24 |
Sep 04 02:46:11 AM UTC 24 |
6155248906 ps |
T244 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/8.i2c_host_stress_all.157456563 |
|
|
Sep 04 02:33:30 AM UTC 24 |
Sep 04 02:46:12 AM UTC 24 |
75137153124 ps |
T1184 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.372175786 |
|
|
Sep 04 02:46:06 AM UTC 24 |
Sep 04 02:46:13 AM UTC 24 |
248541588 ps |
T1185 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.950327334 |
|
|
Sep 04 02:45:25 AM UTC 24 |
Sep 04 02:46:14 AM UTC 24 |
7270402317 ps |
T1186 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.191345025 |
|
|
Sep 04 02:45:35 AM UTC 24 |
Sep 04 02:46:14 AM UTC 24 |
5174453584 ps |
T1187 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.3112523245 |
|
|
Sep 04 02:46:12 AM UTC 24 |
Sep 04 02:46:16 AM UTC 24 |
259736023 ps |
T1188 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.1222959522 |
|
|
Sep 04 02:43:50 AM UTC 24 |
Sep 04 02:46:17 AM UTC 24 |
10461824330 ps |
T1189 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.1149948830 |
|
|
Sep 04 02:45:20 AM UTC 24 |
Sep 04 02:46:18 AM UTC 24 |
3999324513 ps |
T1190 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.1784261206 |
|
|
Sep 04 02:41:28 AM UTC 24 |
Sep 04 02:46:19 AM UTC 24 |
24419849877 ps |
T1191 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.3218846849 |
|
|
Sep 04 02:48:57 AM UTC 24 |
Sep 04 02:49:17 AM UTC 24 |
1060783354 ps |
T1192 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.2069098048 |
|
|
Sep 04 02:46:10 AM UTC 24 |
Sep 04 02:46:25 AM UTC 24 |
2709410734 ps |
T1193 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.2748055463 |
|
|
Sep 04 02:46:17 AM UTC 24 |
Sep 04 02:46:27 AM UTC 24 |
1055986667 ps |
T1194 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.2312474166 |
|
|
Sep 04 02:46:24 AM UTC 24 |
Sep 04 02:46:27 AM UTC 24 |
699776747 ps |
T1195 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.4058267522 |
|
|
Sep 04 02:44:58 AM UTC 24 |
Sep 04 02:46:28 AM UTC 24 |
2467721467 ps |
T1196 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.956388161 |
|
|
Sep 04 02:46:09 AM UTC 24 |
Sep 04 02:46:28 AM UTC 24 |
2856726838 ps |
T1197 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1675673145 |
|
|
Sep 04 02:46:06 AM UTC 24 |
Sep 04 02:46:29 AM UTC 24 |
1676392046 ps |
T89 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.562025401 |
|
|
Sep 04 02:46:25 AM UTC 24 |
Sep 04 02:46:29 AM UTC 24 |
823158552 ps |
T1198 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.3958527480 |
|
|
Sep 04 02:46:19 AM UTC 24 |
Sep 04 02:46:31 AM UTC 24 |
5126856507 ps |
T1199 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.919943473 |
|
|
Sep 04 02:46:14 AM UTC 24 |
Sep 04 02:46:31 AM UTC 24 |
1009682385 ps |
T1200 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.1867029763 |
|
|
Sep 04 02:44:41 AM UTC 24 |
Sep 04 02:46:33 AM UTC 24 |
54556725638 ps |
T1201 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.304429293 |
|
|
Sep 04 02:46:30 AM UTC 24 |
Sep 04 02:46:35 AM UTC 24 |
1414727979 ps |
T1202 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.933568321 |
|
|
Sep 04 02:46:32 AM UTC 24 |
Sep 04 02:46:35 AM UTC 24 |
296953834 ps |
T1203 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.3774703796 |
|
|
Sep 04 02:46:32 AM UTC 24 |
Sep 04 02:46:36 AM UTC 24 |
2143483421 ps |
T1204 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.1873919846 |
|
|
Sep 04 02:44:58 AM UTC 24 |
Sep 04 02:46:36 AM UTC 24 |
61305000605 ps |
T1205 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.2921626506 |
|
|
Sep 04 02:46:28 AM UTC 24 |
Sep 04 02:46:37 AM UTC 24 |
3512952482 ps |
T1206 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_perf.3006254530 |
|
|
Sep 04 02:46:26 AM UTC 24 |
Sep 04 02:46:37 AM UTC 24 |
3922442477 ps |
T1207 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.3684025976 |
|
|
Sep 04 02:46:15 AM UTC 24 |
Sep 04 02:46:39 AM UTC 24 |
4802993031 ps |
T1208 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_alert_test.2767772934 |
|
|
Sep 04 02:46:37 AM UTC 24 |
Sep 04 02:46:39 AM UTC 24 |
23184110 ps |
T1209 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.3525336200 |
|
|
Sep 04 02:46:35 AM UTC 24 |
Sep 04 02:46:39 AM UTC 24 |
459945920 ps |
T1210 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_nack_txstretch.236743603 |
|
|
Sep 04 02:46:36 AM UTC 24 |
Sep 04 02:46:39 AM UTC 24 |
256577913 ps |
T1211 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.682787808 |
|
|
Sep 04 02:46:34 AM UTC 24 |
Sep 04 02:46:39 AM UTC 24 |
550732294 ps |
T1212 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_override.1134949973 |
|
|
Sep 04 02:46:38 AM UTC 24 |
Sep 04 02:46:40 AM UTC 24 |
38340532 ps |
T1213 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.936489484 |
|
|
Sep 04 02:46:32 AM UTC 24 |
Sep 04 02:46:42 AM UTC 24 |
527300012 ps |
T1214 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.1548485290 |
|
|
Sep 04 02:46:40 AM UTC 24 |
Sep 04 02:46:42 AM UTC 24 |
733395566 ps |
T1215 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/15.i2c_host_perf.4031706367 |
|
|
Sep 04 02:36:32 AM UTC 24 |
Sep 04 02:46:46 AM UTC 24 |
24648453074 ps |
T1216 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.2484971475 |
|
|
Sep 04 02:44:25 AM UTC 24 |
Sep 04 02:46:47 AM UTC 24 |
3016375073 ps |
T1217 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3052087203 |
|
|
Sep 04 02:46:19 AM UTC 24 |
Sep 04 02:46:49 AM UTC 24 |
11836427506 ps |
T1218 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.1465239685 |
|
|
Sep 04 02:43:27 AM UTC 24 |
Sep 04 02:46:49 AM UTC 24 |
29642918984 ps |
T1219 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.4059868292 |
|
|
Sep 04 02:46:29 AM UTC 24 |
Sep 04 02:46:52 AM UTC 24 |
457492443 ps |
T1220 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.3668640479 |
|
|
Sep 04 02:45:51 AM UTC 24 |
Sep 04 02:46:54 AM UTC 24 |
36469599132 ps |
T1221 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.3821898155 |
|
|
Sep 04 02:46:41 AM UTC 24 |
Sep 04 02:46:55 AM UTC 24 |
433134363 ps |
T1222 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.1596239463 |
|
|
Sep 04 02:46:47 AM UTC 24 |
Sep 04 02:46:55 AM UTC 24 |
1198517926 ps |
T1223 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.3682815574 |
|
|
Sep 04 02:45:34 AM UTC 24 |
Sep 04 02:46:58 AM UTC 24 |
1789671414 ps |
T1224 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.3636669650 |
|
|
Sep 04 02:46:40 AM UTC 24 |
Sep 04 02:46:59 AM UTC 24 |
1300927230 ps |
T1225 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.1207658364 |
|
|
Sep 04 02:45:24 AM UTC 24 |
Sep 04 02:47:01 AM UTC 24 |
9550622159 ps |
T1226 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.2234533033 |
|
|
Sep 04 02:46:43 AM UTC 24 |
Sep 04 02:47:02 AM UTC 24 |
6254652721 ps |
T1227 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.3273201478 |
|
|
Sep 04 02:45:23 AM UTC 24 |
Sep 04 02:47:02 AM UTC 24 |
8772995018 ps |
T1228 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.80325737 |
|
|
Sep 04 02:46:04 AM UTC 24 |
Sep 04 02:47:02 AM UTC 24 |
5713887320 ps |
T1229 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.1935397944 |
|
|
Sep 04 02:47:00 AM UTC 24 |
Sep 04 02:47:02 AM UTC 24 |
142798490 ps |
T1230 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.1606067752 |
|
|
Sep 04 02:46:55 AM UTC 24 |
Sep 04 02:47:04 AM UTC 24 |
7547152608 ps |
T1231 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.3348345905 |
|
|
Sep 04 02:47:01 AM UTC 24 |
Sep 04 02:47:04 AM UTC 24 |
204780215 ps |
T1232 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.1807929416 |
|
|
Sep 04 02:46:49 AM UTC 24 |
Sep 04 02:47:05 AM UTC 24 |
2802516103 ps |
T1233 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.2010839704 |
|
|
Sep 04 02:46:56 AM UTC 24 |
Sep 04 02:47:07 AM UTC 24 |
2644218884 ps |
T1234 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.2008019536 |
|
|
Sep 04 02:46:05 AM UTC 24 |
Sep 04 02:47:08 AM UTC 24 |
7835591855 ps |
T1235 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.2530377807 |
|
|
Sep 04 02:46:27 AM UTC 24 |
Sep 04 02:47:09 AM UTC 24 |
26945968776 ps |
T1236 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.293357739 |
|
|
Sep 04 02:47:06 AM UTC 24 |
Sep 04 02:47:09 AM UTC 24 |
260328720 ps |
T1237 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_perf.2212387304 |
|
|
Sep 04 02:47:02 AM UTC 24 |
Sep 04 02:47:10 AM UTC 24 |
6380259146 ps |
T1238 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.3158162124 |
|
|
Sep 04 02:47:04 AM UTC 24 |
Sep 04 02:47:12 AM UTC 24 |
608296685 ps |
T1239 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.1930964860 |
|
|
Sep 04 02:47:06 AM UTC 24 |
Sep 04 02:47:12 AM UTC 24 |
461852097 ps |
T1240 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.2015895150 |
|
|
Sep 04 02:47:08 AM UTC 24 |
Sep 04 02:47:12 AM UTC 24 |
1405698676 ps |
T1241 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.598796322 |
|
|
Sep 04 02:47:03 AM UTC 24 |
Sep 04 02:47:13 AM UTC 24 |
4185730679 ps |
T1242 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_alert_test.3895775514 |
|
|
Sep 04 02:47:11 AM UTC 24 |
Sep 04 02:47:14 AM UTC 24 |
28224965 ps |
T1243 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.1656172180 |
|
|
Sep 04 02:46:52 AM UTC 24 |
Sep 04 02:47:14 AM UTC 24 |
1867968244 ps |
T1244 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.991950993 |
|
|
Sep 04 02:47:10 AM UTC 24 |
Sep 04 02:47:14 AM UTC 24 |
136486999 ps |
T1245 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.633425474 |
|
|
Sep 04 02:47:10 AM UTC 24 |
Sep 04 02:47:15 AM UTC 24 |
1127528850 ps |
T1246 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.2503868519 |
|
|
Sep 04 02:47:09 AM UTC 24 |
Sep 04 02:47:15 AM UTC 24 |
971804614 ps |
T1247 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_override.2833351835 |
|
|
Sep 04 02:47:13 AM UTC 24 |
Sep 04 02:47:15 AM UTC 24 |
46973560 ps |
T1248 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.3157820787 |
|
|
Sep 04 02:46:43 AM UTC 24 |
Sep 04 02:47:16 AM UTC 24 |
652795199 ps |
T245 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/12.i2c_host_stress_all.1613365416 |
|
|
Sep 04 02:35:06 AM UTC 24 |
Sep 04 02:47:16 AM UTC 24 |
35640327793 ps |
T1249 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.917884630 |
|
|
Sep 04 02:47:08 AM UTC 24 |
Sep 04 02:47:17 AM UTC 24 |
272788077 ps |
T1250 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.801748279 |
|
|
Sep 04 02:47:15 AM UTC 24 |
Sep 04 02:47:18 AM UTC 24 |
285997626 ps |
T1251 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.3798357478 |
|
|
Sep 04 02:47:17 AM UTC 24 |
Sep 04 02:47:21 AM UTC 24 |
130432099 ps |
T1252 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.3927530216 |
|
|
Sep 04 02:46:39 AM UTC 24 |
Sep 04 02:47:21 AM UTC 24 |
14061113973 ps |
T1253 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.2971355670 |
|
|
Sep 04 02:47:15 AM UTC 24 |
Sep 04 02:47:22 AM UTC 24 |
293262208 ps |
T1254 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.825155581 |
|
|
Sep 04 02:46:03 AM UTC 24 |
Sep 04 02:47:26 AM UTC 24 |
1851285177 ps |
T1255 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.2552863477 |
|
|
Sep 04 02:47:15 AM UTC 24 |
Sep 04 02:47:30 AM UTC 24 |
899876940 ps |
T1256 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.903573430 |
|
|
Sep 04 02:47:24 AM UTC 24 |
Sep 04 02:47:32 AM UTC 24 |
2974892364 ps |
T1257 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.703922292 |
|
|
Sep 04 02:47:16 AM UTC 24 |
Sep 04 02:47:32 AM UTC 24 |
284630139 ps |
T1258 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.2612317860 |
|
|
Sep 04 02:47:32 AM UTC 24 |
Sep 04 02:47:35 AM UTC 24 |
330724970 ps |
T1259 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.2307111872 |
|
|
Sep 04 02:47:33 AM UTC 24 |
Sep 04 02:47:36 AM UTC 24 |
118532927 ps |
T1260 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.1511063241 |
|
|
Sep 04 02:47:23 AM UTC 24 |
Sep 04 02:47:38 AM UTC 24 |
4415721647 ps |
T1261 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.3087479067 |
|
|
Sep 04 02:46:54 AM UTC 24 |
Sep 04 02:47:41 AM UTC 24 |
2932377137 ps |
T1262 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_hrst.4080308898 |
|
|
Sep 04 02:47:38 AM UTC 24 |
Sep 04 02:47:43 AM UTC 24 |
1084744990 ps |
T1263 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.3012777830 |
|
|
Sep 04 02:47:31 AM UTC 24 |
Sep 04 02:47:44 AM UTC 24 |
5191677332 ps |
T1264 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_perf.2497869612 |
|
|
Sep 04 02:47:34 AM UTC 24 |
Sep 04 02:47:45 AM UTC 24 |
5002034096 ps |
T1265 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.389566716 |
|
|
Sep 04 02:47:23 AM UTC 24 |
Sep 04 02:47:48 AM UTC 24 |
2432574135 ps |
T1266 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.2336040109 |
|
|
Sep 04 02:47:46 AM UTC 24 |
Sep 04 02:47:48 AM UTC 24 |
175495624 ps |
T1267 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.771584496 |
|
|
Sep 04 02:47:45 AM UTC 24 |
Sep 04 02:47:50 AM UTC 24 |
1018722795 ps |
T1268 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.3724765942 |
|
|
Sep 04 02:47:36 AM UTC 24 |
Sep 04 02:47:50 AM UTC 24 |
5582853333 ps |
T1269 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.536125863 |
|
|
Sep 04 02:47:18 AM UTC 24 |
Sep 04 02:47:52 AM UTC 24 |
1889117311 ps |
T1270 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.2057849423 |
|
|
Sep 04 02:47:46 AM UTC 24 |
Sep 04 02:47:53 AM UTC 24 |
177386410 ps |
T1271 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.2192053208 |
|
|
Sep 04 02:47:49 AM UTC 24 |
Sep 04 02:47:54 AM UTC 24 |
572282714 ps |
T1272 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_alert_test.1866012969 |
|
|
Sep 04 02:47:52 AM UTC 24 |
Sep 04 02:47:54 AM UTC 24 |
17709250 ps |
T1273 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.1923378241 |
|
|
Sep 04 02:47:56 AM UTC 24 |
Sep 04 02:49:15 AM UTC 24 |
13900871713 ps |
T1274 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.2786507120 |
|
|
Sep 04 02:47:49 AM UTC 24 |
Sep 04 02:47:55 AM UTC 24 |
3003932376 ps |
T1275 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3396994129 |
|
|
Sep 04 02:47:51 AM UTC 24 |
Sep 04 02:47:56 AM UTC 24 |
541593553 ps |
T1276 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_override.1962860348 |
|
|
Sep 04 02:47:54 AM UTC 24 |
Sep 04 02:47:56 AM UTC 24 |
34003579 ps |
T1277 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.59920404 |
|
|
Sep 04 02:47:56 AM UTC 24 |
Sep 04 02:47:58 AM UTC 24 |
395722115 ps |
T1278 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.1785023590 |
|
|
Sep 04 02:47:21 AM UTC 24 |
Sep 04 02:48:00 AM UTC 24 |
57328490495 ps |
T1279 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.3926071732 |
|
|
Sep 04 02:47:17 AM UTC 24 |
Sep 04 02:48:02 AM UTC 24 |
3114373654 ps |
T1280 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.4213701968 |
|
|
Sep 04 02:44:13 AM UTC 24 |
Sep 04 02:48:07 AM UTC 24 |
28529877449 ps |
T1281 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.2809500845 |
|
|
Sep 04 02:47:57 AM UTC 24 |
Sep 04 02:48:08 AM UTC 24 |
551956513 ps |
T248 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.2751825587 |
|
|
Sep 04 02:47:44 AM UTC 24 |
Sep 04 02:48:09 AM UTC 24 |
1863614676 ps |
T1282 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.399140178 |
|
|
Sep 04 02:45:00 AM UTC 24 |
Sep 04 02:48:10 AM UTC 24 |
58944776644 ps |
T1283 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.3710455355 |
|
|
Sep 04 02:48:03 AM UTC 24 |
Sep 04 02:48:11 AM UTC 24 |
627301300 ps |
T1284 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.766674001 |
|
|
Sep 04 02:47:57 AM UTC 24 |
Sep 04 02:48:12 AM UTC 24 |
1035191605 ps |
T1285 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.1167900347 |
|
|
Sep 04 02:47:15 AM UTC 24 |
Sep 04 02:48:15 AM UTC 24 |
1860917402 ps |
T1286 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.83572539 |
|
|
Sep 04 02:46:56 AM UTC 24 |
Sep 04 02:48:15 AM UTC 24 |
24181705360 ps |
T1287 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.3735323567 |
|
|
Sep 04 02:48:09 AM UTC 24 |
Sep 04 02:48:20 AM UTC 24 |
197481798 ps |
T1288 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.966537660 |
|
|
Sep 04 02:47:36 AM UTC 24 |
Sep 04 02:48:21 AM UTC 24 |
7432887316 ps |
T1289 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.1901297999 |
|
|
Sep 04 02:46:37 AM UTC 24 |
Sep 04 02:48:23 AM UTC 24 |
7354832122 ps |
T1290 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.3616761718 |
|
|
Sep 04 02:46:38 AM UTC 24 |
Sep 04 02:48:26 AM UTC 24 |
12548626583 ps |
T1291 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.45604686 |
|
|
Sep 04 02:48:08 AM UTC 24 |
Sep 04 02:48:27 AM UTC 24 |
2841670721 ps |
T1292 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_perf.3321217486 |
|
|
Sep 04 02:49:11 AM UTC 24 |
Sep 04 02:49:17 AM UTC 24 |
578077861 ps |
T1293 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.1787771894 |
|
|
Sep 04 02:46:41 AM UTC 24 |
Sep 04 02:48:27 AM UTC 24 |
6088349647 ps |
T1294 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.2070719221 |
|
|
Sep 04 02:48:16 AM UTC 24 |
Sep 04 02:48:28 AM UTC 24 |
3853674700 ps |
T1295 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.3586432258 |
|
|
Sep 04 02:48:16 AM UTC 24 |
Sep 04 02:48:29 AM UTC 24 |
1283354896 ps |
T1296 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.250297601 |
|
|
Sep 04 02:48:27 AM UTC 24 |
Sep 04 02:48:30 AM UTC 24 |
291153480 ps |
T1297 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.1370631328 |
|
|
Sep 04 02:48:27 AM UTC 24 |
Sep 04 02:48:31 AM UTC 24 |
264309700 ps |
T1298 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.1705270023 |
|
|
Sep 04 02:49:02 AM UTC 24 |
Sep 04 02:49:16 AM UTC 24 |
1345261795 ps |
T1299 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.3733068238 |
|
|
Sep 04 02:47:16 AM UTC 24 |
Sep 04 02:48:36 AM UTC 24 |
2704604804 ps |
T1300 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_perf.1505076790 |
|
|
Sep 04 02:48:28 AM UTC 24 |
Sep 04 02:48:36 AM UTC 24 |
538800274 ps |
T1301 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.3443526807 |
|
|
Sep 04 02:47:12 AM UTC 24 |
Sep 04 02:48:36 AM UTC 24 |
1727740047 ps |
T1302 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.1849890292 |
|
|
Sep 04 02:48:22 AM UTC 24 |
Sep 04 02:48:37 AM UTC 24 |
1450265316 ps |
T1303 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.1495264640 |
|
|
Sep 04 02:48:30 AM UTC 24 |
Sep 04 02:48:39 AM UTC 24 |
1642585648 ps |
T1304 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.2907839817 |
|
|
Sep 04 02:48:32 AM UTC 24 |
Sep 04 02:48:39 AM UTC 24 |
1015710851 ps |
T1305 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.1545705547 |
|
|
Sep 04 02:48:37 AM UTC 24 |
Sep 04 02:48:40 AM UTC 24 |
136827101 ps |
T1306 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.1649049846 |
|
|
Sep 04 02:48:11 AM UTC 24 |
Sep 04 02:48:41 AM UTC 24 |
3204305421 ps |
T1307 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.3592787790 |
|
|
Sep 04 02:48:37 AM UTC 24 |
Sep 04 02:48:41 AM UTC 24 |
236001987 ps |
T1308 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.2895990601 |
|
|
Sep 04 02:48:37 AM UTC 24 |
Sep 04 02:48:42 AM UTC 24 |
1818526693 ps |
T1309 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_alert_test.2459093577 |
|
|
Sep 04 02:48:40 AM UTC 24 |
Sep 04 02:48:42 AM UTC 24 |
29874564 ps |
T1310 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.2494214860 |
|
|
Sep 04 02:48:13 AM UTC 24 |
Sep 04 02:48:43 AM UTC 24 |
1282012862 ps |
T1311 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_override.1324166311 |
|
|
Sep 04 02:48:42 AM UTC 24 |
Sep 04 02:48:44 AM UTC 24 |
146023790 ps |
T1312 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.2912479489 |
|
|
Sep 04 02:48:40 AM UTC 24 |
Sep 04 02:48:44 AM UTC 24 |
569027186 ps |
T1313 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.3603724099 |
|
|
Sep 04 02:48:39 AM UTC 24 |
Sep 04 02:48:44 AM UTC 24 |
582146507 ps |
T53 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.138018710 |
|
|
Sep 04 02:48:38 AM UTC 24 |
Sep 04 02:48:44 AM UTC 24 |
2306359647 ps |
T1314 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.1507899983 |
|
|
Sep 04 02:47:56 AM UTC 24 |
Sep 04 02:48:45 AM UTC 24 |
7876370193 ps |
T1315 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.414704759 |
|
|
Sep 04 02:48:37 AM UTC 24 |
Sep 04 02:48:47 AM UTC 24 |
329836025 ps |
T1316 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.109291940 |
|
|
Sep 04 02:48:44 AM UTC 24 |
Sep 04 02:48:47 AM UTC 24 |
260193592 ps |
T1317 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.3062699634 |
|
|
Sep 04 02:48:46 AM UTC 24 |
Sep 04 02:48:49 AM UTC 24 |
460516316 ps |
T1318 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.1442781738 |
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Sep 04 02:48:45 AM UTC 24 |
Sep 04 02:48:52 AM UTC 24 |
394654352 ps |
T1319 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.4059853546 |
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Sep 04 02:45:10 AM UTC 24 |
Sep 04 02:48:54 AM UTC 24 |
25267019005 ps |
T1320 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.3216534268 |
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|
Sep 04 02:47:27 AM UTC 24 |
Sep 04 02:48:56 AM UTC 24 |
11365517563 ps |
T1321 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.3438883512 |
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Sep 04 02:48:49 AM UTC 24 |
Sep 04 02:48:59 AM UTC 24 |
854464568 ps |
T1322 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_perf.2010519439 |
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Sep 04 02:48:01 AM UTC 24 |
Sep 04 02:49:00 AM UTC 24 |
6680407558 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.417297069 |
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Sep 04 02:48:47 AM UTC 24 |
Sep 04 02:49:01 AM UTC 24 |
6579469551 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.2698283672 |
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Sep 04 02:48:54 AM UTC 24 |
Sep 04 02:49:16 AM UTC 24 |
5594624786 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.2098250021 |
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Sep 04 02:48:45 AM UTC 24 |
Sep 04 02:49:09 AM UTC 24 |
426612518 ps |