T1326 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.1520784896 |
|
|
Sep 04 02:48:42 AM UTC 24 |
Sep 04 02:49:09 AM UTC 24 |
2172778250 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/32.i2c_host_stress_all.2007541599 |
|
|
Sep 04 02:44:59 AM UTC 24 |
Sep 04 02:49:10 AM UTC 24 |
6958669169 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.1643163878 |
|
|
Sep 04 02:49:01 AM UTC 24 |
Sep 04 02:49:10 AM UTC 24 |
1031782891 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.687929946 |
|
|
Sep 04 02:49:09 AM UTC 24 |
Sep 04 02:49:12 AM UTC 24 |
120926999 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.16960392 |
|
|
Sep 04 02:49:09 AM UTC 24 |
Sep 04 02:49:12 AM UTC 24 |
535429179 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.3125276080 |
|
|
Sep 04 02:49:17 AM UTC 24 |
Sep 04 02:49:19 AM UTC 24 |
313585510 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.3475147712 |
|
|
Sep 04 02:47:13 AM UTC 24 |
Sep 04 02:49:19 AM UTC 24 |
8515412526 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.3259033795 |
|
|
Sep 04 02:49:16 AM UTC 24 |
Sep 04 02:49:20 AM UTC 24 |
686815943 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_perf.64462991 |
|
|
Sep 04 02:46:08 AM UTC 24 |
Sep 04 02:49:20 AM UTC 24 |
6825427421 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.2953062721 |
|
|
Sep 04 02:47:53 AM UTC 24 |
Sep 04 02:49:20 AM UTC 24 |
1957507561 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.3111665482 |
|
|
Sep 04 02:49:12 AM UTC 24 |
Sep 04 02:49:21 AM UTC 24 |
1020464507 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.499664180 |
|
|
Sep 04 02:49:18 AM UTC 24 |
Sep 04 02:49:23 AM UTC 24 |
547371881 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3010843485 |
|
|
Sep 04 02:49:21 AM UTC 24 |
Sep 04 02:49:23 AM UTC 24 |
25384263 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_override.3859762942 |
|
|
Sep 04 02:49:21 AM UTC 24 |
Sep 04 02:49:23 AM UTC 24 |
30509535 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2067903560 |
|
|
Sep 04 02:49:18 AM UTC 24 |
Sep 04 02:49:23 AM UTC 24 |
1718287076 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.3389047542 |
|
|
Sep 04 02:49:21 AM UTC 24 |
Sep 04 02:49:24 AM UTC 24 |
281246367 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.3647244552 |
|
|
Sep 04 02:49:20 AM UTC 24 |
Sep 04 02:49:25 AM UTC 24 |
2078519054 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_intr_stress_wr.1772444539 |
|
|
Sep 04 02:48:21 AM UTC 24 |
Sep 04 02:49:25 AM UTC 24 |
25814356437 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.1687680066 |
|
|
Sep 04 02:49:23 AM UTC 24 |
Sep 04 02:49:26 AM UTC 24 |
131968783 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.604287011 |
|
|
Sep 04 02:49:25 AM UTC 24 |
Sep 04 02:49:29 AM UTC 24 |
126338537 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.2465700019 |
|
|
Sep 04 02:47:59 AM UTC 24 |
Sep 04 02:49:29 AM UTC 24 |
3277608702 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.4105621548 |
|
|
Sep 04 02:49:00 AM UTC 24 |
Sep 04 02:49:30 AM UTC 24 |
2595798296 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.2788314723 |
|
|
Sep 04 02:49:23 AM UTC 24 |
Sep 04 02:49:30 AM UTC 24 |
1000530903 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.3208265470 |
|
|
Sep 04 02:49:17 AM UTC 24 |
Sep 04 02:49:31 AM UTC 24 |
444390610 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.3995047718 |
|
|
Sep 04 02:49:26 AM UTC 24 |
Sep 04 02:49:31 AM UTC 24 |
232595159 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.2543493395 |
|
|
Sep 04 02:43:40 AM UTC 24 |
Sep 04 02:49:31 AM UTC 24 |
27652776584 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.560772377 |
|
|
Sep 04 02:49:27 AM UTC 24 |
Sep 04 02:49:35 AM UTC 24 |
136721027 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/15.i2c_target_stress_wr.3280889743 |
|
|
Sep 04 02:36:35 AM UTC 24 |
Sep 04 02:49:36 AM UTC 24 |
49487456896 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.408178555 |
|
|
Sep 04 02:49:26 AM UTC 24 |
Sep 04 02:49:40 AM UTC 24 |
907949816 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.3577632169 |
|
|
Sep 04 02:49:40 AM UTC 24 |
Sep 04 02:49:43 AM UTC 24 |
232367716 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.1028701946 |
|
|
Sep 04 02:49:41 AM UTC 24 |
Sep 04 02:49:43 AM UTC 24 |
265913456 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.1225160520 |
|
|
Sep 04 02:49:36 AM UTC 24 |
Sep 04 02:49:46 AM UTC 24 |
1357992374 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.2243940976 |
|
|
Sep 04 02:49:32 AM UTC 24 |
Sep 04 02:49:46 AM UTC 24 |
1441098004 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.448794740 |
|
|
Sep 04 02:46:07 AM UTC 24 |
Sep 04 02:49:47 AM UTC 24 |
3518326291 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.3014795131 |
|
|
Sep 04 02:49:16 AM UTC 24 |
Sep 04 02:49:48 AM UTC 24 |
2900242477 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.2602884462 |
|
|
Sep 04 02:49:47 AM UTC 24 |
Sep 04 02:49:51 AM UTC 24 |
277926294 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_perf.1880954645 |
|
|
Sep 04 02:49:44 AM UTC 24 |
Sep 04 02:49:52 AM UTC 24 |
3393883709 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_mode_toggle.3135380225 |
|
|
Sep 04 02:49:47 AM UTC 24 |
Sep 04 02:49:52 AM UTC 24 |
90796065 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.1592788168 |
|
|
Sep 04 02:48:45 AM UTC 24 |
Sep 04 02:49:53 AM UTC 24 |
2085002855 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.2968666115 |
|
|
Sep 04 02:49:21 AM UTC 24 |
Sep 04 02:49:54 AM UTC 24 |
7564267513 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.1808397411 |
|
|
Sep 04 02:49:53 AM UTC 24 |
Sep 04 02:49:55 AM UTC 24 |
357678633 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.204390852 |
|
|
Sep 04 02:49:53 AM UTC 24 |
Sep 04 02:49:56 AM UTC 24 |
57170697 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.1262914784 |
|
|
Sep 04 02:49:47 AM UTC 24 |
Sep 04 02:49:56 AM UTC 24 |
1281658566 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.1740730658 |
|
|
Sep 04 02:49:52 AM UTC 24 |
Sep 04 02:49:57 AM UTC 24 |
1243692232 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_alert_test.3725803761 |
|
|
Sep 04 02:49:57 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
16243787 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_override.2721241921 |
|
|
Sep 04 02:49:57 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
20575369 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.4207443341 |
|
|
Sep 04 02:49:55 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
441297349 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.4050812371 |
|
|
Sep 04 02:49:56 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
873916781 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.4022233026 |
|
|
Sep 04 02:49:55 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
1870686886 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.2733717902 |
|
|
Sep 04 02:49:31 AM UTC 24 |
Sep 04 02:49:59 AM UTC 24 |
1346593464 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.1811034656 |
|
|
Sep 04 02:49:55 AM UTC 24 |
Sep 04 02:50:00 AM UTC 24 |
499635888 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.1987345812 |
|
|
Sep 04 02:49:31 AM UTC 24 |
Sep 04 02:50:02 AM UTC 24 |
3109823877 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.4139532415 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:50:04 AM UTC 24 |
1743066656 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.3231951862 |
|
|
Sep 04 02:48:43 AM UTC 24 |
Sep 04 02:50:04 AM UTC 24 |
2697636473 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.343369840 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:50:06 AM UTC 24 |
458569012 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.1632248379 |
|
|
Sep 04 02:50:03 AM UTC 24 |
Sep 04 02:50:07 AM UTC 24 |
40641358 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.3861235161 |
|
|
Sep 04 02:50:05 AM UTC 24 |
Sep 04 02:50:10 AM UTC 24 |
1970808199 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.1519097980 |
|
|
Sep 04 02:49:48 AM UTC 24 |
Sep 04 02:50:13 AM UTC 24 |
1703633128 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.2820585757 |
|
|
Sep 04 02:49:30 AM UTC 24 |
Sep 04 02:50:14 AM UTC 24 |
1360569131 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.966571199 |
|
|
Sep 04 02:41:45 AM UTC 24 |
Sep 04 02:50:19 AM UTC 24 |
61088551953 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.1772074992 |
|
|
Sep 04 02:48:28 AM UTC 24 |
Sep 04 02:50:19 AM UTC 24 |
107850900878 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.1758720608 |
|
|
Sep 04 02:49:44 AM UTC 24 |
Sep 04 02:50:19 AM UTC 24 |
89061731475 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.2193746065 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:50:19 AM UTC 24 |
1443307513 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.2720287566 |
|
|
Sep 04 02:50:04 AM UTC 24 |
Sep 04 02:50:21 AM UTC 24 |
1226020472 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.1350154883 |
|
|
Sep 04 02:49:02 AM UTC 24 |
Sep 04 02:50:22 AM UTC 24 |
7961395922 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.889142375 |
|
|
Sep 04 02:50:31 AM UTC 24 |
Sep 04 02:50:36 AM UTC 24 |
1518063747 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.635669956 |
|
|
Sep 04 02:50:15 AM UTC 24 |
Sep 04 02:50:23 AM UTC 24 |
1832838823 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.440571165 |
|
|
Sep 04 02:50:20 AM UTC 24 |
Sep 04 02:50:24 AM UTC 24 |
445967340 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.3498370722 |
|
|
Sep 04 02:50:22 AM UTC 24 |
Sep 04 02:50:26 AM UTC 24 |
266798952 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.486675737 |
|
|
Sep 04 02:50:16 AM UTC 24 |
Sep 04 02:50:26 AM UTC 24 |
4855861343 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.2552739985 |
|
|
Sep 04 02:50:24 AM UTC 24 |
Sep 04 02:50:29 AM UTC 24 |
1290524561 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_mode_toggle.2993736307 |
|
|
Sep 04 02:50:26 AM UTC 24 |
Sep 04 02:50:29 AM UTC 24 |
252283592 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.3004858049 |
|
|
Sep 04 02:50:20 AM UTC 24 |
Sep 04 02:50:30 AM UTC 24 |
4262885233 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_override.2315066830 |
|
|
Sep 04 02:50:34 AM UTC 24 |
Sep 04 02:50:36 AM UTC 24 |
14850843 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.1954338694 |
|
|
Sep 04 02:50:24 AM UTC 24 |
Sep 04 02:50:32 AM UTC 24 |
618851711 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.817604848 |
|
|
Sep 04 02:50:27 AM UTC 24 |
Sep 04 02:50:32 AM UTC 24 |
506085160 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.1262478461 |
|
|
Sep 04 02:50:30 AM UTC 24 |
Sep 04 02:50:33 AM UTC 24 |
41743360 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.1973888232 |
|
|
Sep 04 02:50:30 AM UTC 24 |
Sep 04 02:50:33 AM UTC 24 |
621799327 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.996653497 |
|
|
Sep 04 02:50:20 AM UTC 24 |
Sep 04 02:50:34 AM UTC 24 |
5713292449 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_alert_test.445715901 |
|
|
Sep 04 02:50:33 AM UTC 24 |
Sep 04 02:50:35 AM UTC 24 |
17435473 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.2840450305 |
|
|
Sep 04 02:50:33 AM UTC 24 |
Sep 04 02:50:36 AM UTC 24 |
196681704 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_perf.2817599237 |
|
|
Sep 04 02:50:23 AM UTC 24 |
Sep 04 02:50:36 AM UTC 24 |
1077500537 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.77773748 |
|
|
Sep 04 02:50:33 AM UTC 24 |
Sep 04 02:50:37 AM UTC 24 |
1035167201 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.2138217159 |
|
|
Sep 04 02:50:07 AM UTC 24 |
Sep 04 02:50:38 AM UTC 24 |
3909404361 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.2793818857 |
|
|
Sep 04 02:50:32 AM UTC 24 |
Sep 04 02:50:38 AM UTC 24 |
4585361217 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.1436930547 |
|
|
Sep 04 02:50:37 AM UTC 24 |
Sep 04 02:50:39 AM UTC 24 |
94769901 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.131608694 |
|
|
Sep 04 02:50:27 AM UTC 24 |
Sep 04 02:50:40 AM UTC 24 |
526773209 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.157692648 |
|
|
Sep 04 02:49:57 AM UTC 24 |
Sep 04 02:50:40 AM UTC 24 |
2041741267 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.3141437448 |
|
|
Sep 04 02:50:10 AM UTC 24 |
Sep 04 02:50:41 AM UTC 24 |
1177523594 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_perf.3897394994 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:50:43 AM UTC 24 |
6604002968 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.3724544082 |
|
|
Sep 04 02:50:39 AM UTC 24 |
Sep 04 02:50:44 AM UTC 24 |
532247510 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.2438900024 |
|
|
Sep 04 02:50:40 AM UTC 24 |
Sep 04 02:50:44 AM UTC 24 |
150597242 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.1512199281 |
|
|
Sep 04 02:50:37 AM UTC 24 |
Sep 04 02:50:48 AM UTC 24 |
644205198 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.1933177819 |
|
|
Sep 04 02:50:37 AM UTC 24 |
Sep 04 02:50:52 AM UTC 24 |
254013707 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.2850401562 |
|
|
Sep 04 02:50:45 AM UTC 24 |
Sep 04 02:50:53 AM UTC 24 |
896104155 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.1012423714 |
|
|
Sep 04 02:50:39 AM UTC 24 |
Sep 04 02:50:57 AM UTC 24 |
824763244 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.3272114428 |
|
|
Sep 04 02:51:49 AM UTC 24 |
Sep 04 02:51:56 AM UTC 24 |
132565858 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.3993576061 |
|
|
Sep 04 02:51:48 AM UTC 24 |
Sep 04 02:51:59 AM UTC 24 |
1835743747 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.2433993952 |
|
|
Sep 04 02:50:41 AM UTC 24 |
Sep 04 02:50:58 AM UTC 24 |
17147779009 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.1355984827 |
|
|
Sep 04 02:50:56 AM UTC 24 |
Sep 04 02:50:59 AM UTC 24 |
202282724 ps |
T300 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.3936757488 |
|
|
Sep 04 02:50:58 AM UTC 24 |
Sep 04 02:51:02 AM UTC 24 |
299888629 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.2583326088 |
|
|
Sep 04 02:50:52 AM UTC 24 |
Sep 04 02:51:03 AM UTC 24 |
5536969299 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.2969204140 |
|
|
Sep 04 02:48:43 AM UTC 24 |
Sep 04 02:51:03 AM UTC 24 |
32384214929 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_perf.3940541123 |
|
|
Sep 04 02:50:58 AM UTC 24 |
Sep 04 02:51:06 AM UTC 24 |
2993087267 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.2962103968 |
|
|
Sep 04 02:51:14 AM UTC 24 |
Sep 04 02:52:02 AM UTC 24 |
1988201403 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_intr_stress_wr.1478746215 |
|
|
Sep 04 02:50:49 AM UTC 24 |
Sep 04 02:51:06 AM UTC 24 |
13792117663 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_hrst.314124736 |
|
|
Sep 04 02:51:03 AM UTC 24 |
Sep 04 02:51:07 AM UTC 24 |
1203068207 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.3458548836 |
|
|
Sep 04 02:50:45 AM UTC 24 |
Sep 04 02:51:08 AM UTC 24 |
2381481597 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.2215836040 |
|
|
Sep 04 02:51:07 AM UTC 24 |
Sep 04 02:51:10 AM UTC 24 |
102559589 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_perf.2646486303 |
|
|
Sep 04 02:50:38 AM UTC 24 |
Sep 04 02:51:10 AM UTC 24 |
7605536741 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2046793125 |
|
|
Sep 04 02:50:59 AM UTC 24 |
Sep 04 02:51:10 AM UTC 24 |
1123728591 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.3424845175 |
|
|
Sep 04 02:51:07 AM UTC 24 |
Sep 04 02:51:11 AM UTC 24 |
82368916 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_alert_test.141047717 |
|
|
Sep 04 02:51:10 AM UTC 24 |
Sep 04 02:51:12 AM UTC 24 |
39559509 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.3737289531 |
|
|
Sep 04 02:51:08 AM UTC 24 |
Sep 04 02:51:13 AM UTC 24 |
488249759 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.3257011965 |
|
|
Sep 04 02:49:22 AM UTC 24 |
Sep 04 02:51:13 AM UTC 24 |
1851431810 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.3580729873 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:51:59 AM UTC 24 |
2127952394 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.1316694188 |
|
|
Sep 04 02:51:07 AM UTC 24 |
Sep 04 02:51:14 AM UTC 24 |
606137246 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.2453655345 |
|
|
Sep 04 02:51:08 AM UTC 24 |
Sep 04 02:51:14 AM UTC 24 |
2415360552 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_override.1818829652 |
|
|
Sep 04 02:51:13 AM UTC 24 |
Sep 04 02:51:15 AM UTC 24 |
20554211 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.3803807383 |
|
|
Sep 04 02:50:44 AM UTC 24 |
Sep 04 02:51:15 AM UTC 24 |
1382382474 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.903781084 |
|
|
Sep 04 02:51:10 AM UTC 24 |
Sep 04 02:51:16 AM UTC 24 |
521050365 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.465598522 |
|
|
Sep 04 02:51:04 AM UTC 24 |
Sep 04 02:51:17 AM UTC 24 |
1498927131 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.4052096800 |
|
|
Sep 04 02:51:15 AM UTC 24 |
Sep 04 02:51:17 AM UTC 24 |
76774185 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.2189496023 |
|
|
Sep 04 02:39:12 AM UTC 24 |
Sep 04 02:51:19 AM UTC 24 |
52122233366 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.3946904909 |
|
|
Sep 04 02:49:25 AM UTC 24 |
Sep 04 02:51:21 AM UTC 24 |
4695924573 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.2544448619 |
|
|
Sep 04 02:51:18 AM UTC 24 |
Sep 04 02:51:21 AM UTC 24 |
242677666 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.1744431738 |
|
|
Sep 04 02:51:15 AM UTC 24 |
Sep 04 02:51:22 AM UTC 24 |
342683517 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.4211566723 |
|
|
Sep 04 02:51:57 AM UTC 24 |
Sep 04 02:52:06 AM UTC 24 |
2797656011 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.4147441138 |
|
|
Sep 04 02:48:12 AM UTC 24 |
Sep 04 02:51:25 AM UTC 24 |
62408638336 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_perf.751222295 |
|
|
Sep 04 02:51:16 AM UTC 24 |
Sep 04 02:51:27 AM UTC 24 |
1889337595 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.1314143248 |
|
|
Sep 04 02:50:01 AM UTC 24 |
Sep 04 02:51:31 AM UTC 24 |
5479959903 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.2503343343 |
|
|
Sep 04 02:50:36 AM UTC 24 |
Sep 04 02:51:33 AM UTC 24 |
2079734601 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.4106067410 |
|
|
Sep 04 02:51:26 AM UTC 24 |
Sep 04 02:51:33 AM UTC 24 |
2687181389 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.1519872656 |
|
|
Sep 04 02:51:15 AM UTC 24 |
Sep 04 02:51:33 AM UTC 24 |
500168529 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.787142467 |
|
|
Sep 04 02:50:41 AM UTC 24 |
Sep 04 02:51:34 AM UTC 24 |
1826309224 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.317682285 |
|
|
Sep 04 02:51:26 AM UTC 24 |
Sep 04 02:51:35 AM UTC 24 |
1408517957 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3546568406 |
|
|
Sep 04 02:51:33 AM UTC 24 |
Sep 04 02:51:36 AM UTC 24 |
120986064 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.338493323 |
|
|
Sep 04 02:51:22 AM UTC 24 |
Sep 04 02:51:36 AM UTC 24 |
815084858 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.1629590772 |
|
|
Sep 04 02:50:34 AM UTC 24 |
Sep 04 02:51:37 AM UTC 24 |
5476902011 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.3942161649 |
|
|
Sep 04 02:51:34 AM UTC 24 |
Sep 04 02:51:37 AM UTC 24 |
569828080 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.3218364590 |
|
|
Sep 04 02:50:58 AM UTC 24 |
Sep 04 02:51:39 AM UTC 24 |
5075133083 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.3318416322 |
|
|
Sep 04 02:51:17 AM UTC 24 |
Sep 04 02:51:39 AM UTC 24 |
9134731845 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.2812405892 |
|
|
Sep 04 02:51:37 AM UTC 24 |
Sep 04 02:51:40 AM UTC 24 |
252998332 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_perf.2116634582 |
|
|
Sep 04 02:51:34 AM UTC 24 |
Sep 04 02:51:40 AM UTC 24 |
475252008 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.1053715512 |
|
|
Sep 04 02:51:31 AM UTC 24 |
Sep 04 02:51:42 AM UTC 24 |
1351499152 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.1730704715 |
|
|
Sep 04 02:51:23 AM UTC 24 |
Sep 04 02:51:43 AM UTC 24 |
1837738694 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.2135822278 |
|
|
Sep 04 02:51:38 AM UTC 24 |
Sep 04 02:51:43 AM UTC 24 |
301176365 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.1744185279 |
|
|
Sep 04 02:51:40 AM UTC 24 |
Sep 04 02:51:44 AM UTC 24 |
187688077 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.1171851608 |
|
|
Sep 04 02:51:38 AM UTC 24 |
Sep 04 02:51:44 AM UTC 24 |
2891817554 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.3816651549 |
|
|
Sep 04 02:51:37 AM UTC 24 |
Sep 04 02:51:44 AM UTC 24 |
1315267457 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_alert_test.3662748564 |
|
|
Sep 04 02:51:43 AM UTC 24 |
Sep 04 02:51:45 AM UTC 24 |
24119331 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.2729944454 |
|
|
Sep 04 02:51:41 AM UTC 24 |
Sep 04 02:51:45 AM UTC 24 |
6377901147 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.4277057807 |
|
|
Sep 04 02:51:42 AM UTC 24 |
Sep 04 02:51:46 AM UTC 24 |
129228090 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.1920654588 |
|
|
Sep 04 02:51:41 AM UTC 24 |
Sep 04 02:51:46 AM UTC 24 |
2145228288 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_override.1925877721 |
|
|
Sep 04 02:51:45 AM UTC 24 |
Sep 04 02:51:47 AM UTC 24 |
27026268 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.3564219714 |
|
|
Sep 04 02:51:42 AM UTC 24 |
Sep 04 02:51:48 AM UTC 24 |
482110536 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.539408950 |
|
|
Sep 04 02:51:46 AM UTC 24 |
Sep 04 02:51:49 AM UTC 24 |
162185780 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.2045016381 |
|
|
Sep 04 02:51:47 AM UTC 24 |
Sep 04 02:51:50 AM UTC 24 |
150728240 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.3710245573 |
|
|
Sep 04 02:51:11 AM UTC 24 |
Sep 04 02:51:51 AM UTC 24 |
1534889046 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.1868375512 |
|
|
Sep 04 02:51:40 AM UTC 24 |
Sep 04 02:51:52 AM UTC 24 |
473019186 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.312256695 |
|
|
Sep 04 02:51:46 AM UTC 24 |
Sep 04 02:51:56 AM UTC 24 |
157143361 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.1426859388 |
|
|
Sep 04 02:49:11 AM UTC 24 |
Sep 04 02:51:57 AM UTC 24 |
21885626690 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.264763648 |
|
|
Sep 04 02:52:04 AM UTC 24 |
Sep 04 02:52:06 AM UTC 24 |
197072923 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.3950751315 |
|
|
Sep 04 02:52:03 AM UTC 24 |
Sep 04 02:52:06 AM UTC 24 |
242474524 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.3366452837 |
|
|
Sep 04 02:51:56 AM UTC 24 |
Sep 04 02:52:09 AM UTC 24 |
3502756439 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.3051829344 |
|
|
Sep 04 02:51:55 AM UTC 24 |
Sep 04 02:52:09 AM UTC 24 |
611430136 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.1351427375 |
|
|
Sep 04 02:51:53 AM UTC 24 |
Sep 04 02:52:11 AM UTC 24 |
16685599900 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_bad_addr.2598650572 |
|
|
Sep 04 02:53:19 AM UTC 24 |
Sep 04 02:53:28 AM UTC 24 |
5144969514 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.2630932406 |
|
|
Sep 04 02:51:44 AM UTC 24 |
Sep 04 02:52:12 AM UTC 24 |
1443787153 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.1270772114 |
|
|
Sep 04 02:51:59 AM UTC 24 |
Sep 04 02:52:12 AM UTC 24 |
1355287681 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.3956071895 |
|
|
Sep 04 02:51:52 AM UTC 24 |
Sep 04 02:52:12 AM UTC 24 |
2568181338 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_perf.2512477602 |
|
|
Sep 04 02:52:07 AM UTC 24 |
Sep 04 02:52:13 AM UTC 24 |
438738674 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3924151025 |
|
|
Sep 04 02:52:07 AM UTC 24 |
Sep 04 02:52:13 AM UTC 24 |
764495729 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_hrst.3270163701 |
|
|
Sep 04 02:52:10 AM UTC 24 |
Sep 04 02:52:14 AM UTC 24 |
365626234 ps |
T277 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.1523617207 |
|
|
Sep 04 02:52:12 AM UTC 24 |
Sep 04 02:52:16 AM UTC 24 |
216443642 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.966657055 |
|
|
Sep 04 02:51:46 AM UTC 24 |
Sep 04 02:52:17 AM UTC 24 |
3987959036 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/38.i2c_host_perf.2666230235 |
|
|
Sep 04 02:48:45 AM UTC 24 |
Sep 04 02:52:17 AM UTC 24 |
12871748245 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.1207852716 |
|
|
Sep 04 02:52:12 AM UTC 24 |
Sep 04 02:52:18 AM UTC 24 |
206120858 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.4175031618 |
|
|
Sep 04 02:45:33 AM UTC 24 |
Sep 04 02:53:25 AM UTC 24 |
56781729694 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.1549712665 |
|
|
Sep 04 02:49:59 AM UTC 24 |
Sep 04 02:52:18 AM UTC 24 |
14126123841 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.3700399100 |
|
|
Sep 04 02:52:13 AM UTC 24 |
Sep 04 02:52:18 AM UTC 24 |
2132146973 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_alert_test.1456538819 |
|
|
Sep 04 02:52:17 AM UTC 24 |
Sep 04 02:52:19 AM UTC 24 |
44434142 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.546491613 |
|
|
Sep 04 02:52:12 AM UTC 24 |
Sep 04 02:52:19 AM UTC 24 |
2047406015 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.2785077537 |
|
|
Sep 04 02:52:13 AM UTC 24 |
Sep 04 02:52:19 AM UTC 24 |
3098971696 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.1138348094 |
|
|
Sep 04 02:52:15 AM UTC 24 |
Sep 04 02:52:19 AM UTC 24 |
1773860905 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_override.3627190103 |
|
|
Sep 04 02:52:18 AM UTC 24 |
Sep 04 02:52:20 AM UTC 24 |
29777640 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.1049320064 |
|
|
Sep 04 02:52:19 AM UTC 24 |
Sep 04 02:52:22 AM UTC 24 |
276468910 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2644926709 |
|
|
Sep 04 02:52:21 AM UTC 24 |
Sep 04 02:52:23 AM UTC 24 |
446308877 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.2902516143 |
|
|
Sep 04 02:50:35 AM UTC 24 |
Sep 04 02:52:26 AM UTC 24 |
80765126177 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.3046302552 |
|
|
Sep 04 02:52:20 AM UTC 24 |
Sep 04 02:52:27 AM UTC 24 |
178586693 ps |
T249 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.1683634163 |
|
|
Sep 04 02:52:12 AM UTC 24 |
Sep 04 02:52:28 AM UTC 24 |
2649201950 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.1133981180 |
|
|
Sep 04 02:52:21 AM UTC 24 |
Sep 04 02:52:32 AM UTC 24 |
2057416833 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.2440165429 |
|
|
Sep 04 02:51:16 AM UTC 24 |
Sep 04 02:52:34 AM UTC 24 |
3233355466 ps |
T133 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.775094697 |
|
|
Sep 04 02:41:44 AM UTC 24 |
Sep 04 02:52:34 AM UTC 24 |
72273425147 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.3370913826 |
|
|
Sep 04 02:52:29 AM UTC 24 |
Sep 04 02:52:36 AM UTC 24 |
952271558 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.3519293140 |
|
|
Sep 04 02:50:07 AM UTC 24 |
Sep 04 02:52:38 AM UTC 24 |
28899496468 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.2558606572 |
|
|
Sep 04 02:52:33 AM UTC 24 |
Sep 04 02:52:38 AM UTC 24 |
661543877 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.884026891 |
|
|
Sep 04 02:52:23 AM UTC 24 |
Sep 04 02:52:39 AM UTC 24 |
577028863 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.569392640 |
|
|
Sep 04 02:52:19 AM UTC 24 |
Sep 04 02:52:40 AM UTC 24 |
1427330120 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.45945672 |
|
|
Sep 04 02:52:39 AM UTC 24 |
Sep 04 02:52:41 AM UTC 24 |
151102399 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.4012673358 |
|
|
Sep 04 02:52:39 AM UTC 24 |
Sep 04 02:52:42 AM UTC 24 |
440093338 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_overflow.2876172226 |
|
|
Sep 04 02:51:45 AM UTC 24 |
Sep 04 02:52:43 AM UTC 24 |
17616887094 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2156580447 |
|
|
Sep 04 02:52:35 AM UTC 24 |
Sep 04 02:52:45 AM UTC 24 |
837935402 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.3504243600 |
|
|
Sep 04 02:52:37 AM UTC 24 |
Sep 04 02:52:45 AM UTC 24 |
5550648422 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.3605885810 |
|
|
Sep 04 02:52:18 AM UTC 24 |
Sep 04 02:52:46 AM UTC 24 |
1369856000 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_perf.1877572810 |
|
|
Sep 04 02:52:40 AM UTC 24 |
Sep 04 02:52:46 AM UTC 24 |
886808037 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.112686264 |
|
|
Sep 04 02:51:17 AM UTC 24 |
Sep 04 02:52:47 AM UTC 24 |
2439638253 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_mode_toggle.2901110836 |
|
|
Sep 04 02:52:43 AM UTC 24 |
Sep 04 02:52:48 AM UTC 24 |
330724743 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_hrst.175478146 |
|
|
Sep 04 02:52:42 AM UTC 24 |
Sep 04 02:52:48 AM UTC 24 |
719032002 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.296762139 |
|
|
Sep 04 02:52:46 AM UTC 24 |
Sep 04 02:52:49 AM UTC 24 |
158250379 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.3807408198 |
|
|
Sep 04 02:52:27 AM UTC 24 |
Sep 04 02:52:50 AM UTC 24 |
2972812042 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.2403944988 |
|
|
Sep 04 02:52:47 AM UTC 24 |
Sep 04 02:52:51 AM UTC 24 |
1390891170 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.1916709997 |
|
|
Sep 04 02:52:46 AM UTC 24 |
Sep 04 02:52:51 AM UTC 24 |
521148942 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.1444011636 |
|
|
Sep 04 02:52:42 AM UTC 24 |
Sep 04 02:52:52 AM UTC 24 |
5264280472 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_alert_test.2958251132 |
|
|
Sep 04 02:52:50 AM UTC 24 |
Sep 04 02:52:52 AM UTC 24 |
24519517 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.2530682772 |
|
|
Sep 04 02:52:49 AM UTC 24 |
Sep 04 02:52:52 AM UTC 24 |
751016176 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.2350516722 |
|
|
Sep 04 02:52:45 AM UTC 24 |
Sep 04 02:52:53 AM UTC 24 |
6506700253 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_override.1501087239 |
|
|
Sep 04 02:52:51 AM UTC 24 |
Sep 04 02:52:53 AM UTC 24 |
25081778 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.2524518711 |
|
|
Sep 04 02:52:48 AM UTC 24 |
Sep 04 02:52:54 AM UTC 24 |
2381638109 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.1309550136 |
|
|
Sep 04 02:52:48 AM UTC 24 |
Sep 04 02:52:55 AM UTC 24 |
2211390363 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.41795908 |
|
|
Sep 04 02:52:47 AM UTC 24 |
Sep 04 02:52:55 AM UTC 24 |
543544554 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.3954117544 |
|
|
Sep 04 02:52:54 AM UTC 24 |
Sep 04 02:52:56 AM UTC 24 |
354481584 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.694104213 |
|
|
Sep 04 02:52:57 AM UTC 24 |
Sep 04 02:53:02 AM UTC 24 |
293052124 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.1314517129 |
|
|
Sep 04 02:52:54 AM UTC 24 |
Sep 04 02:53:03 AM UTC 24 |
198069012 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_overflow.1882016626 |
|
|
Sep 04 02:52:19 AM UTC 24 |
Sep 04 02:53:03 AM UTC 24 |
2047388766 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/43.i2c_target_stress_all.2689414033 |
|
|
Sep 04 02:52:07 AM UTC 24 |
Sep 04 02:53:03 AM UTC 24 |
16172449150 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/35.i2c_host_perf.827137286 |
|
|
Sep 04 02:46:42 AM UTC 24 |
Sep 04 02:53:04 AM UTC 24 |
26458522282 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.1720525135 |
|
|
Sep 04 02:52:56 AM UTC 24 |
Sep 04 02:53:06 AM UTC 24 |
611039840 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_watermark.4035449406 |
|
|
Sep 04 02:51:14 AM UTC 24 |
Sep 04 02:53:08 AM UTC 24 |
17083561725 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.2095829765 |
|
|
Sep 04 02:53:06 AM UTC 24 |
Sep 04 02:53:08 AM UTC 24 |
191018453 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_stretch_timeout.1089747765 |
|
|
Sep 04 02:52:56 AM UTC 24 |
Sep 04 02:53:11 AM UTC 24 |
3241406361 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.1437536500 |
|
|
Sep 04 02:53:14 AM UTC 24 |
Sep 04 02:53:17 AM UTC 24 |
254843419 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.1630487211 |
|
|
Sep 04 02:53:07 AM UTC 24 |
Sep 04 02:53:18 AM UTC 24 |
1136362028 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_smoke.3394542489 |
|
|
Sep 04 02:52:51 AM UTC 24 |
Sep 04 02:53:18 AM UTC 24 |
7295425124 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.1001393863 |
|
|
Sep 04 02:53:17 AM UTC 24 |
Sep 04 02:53:19 AM UTC 24 |
201071346 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.1777400231 |
|
|
Sep 04 02:53:09 AM UTC 24 |
Sep 04 02:53:20 AM UTC 24 |
4804002374 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_perf.2831602108 |
|
|
Sep 04 02:52:20 AM UTC 24 |
Sep 04 02:53:21 AM UTC 24 |
26338985039 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.4248696356 |
|
|
Sep 04 02:52:54 AM UTC 24 |
Sep 04 02:53:22 AM UTC 24 |
447307127 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_hrst.3995486185 |
|
|
Sep 04 02:53:20 AM UTC 24 |
Sep 04 02:53:25 AM UTC 24 |
1763385095 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_acq.2053917466 |
|
|
Sep 04 02:53:23 AM UTC 24 |
Sep 04 02:53:28 AM UTC 24 |
2025130858 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.3431568303 |
|
|
Sep 04 02:49:21 AM UTC 24 |
Sep 04 02:53:28 AM UTC 24 |
4640988998 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_watermarks_tx.1786026787 |
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Sep 04 02:53:26 AM UTC 24 |
Sep 04 02:53:28 AM UTC 24 |
323478962 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_perf.2065615704 |
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Sep 04 02:53:18 AM UTC 24 |
Sep 04 02:53:28 AM UTC 24 |
2995624131 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_smbus_maxlen.2520051722 |
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Sep 04 02:53:26 AM UTC 24 |
Sep 04 02:53:30 AM UTC 24 |
471315576 ps |
T1565 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_alert_test.2018094710 |
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Sep 04 02:53:29 AM UTC 24 |
Sep 04 02:53:31 AM UTC 24 |
105057982 ps |
T1566 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/46.i2c_host_override.799444989 |
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Sep 04 02:53:31 AM UTC 24 |
Sep 04 02:53:33 AM UTC 24 |
27706211 ps |
T1567 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_full.1863917164 |
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Sep 04 02:52:20 AM UTC 24 |
Sep 04 02:53:33 AM UTC 24 |
10705733096 ps |
T1568 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_nack_txstretch.3473844831 |
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Sep 04 02:53:29 AM UTC 24 |
Sep 04 02:53:33 AM UTC 24 |
145008317 ps |
T1569 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull.2751837055 |
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Sep 04 02:53:28 AM UTC 24 |
Sep 04 02:53:34 AM UTC 24 |
441565611 ps |
T1570 |
/workspaces/repo/scratch/os_regression_2024_09_03/i2c-sim-vcs/coverage/default/45.i2c_target_nack_acqfull_addr.1886073005 |
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Sep 04 02:53:29 AM UTC 24 |
Sep 04 02:53:34 AM UTC 24 |
390917027 ps |