KEYMGR Simulation Results

Wednesday May 17 2023 07:05:42 UTC

GitHub Revision: `3df77bec1`

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 2320738200

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_smoke	35.100s	1.872ms	50	50	100.00
V1	random	keymgr_random	55.060s	5.014ms	50	50	100.00
V1	csr_hw_reset	keymgr_csr_hw_reset	1.380s	102.633us	5	5	100.00
V1	csr_rw	keymgr_csr_rw	1.450s	56.348us	19	20	95.00
V1	csr_bit_bash	keymgr_csr_bit_bash	15.270s	894.217us	5	5	100.00
V1	csr_aliasing	keymgr_csr_aliasing	16.020s	930.777us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_csr_mem_rw_with_rand_reset	1.990s	110.072us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_csr_rw	1.450s	56.348us	19	20	95.00
		keymgr_csr_aliasing	16.020s	930.777us	5	5	100.00
V1		TOTAL			154	155	99.35
V2	cfgen_during_op	keymgr_cfg_regwen	2.178m	10.227ms	49	50	98.00
V2	sideload	keymgr_sideload	32.190s	1.856ms	50	50	100.00
		keymgr_sideload_kmac	32.450s	2.493ms	50	50	100.00
		keymgr_sideload_aes	1.069m	6.978ms	50	50	100.00
		keymgr_sideload_otbn	35.790s	1.475ms	50	50	100.00
V2	direct_to_disabled_state	keymgr_direct_to_disabled	33.100s	4.805ms	50	50	100.00
V2	lc_disable	keymgr_lc_disable	13.350s	1.167ms	49	50	98.00
V2	kmac_error_response	keymgr_kmac_rsp_err	1.503m	4.536ms	48	50	96.00
V2	invalid_sw_input	keymgr_sw_invalid_input	1.197m	3.794ms	50	50	100.00
V2	invalid_hw_input	keymgr_hwsw_invalid_input	53.890s	24.097ms	50	50	100.00
V2	sync_async_fault_cross	keymgr_sync_async_fault_cross	21.940s	9.941ms	50	50	100.00
V2	stress_all	keymgr_stress_all	15.816m	33.809ms	49	50	98.00
V2	intr_test	keymgr_intr_test	1.060s	27.396us	50	50	100.00
V2	alert_test	keymgr_alert_test	1.230s	34.736us	50	50	100.00
V2	tl_d_oob_addr_access	keymgr_tl_errors	4.870s	519.154us	20	20	100.00
V2	tl_d_illegal_access	keymgr_tl_errors	4.870s	519.154us	20	20	100.00
V2	tl_d_outstanding_access	keymgr_csr_hw_reset	1.380s	102.633us	5	5	100.00
		keymgr_csr_rw	1.450s	56.348us	19	20	95.00
		keymgr_csr_aliasing	16.020s	930.777us	5	5	100.00
		keymgr_same_csr_outstanding	4.150s	1.916ms	20	20	100.00
V2	tl_d_partial_access	keymgr_csr_hw_reset	1.380s	102.633us	5	5	100.00
		keymgr_csr_rw	1.450s	56.348us	19	20	95.00
		keymgr_csr_aliasing	16.020s	930.777us	5	5	100.00
		keymgr_same_csr_outstanding	4.150s	1.916ms	20	20	100.00
V2		TOTAL			735	740	99.32
V2S	sec_cm_additional_check	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	tl_intg_err	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
		keymgr_tl_intg_err	28.650s	4.442ms	20	20	100.00
V2S	shadow_reg_update_error	keymgr_shadow_reg_errors	16.000s	645.002us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_shadow_reg_errors	16.000s	645.002us	20	20	100.00
V2S	shadow_reg_storage_error	keymgr_shadow_reg_errors	16.000s	645.002us	20	20	100.00
V2S	shadowed_reset_glitch	keymgr_shadow_reg_errors	16.000s	645.002us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_shadow_reg_errors_with_csr_rw	17.040s	1.978ms	20	20	100.00
V2S	prim_count_check	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	prim_fsm_check	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_bus_integrity	keymgr_tl_intg_err	28.650s	4.442ms	20	20	100.00
V2S	sec_cm_config_shadow	keymgr_shadow_reg_errors	16.000s	645.002us	20	20	100.00
V2S	sec_cm_op_config_regwen	keymgr_cfg_regwen	2.178m	10.227ms	49	50	98.00
V2S	sec_cm_reseed_config_regwen	keymgr_random	55.060s	5.014ms	50	50	100.00
		keymgr_csr_rw	1.450s	56.348us	19	20	95.00
V2S	sec_cm_sw_binding_config_regwen	keymgr_random	55.060s	5.014ms	50	50	100.00
		keymgr_csr_rw	1.450s	56.348us	19	20	95.00
V2S	sec_cm_max_key_ver_config_regwen	keymgr_random	55.060s	5.014ms	50	50	100.00
		keymgr_csr_rw	1.450s	56.348us	19	20	95.00
V2S	sec_cm_lc_ctrl_intersig_mubi	keymgr_lc_disable	13.350s	1.167ms	49	50	98.00
V2S	sec_cm_constants_consistency	keymgr_hwsw_invalid_input	53.890s	24.097ms	50	50	100.00
V2S	sec_cm_intersig_consistency	keymgr_hwsw_invalid_input	53.890s	24.097ms	50	50	100.00
V2S	sec_cm_hw_key_sw_noaccess	keymgr_random	55.060s	5.014ms	50	50	100.00
V2S	sec_cm_output_keys_ctrl_redun	keymgr_sideload_protect	35.280s	7.460ms	50	50	100.00
V2S	sec_cm_ctrl_fsm_sparse	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_data_fsm_sparse	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_local_esc	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_ctrl_fsm_consistency	keymgr_custom_cm	24.520s	2.982ms	50	50	100.00
V2S	sec_cm_ctrl_fsm_global_esc	keymgr_lc_disable	13.350s	1.167ms	49	50	98.00
V2S	sec_cm_ctrl_ctr_redun	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_kmac_if_fsm_sparse	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_kmac_if_ctr_redun	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_kmac_if_cmd_ctrl_consistency	keymgr_custom_cm	24.520s	2.982ms	50	50	100.00
V2S	sec_cm_kmac_if_done_ctrl_consistency	keymgr_custom_cm	24.520s	2.982ms	50	50	100.00
V2S	sec_cm_reseed_ctr_redun	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_side_load_sel_ctrl_consistency	keymgr_custom_cm	24.520s	2.982ms	50	50	100.00
V2S	sec_cm_sideload_ctrl_fsm_sparse	keymgr_sec_cm	45.420s	5.044ms	5	5	100.00
V2S	sec_cm_ctrl_key_integrity	keymgr_custom_cm	24.520s	2.982ms	50	50	100.00
V2S		TOTAL			165	165	100.00
V3	stress_all_with_rand_reset	keymgr_stress_all_with_rand_reset	17.450s	1.595ms	43	50	86.00
V3		TOTAL			43	50	86.00
		TOTAL			1097	1110	98.83

Testplan Progress

Items	Total	Written	Passing	Progress
V1	7	7	6	85.71
V2	16	16	12	75.00
V2S	6	6	6	100.00
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.85	99.09	98.13	98.57	100.00	99.08	98.38	91.71

Failure Buckets

UVM_ERROR (keymgr_scoreboard.sv:674) [scoreboard] Check failed item.d_data == addr_phase_op_status (* [*] vs * [*]) has 4 failures:

Test keymgr_stress_all_with_rand_reset has 4 failures.

1.keymgr_stress_all_with_rand_reset.3182853213
Line 1241, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/1.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 280600633 ps: (keymgr_scoreboard.sv:674) [uvm_test_top.env.scoreboard] Check failed item.d_data == addr_phase_op_status (1 [0x1] vs 2 [0x2])
  UVM_INFO @ 280600633 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.keymgr_stress_all_with_rand_reset.148471603
Line 741, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/6.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 380948245 ps: (keymgr_scoreboard.sv:674) [uvm_test_top.env.scoreboard] Check failed item.d_data == addr_phase_op_status (1 [0x1] vs 2 [0x2])
  UVM_INFO @ 380948245 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_ERROR (cip_base_scoreboard.sv:281) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* has 2 failures:

Test keymgr_lc_disable has 1 failures.

2.keymgr_lc_disable.2786878390
Line 354, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/2.keymgr_lc_disable/latest/run.log

  UVM_ERROR @  38735167 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
  UVM_INFO @  38735167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test keymgr_stress_all has 1 failures.

48.keymgr_stress_all.4145570818
Line 1953, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/48.keymgr_stress_all/latest/run.log

  UVM_ERROR @ 1926591406 ps: (cip_base_scoreboard.sv:281) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:2000
  UVM_INFO @ 1926591406 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_ERROR (keymgr_scoreboard.sv:1012) [scoreboard] Check failed act != exp (* [*] vs * [*]) cdi_type: Attestation has 2 failures:

Test keymgr_kmac_rsp_err has 2 failures.

6.keymgr_kmac_rsp_err.3454249326
Line 311, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/6.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @ 271569481 ps: (keymgr_scoreboard.sv:1012) [uvm_test_top.env.scoreboard] Check failed act != exp (6411941049107734521161834261377090820080854115535926994059999276154968756972751035339650544624903597921458914585264788622110605830994792400004698443674395217161681932011320363353877923678195925041428238386376191173612932949789728451160812262739298690514584683807338099564987253152544697312024834155636326690632554346714294313810510088143350840666293616928246675935323146072295680427843297903043721351265217791269767780887416 [0xe7bcb367b2a497062ebf16072b2d0eb008f932d417e600c04db44bdbe6f144d13a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78] vs 6411941049107734521161834261377090820080854115535926994059999276154968756972751035339650544624903597921458914585264788622110605830994792400004698443674395217161681932011320363353877923678195925041428238386376191173612932949789728451160812262739298690514584683807338099564987253152544697312024834155636326690632554346714294313810510088143350840666293616928246675935323146072295680427843297903043721351265217791269767780887416 [0xe7bcb367b2a497062ebf16072b2d0eb008f932d417e600c04db44bdbe6f144d13a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9000000000000000000000000000000000000000000000000000000000000f0f000000000000000005cfbd765ce33f34ea20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507fa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78]) cdi_type: Attestation
  
   DiversificationKey act: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78, exp: 0xfa365df52da48cd752fb3a026a8e608f0098cfe5fa9810494829d0cd9479eb78
   RomDigest act: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507, exp: 0xa20a046cf42e6eac560a3f82bfa76285b5c1d4aea7c915e49a32d1c89be0f507
   HealthMeasurement act: 0x5cfbd765ce33f34e, exp: 0x5cfbd765ce33f34e

39.keymgr_kmac_rsp_err.680566046
Line 356, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/39.keymgr_kmac_rsp_err/latest/run.log

  UVM_ERROR @ 870028152 ps: (keymgr_scoreboard.sv:1012) [uvm_test_top.env.scoreboard] Check failed act != exp (531179149905415165881207908637481400838461145716424040802047628387911507971554508011873948209868936660807401083310529101242853977650014371650239899706053616879864371132013784772183849530761168888277266297791746524205615626824655485055355751315236626628151140785806399619014689274829351045666203510701447888764690925399826815548222180123812277888151595503204332985079887074638829387717511446735406927558227416429748572705868 [0x1332965a3aa4315b7cd4c242697e782ff72d763540792a32eb0a0269c95ade193a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f960d7730ff64553292f826d16d068a665b8bc545f8ef8f2d426bae41d3c7273a484ffebd625e20e1a45c5c710672c9ac702298151c12169b226699abcbcf7d25785b90e5fd8af4d766812dcb205dd97af772d79457fdf9f61e05f225f71fa8b707834bc827d193c0a51d0ecbac300d44c] vs 531179149905415165881207908637481400838461145716424040802047628387911507971554508011873948209868936660807401083310529101242853977650014371650239899706053616879864371132013784772183849530761168888277266297791746524205615626824655485055355751315236626628151140785806399619014689274829351045666203510701447888764690925399826815548222180123812277888151595503204332985079887074638829387717511446735406927558227416429748572705868 [0x1332965a3aa4315b7cd4c242697e782ff72d763540792a32eb0a0269c95ade193a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f960d7730ff64553292f826d16d068a665b8bc545f8ef8f2d426bae41d3c7273a484ffebd625e20e1a45c5c710672c9ac702298151c12169b226699abcbcf7d25785b90e5fd8af4d766812dcb205dd97af772d79457fdf9f61e05f225f71fa8b707834bc827d193c0a51d0ecbac300d44c]) cdi_type: Attestation
  
   DiversificationKey act: 0x772d79457fdf9f61e05f225f71fa8b707834bc827d193c0a51d0ecbac300d44c, exp: 0x772d79457fdf9f61e05f225f71fa8b707834bc827d193c0a51d0ecbac300d44c
   RomDigest act: 0x2298151c12169b226699abcbcf7d25785b90e5fd8af4d766812dcb205dd97af, exp: 0x2298151c12169b226699abcbcf7d25785b90e5fd8af4d766812dcb205dd97af
   HealthMeasurement act: 0x84ffebd625e20e1a45c5c710672c9ac7, exp: 0x84ffebd625e20e1a45c5c710672c9ac7

UVM_ERROR (keymgr_scoreboard.sv:1010) [scoreboard] Check failed act == exp (* [*] vs * [*]) cdi_type: Attestation has 2 failures:

Test keymgr_stress_all_with_rand_reset has 2 failures.

20.keymgr_stress_all_with_rand_reset.478256016
Line 1292, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/20.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 257158867 ps: (keymgr_scoreboard.sv:1010) [uvm_test_top.env.scoreboard] Check failed act == exp (2975323165609322269186316308850563812935786743248845390356997050262110859513954709949014767427007526077663843064723739510226995535186939934675518068010202587289818977421092714457377530660315492599825637772487268692635251324158209850741337870227177721302096770610346950853347380695829200905130293370993584750203663182443797568396882095809489068760601795062048789953219267787276419141273181034849050914435776560466022574002571 [0x6b8859917eb286b0df772a17ea4bf74ccca1c0ca9cfafc35ecc689390b0228323a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f915df37c21929fe6b397b257495e832d7f18fd104b9384235bee02611d6531739e0bdd5c9538d8d2a04b15ab0fbc975f9f611f18384ff760e4d230d3fe63702cf14e4a82e4f2aeab8b1908ac472be4d3bbb1f792ce6a52b1753b97d657ab4a6714a8a206471a6472f9a6e3efddb33118b] vs 40443792289956539368158906356862043375267862775282162294415648313973694343193506082140092988929453522773575717312055359314514786818042291339217677304182250811933716945528098971991848436943404387854771824586419085602710001672569021116904664212710339660930745008737492224163294961469810743575450824465147015511851941955796238401810558319482180216882453225631595622380107843276514248799996990278354614068895670510099518132619 [0x17631e764019f00d26067a977c73e6a3ccdbe30eff74a604561a459a1586ebd3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f915df37c21929fe6b397b257495e832d7f18fd104b9384235bee02611d6531739e0bdd5c9538d8d2a04b15ab0fbc975f9f611f18384ff760e4d230d3fe63702cf14e4a82e4f2aeab8b1908ac472be4d3bbb1f792ce6a52b1753b97d657ab4a6714a8a206471a6472f9a6e3efddb33118b]) cdi_type: Attestation
  
   DiversificationKey act: 0xbb1f792ce6a52b1753b97d657ab4a6714a8a206471a6472f9a6e3efddb33118b, exp: 0xbb1f792ce6a52b1753b97d657ab4a6714a8a206471a6472f9a6e3efddb33118b
   RomDigest act: 0xf611f18384ff760e4d230d3fe63702cf14e4a82e4f2aeab8b1908ac472be4d3b, exp: 0xf611f18384ff760e4d230d3fe63702cf14e4a82e4f2aeab8b1908ac472be4d3b
   HealthMeasurement act: 0xe0bdd5c9538d8d2a04b15ab0fbc975f9, exp: 0xe0bdd5c9538d8d2a04b15ab0fbc975f9

32.keymgr_stress_all_with_rand_reset.3699566728
Line 1327, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/32.keymgr_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1529884272 ps: (keymgr_scoreboard.sv:1010) [uvm_test_top.env.scoreboard] Check failed act == exp (6418779722776580620234235009558206248211839736633607507687839060830794089516387890324344776000330764823024268201598024386108531699125252674738494838115230689353355580298498514426798640188380767074901511845883697448457723434244807019240254489316245396297389265794327937139729872908263284434279596516390883210157685706413481027583315761519196171215234123988828178124794556074371019753529527650325964658888316217916296510574194 [0xe7fbf946273ee928435d6cb1e8d388eb2eb5c10f022f6ec5a62aa9b6c025e6053a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9284a244d1234793e6b1c4226abdedf0f8148831893ab4dcfbad789b649639367c0fee4ad68b7c5c7783ab45cd7688cf082097aa50b833c675805f2fc172bf039a005d465f8a9af4018e81acd6533ecd4d65a5522af62e50094586b3c69596c47d935d1203819bf4433dc042f20b80e72] vs 4424647626188261633605860177703974807163077626757466221010472807404198412875772089889722674808979888395940413895790704279015861430257993816251154392284953982903682741823636328716737694724582207034445571268220063061671092445470596125990677890639656096186576805144554896889364965584967292966207107074910570731334403682748550149125988005253128781435966347709488842125971469262959784256378188038783241021549390442971920321744498 [0x9fe9d23dd8c6d1c46a57362575a29534600e5515185d004a73ae2a3cfc1be47e3a0a6d73cd50897de4d744bd65ebdb3837ea77087d878651c517c18a5742b2f9284a244d1234793e6b1c4226abdedf0f8148831893ab4dcfbad789b649639367c0fee4ad68b7c5c7783ab45cd7688cf082097aa50b833c675805f2fc172bf039a005d465f8a9af4018e81acd6533ecd4d65a5522af62e50094586b3c69596c47d935d1203819bf4433dc042f20b80e72]) cdi_type: Attestation
  
   DiversificationKey act: 0xd65a5522af62e50094586b3c69596c47d935d1203819bf4433dc042f20b80e72, exp: 0xd65a5522af62e50094586b3c69596c47d935d1203819bf4433dc042f20b80e72
   RomDigest act: 0x82097aa50b833c675805f2fc172bf039a005d465f8a9af4018e81acd6533ecd4, exp: 0x82097aa50b833c675805f2fc172bf039a005d465f8a9af4018e81acd6533ecd4
   HealthMeasurement act: 0xc0fee4ad68b7c5c7783ab45cd7688cf0, exp: 0xc0fee4ad68b7c5c7783ab45cd7688cf0

UVM_ERROR (keymgr_scoreboard.sv:736) [scoreboard] Check failed item.d_data !=gmv(csr) (* [] vs * [])` has 1 failures:
- Test keymgr_stress_all_with_rand_reset has 1 failures.
  - 11.keymgr_stress_all_with_rand_reset.1628190312
    Line 812, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/11.keymgr_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 116444747 ps: (keymgr_scoreboard.sv:736) [uvm_test_top.env.scoreboard] Check failed item.d_data != `gmv(csr) (1711819663 [0x66084b8f] vs 1711819663 [0x66084b8f])
  UVM_INFO @ 116444747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Job keymgr-sim-vcs_run_cover_reg_top killed due to: Exit reason: Submit error: generic::out_of_range: The scheduling requirements for the job cannot be met: CPU: *, RAM: *, disk: *. Please work with the project contact (['opentitan-dev+eda@google.com']) to request machines that can run this job. has 1 failures:
- Test keymgr_csr_rw has 1 failures.
  - 12.keymgr_csr_rw.2801001819
    Log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/12.keymgr_csr_rw/latest/run.log
```
  Job ID: smart:a6c416d4-78ca-4501-bfff-06b3f912c7c9
```
UVM_ERROR (keymgr_scoreboard.sv:750) [scoreboard] Check failed item.d_data ==gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.start` has 1 failures:
- Test keymgr_cfg_regwen has 1 failures.
  - 45.keymgr_cfg_regwen.32522777
    Line 382, in log /container/opentitan-public/scratch/os_regression/keymgr-sim-vcs/45.keymgr_cfg_regwen/latest/run.log
```
  UVM_ERROR @  17131706 ps: (keymgr_scoreboard.sv:750) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (0 [0x0] vs 1 [0x1]) reg name: keymgr_reg_block.start
  UVM_INFO @  17131706 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```