Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
97.93	95.95	97.85	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	28534144	9762	0	0
attest_sw_binding_0_rd_A	28534144	2908	0	0
attest_sw_binding_1_rd_A	28534144	2768	0	0
attest_sw_binding_2_rd_A	28534144	2960	0	0
attest_sw_binding_3_rd_A	28534144	2968	0	0
attest_sw_binding_4_rd_A	28534144	2923	0	0
attest_sw_binding_5_rd_A	28534144	2886	0	0
attest_sw_binding_6_rd_A	28534144	2815	0	0
attest_sw_binding_7_rd_A	28534144	2931	0	0
intr_enable_rd_A	28534144	3547	0	0
key_version_rd_A	28534144	2890	0	0
max_creator_key_ver_regwen_rd_A	28534144	2762	0	0
max_owner_int_key_ver_regwen_rd_A	28534144	2791	0	0
max_owner_key_ver_regwen_rd_A	28534144	2892	0	0
reseed_interval_regwen_rd_A	28534144	3026	0	0
salt_0_rd_A	28534144	2992	0	0
salt_1_rd_A	28534144	2989	0	0
salt_2_rd_A	28534144	2815	0	0
salt_3_rd_A	28534144	2895	0	0
salt_4_rd_A	28534144	2893	0	0
salt_5_rd_A	28534144	2907	0	0
salt_6_rd_A	28534144	2864	0	0
salt_7_rd_A	28534144	2852	0	0
sealing_sw_binding_0_rd_A	28534144	3031	0	0
sealing_sw_binding_1_rd_A	28534144	2914	0	0
sealing_sw_binding_2_rd_A	28534144	2857	0	0
sealing_sw_binding_3_rd_A	28534144	2955	0	0
sealing_sw_binding_4_rd_A	28534144	2794	0	0
sealing_sw_binding_5_rd_A	28534144	3003	0	0
sealing_sw_binding_6_rd_A	28534144	2876	0	0
sealing_sw_binding_7_rd_A	28534144	2879	0	0
sideload_clear_rd_A	28534144	2970	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	9762	0	0
T5	0	95	0	0
T23	42160	0	0	0
T26	5154	0	0	0
T35	25163	0	0	0
T47	36336	139	0	0
T50	9431	0	0	0
T58	0	188	0	0
T69	0	22	0	0
T115	0	54	0	0
T116	0	211	0	0
T123	8038	0	0	0
T130	0	99	0	0
T131	0	234	0	0
T132	0	48	0	0
T133	7422	0	0	0
T134	11611	0	0	0
T135	1997	0	0	0
T136	6417	0	0	0
T138	0	44	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2908	0	0
T69	32318	26	0	0
T118	0	97	0	0
T121	0	54	0	0
T126	0	69	0	0
T130	0	30	0	0
T131	0	20	0	0
T132	0	38	0	0
T138	0	35	0	0
T144	0	7	0	0
T162	0	106	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2768	0	0
T69	32318	36	0	0
T118	0	66	0	0
T121	0	51	0	0
T126	0	46	0	0
T130	0	21	0	0
T131	0	17	0	0
T132	0	21	0	0
T138	0	30	0	0
T144	0	9	0	0
T162	0	69	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2960	0	0
T69	32318	47	0	0
T118	0	103	0	0
T121	0	71	0	0
T126	0	48	0	0
T130	0	26	0	0
T131	0	39	0	0
T132	0	20	0	0
T138	0	23	0	0
T144	0	18	0	0
T162	0	73	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2968	0	0
T69	32318	22	0	0
T118	0	80	0	0
T121	0	64	0	0
T126	0	76	0	0
T130	0	48	0	0
T131	0	23	0	0
T132	0	20	0	0
T138	0	8	0	0
T144	0	12	0	0
T162	0	77	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2923	0	0
T69	32318	41	0	0
T118	0	109	0	0
T121	0	44	0	0
T126	0	72	0	0
T130	0	24	0	0
T131	0	20	0	0
T132	0	16	0	0
T138	0	28	0	0
T144	0	6	0	0
T162	0	71	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2886	0	0
T69	32318	37	0	0
T118	0	85	0	0
T121	0	58	0	0
T126	0	58	0	0
T130	0	23	0	0
T131	0	26	0	0
T132	0	36	0	0
T138	0	25	0	0
T144	0	8	0	0
T162	0	82	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2815	0	0
T69	32318	16	0	0
T118	0	96	0	0
T121	0	50	0	0
T126	0	47	0	0
T130	0	26	0	0
T131	0	8	0	0
T132	0	47	0	0
T138	0	15	0	0
T144	0	7	0	0
T162	0	66	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2931	0	0
T69	32318	27	0	0
T118	0	93	0	0
T121	0	56	0	0
T126	0	53	0	0
T130	0	31	0	0
T131	0	34	0	0
T132	0	25	0	0
T138	0	21	0	0
T144	0	6	0	0
T162	0	81	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	3547	0	0
T47	36336	0	0	0
T50	9431	0	0	0
T65	0	5	0	0
T69	0	45	0	0
T70	0	27	0	0
T75	0	5	0	0
T87	72247	60	0	0
T88	8498	0	0	0
T89	3078	0	0	0
T90	7822	0	0	0
T130	0	51	0	0
T133	7422	0	0	0
T134	11611	0	0	0
T135	1997	0	0	0
T136	6417	0	0	0
T198	0	15	0	0
T199	0	15	0	0
T200	0	43	0	0
T201	0	8	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2890	0	0
T69	32318	28	0	0
T118	0	78	0	0
T121	0	40	0	0
T126	0	68	0	0
T130	0	26	0	0
T131	0	45	0	0
T132	0	25	0	0
T138	0	33	0	0
T144	0	4	0	0
T162	0	73	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2762	0	0
T69	32318	15	0	0
T118	0	77	0	0
T121	0	33	0	0
T126	0	39	0	0
T130	0	25	0	0
T131	0	53	0	0
T132	0	13	0	0
T138	0	23	0	0
T144	0	14	0	0
T162	0	74	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2791	0	0
T69	32318	35	0	0
T118	0	94	0	0
T121	0	27	0	0
T126	0	66	0	0
T130	0	66	0	0
T131	0	33	0	0
T132	0	35	0	0
T138	0	24	0	0
T144	0	8	0	0
T162	0	51	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2892	0	0
T69	32318	21	0	0
T118	0	114	0	0
T121	0	57	0	0
T126	0	62	0	0
T130	0	21	0	0
T131	0	25	0	0
T132	0	29	0	0
T138	0	20	0	0
T144	0	16	0	0
T162	0	117	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	3026	0	0
T69	32318	12	0	0
T118	0	90	0	0
T121	0	51	0	0
T126	0	83	0	0
T130	0	37	0	0
T131	0	18	0	0
T132	0	20	0	0
T138	0	25	0	0
T144	0	17	0	0
T162	0	71	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2992	0	0
T69	32318	33	0	0
T118	0	106	0	0
T121	0	43	0	0
T126	0	37	0	0
T130	0	34	0	0
T131	0	29	0	0
T132	0	27	0	0
T138	0	37	0	0
T144	0	3	0	0
T162	0	71	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2989	0	0
T69	32318	22	0	0
T118	0	85	0	0
T121	0	80	0	0
T126	0	37	0	0
T130	0	28	0	0
T131	0	17	0	0
T132	0	16	0	0
T138	0	32	0	0
T144	0	9	0	0
T162	0	82	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2815	0	0
T69	32318	23	0	0
T118	0	105	0	0
T121	0	73	0	0
T126	0	37	0	0
T130	0	16	0	0
T131	0	27	0	0
T132	0	11	0	0
T138	0	26	0	0
T144	0	7	0	0
T162	0	72	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2895	0	0
T69	32318	21	0	0
T118	0	86	0	0
T121	0	61	0	0
T126	0	56	0	0
T130	0	21	0	0
T131	0	25	0	0
T132	0	20	0	0
T138	0	8	0	0
T144	0	14	0	0
T162	0	72	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2893	0	0
T69	32318	33	0	0
T118	0	101	0	0
T121	0	43	0	0
T126	0	51	0	0
T130	0	27	0	0
T131	0	14	0	0
T132	0	21	0	0
T138	0	21	0	0
T144	0	4	0	0
T162	0	78	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2907	0	0
T69	32318	30	0	0
T118	0	104	0	0
T121	0	45	0	0
T126	0	76	0	0
T130	0	48	0	0
T131	0	20	0	0
T132	0	40	0	0
T138	0	24	0	0
T144	0	11	0	0
T162	0	77	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2864	0	0
T69	32318	19	0	0
T118	0	89	0	0
T121	0	58	0	0
T126	0	44	0	0
T130	0	27	0	0
T131	0	38	0	0
T132	0	30	0	0
T138	0	24	0	0
T144	0	6	0	0
T162	0	86	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2852	0	0
T69	32318	34	0	0
T118	0	99	0	0
T121	0	44	0	0
T126	0	80	0	0
T130	0	33	0	0
T131	0	46	0	0
T132	0	17	0	0
T138	0	19	0	0
T144	0	14	0	0
T162	0	76	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	3031	0	0
T69	32318	37	0	0
T118	0	99	0	0
T121	0	52	0	0
T126	0	44	0	0
T130	0	30	0	0
T131	0	10	0	0
T132	0	24	0	0
T138	0	30	0	0
T144	0	8	0	0
T162	0	79	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2914	0	0
T69	32318	24	0	0
T118	0	100	0	0
T121	0	44	0	0
T126	0	52	0	0
T130	0	39	0	0
T131	0	37	0	0
T132	0	27	0	0
T138	0	21	0	0
T144	0	9	0	0
T162	0	79	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2857	0	0
T69	32318	19	0	0
T118	0	110	0	0
T121	0	49	0	0
T126	0	48	0	0
T130	0	43	0	0
T131	0	19	0	0
T132	0	13	0	0
T138	0	21	0	0
T144	0	10	0	0
T162	0	59	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2955	0	0
T69	32318	26	0	0
T118	0	113	0	0
T121	0	29	0	0
T126	0	45	0	0
T130	0	39	0	0
T131	0	22	0	0
T132	0	19	0	0
T138	0	34	0	0
T144	0	13	0	0
T162	0	82	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2794	0	0
T69	32318	26	0	0
T118	0	101	0	0
T121	0	51	0	0
T126	0	54	0	0
T130	0	11	0	0
T131	0	31	0	0
T132	0	30	0	0
T138	0	33	0	0
T144	0	12	0	0
T162	0	73	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	3003	0	0
T69	32318	18	0	0
T118	0	98	0	0
T126	0	57	0	0
T130	0	21	0	0
T131	0	23	0	0
T132	0	20	0	0
T138	0	23	0	0
T144	0	8	0	0
T162	0	87	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0
T202	0	3	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2876	0	0
T69	32318	21	0	0
T118	0	105	0	0
T121	0	78	0	0
T126	0	57	0	0
T130	0	27	0	0
T131	0	29	0	0
T132	0	22	0	0
T138	0	25	0	0
T144	0	11	0	0
T162	0	98	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2879	0	0
T69	32318	20	0	0
T118	0	76	0	0
T121	0	68	0	0
T126	0	70	0	0
T130	0	33	0	0
T131	0	17	0	0
T132	0	20	0	0
T138	0	17	0	0
T144	0	15	0	0
T162	0	89	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	28534144	2970	0	0
T69	32318	34	0	0
T118	0	93	0	0
T126	0	69	0	0
T130	0	40	0	0
T131	0	35	0	0
T132	0	13	0	0
T138	0	27	0	0
T144	0	6	0	0
T162	0	58	0	0
T189	17489	0	0	0
T190	24494	0	0	0
T191	21028	0	0	0
T192	4702	0	0	0
T193	187411	0	0	0
T194	4697	0	0	0
T195	3336	0	0	0
T196	5438	0	0	0
T197	73828	0	0	0
T203	0	3	0	0