Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.04	95.95	98.39	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	27340823	11441	0	0
attest_sw_binding_0_rd_A	27340823	3766	0	0
attest_sw_binding_1_rd_A	27340823	3454	0	0
attest_sw_binding_2_rd_A	27340823	3373	0	0
attest_sw_binding_3_rd_A	27340823	3720	0	0
attest_sw_binding_4_rd_A	27340823	3485	0	0
attest_sw_binding_5_rd_A	27340823	3503	0	0
attest_sw_binding_6_rd_A	27340823	3368	0	0
attest_sw_binding_7_rd_A	27340823	3443	0	0
intr_enable_rd_A	27340823	4155	0	0
key_version_rd_A	27340823	3506	0	0
max_creator_key_ver_regwen_rd_A	27340823	3515	0	0
max_owner_int_key_ver_regwen_rd_A	27340823	3402	0	0
max_owner_key_ver_regwen_rd_A	27340823	3522	0	0
reseed_interval_regwen_rd_A	27340823	3507	0	0
salt_0_rd_A	27340823	3500	0	0
salt_1_rd_A	27340823	3549	0	0
salt_2_rd_A	27340823	3531	0	0
salt_3_rd_A	27340823	3545	0	0
salt_4_rd_A	27340823	3664	0	0
salt_5_rd_A	27340823	3789	0	0
salt_6_rd_A	27340823	3697	0	0
salt_7_rd_A	27340823	3527	0	0
sealing_sw_binding_0_rd_A	27340823	3519	0	0
sealing_sw_binding_1_rd_A	27340823	3795	0	0
sealing_sw_binding_2_rd_A	27340823	3493	0	0
sealing_sw_binding_3_rd_A	27340823	3617	0	0
sealing_sw_binding_4_rd_A	27340823	3626	0	0
sealing_sw_binding_5_rd_A	27340823	3441	0	0
sealing_sw_binding_6_rd_A	27340823	3646	0	0
sealing_sw_binding_7_rd_A	27340823	3599	0	0
sideload_clear_rd_A	27340823	3620	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	11441	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T61	0	187	0	0
T65	0	365	0	0
T88	47673	344	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T127	0	74	0	0
T139	0	33	0	0
T140	0	28	0	0
T141	0	717	0	0
T142	0	235	0	0
T143	0	23	0	0
T204	0	1	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3766	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	37	0	0
T88	47673	36	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	53	0	0
T159	0	6	0	0
T160	0	2	0	0
T161	0	38	0	0
T166	0	73	0	0
T176	0	84	0	0
T177	0	68	0	0
T205	0	24	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3454	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	19	0	0
T88	47673	28	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	48	0	0
T159	0	3	0	0
T160	0	7	0	0
T166	0	80	0	0
T176	0	54	0	0
T177	0	70	0	0
T205	0	18	0	0
T206	0	5	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3373	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	35	0	0
T88	47673	14	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	35	0	0
T160	0	4	0	0
T161	0	38	0	0
T166	0	82	0	0
T176	0	45	0	0
T177	0	57	0	0
T205	0	18	0	0
T207	0	3	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3720	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	35	0	0
T88	47673	31	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	60	0	0
T159	0	19	0	0
T160	0	2	0	0
T161	0	14	0	0
T166	0	84	0	0
T176	0	56	0	0
T177	0	76	0	0
T205	0	38	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3485	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	47	0	0
T88	47673	21	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	29	0	0
T159	0	5	0	0
T160	0	1	0	0
T161	0	31	0	0
T166	0	82	0	0
T176	0	58	0	0
T177	0	72	0	0
T205	0	25	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3503	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	41	0	0
T88	47673	27	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	30	0	0
T159	0	23	0	0
T160	0	5	0	0
T161	0	38	0	0
T166	0	86	0	0
T176	0	49	0	0
T177	0	69	0	0
T205	0	35	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3368	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	44	0	0
T88	47673	43	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	50	0	0
T159	0	13	0	0
T160	0	1	0	0
T161	0	19	0	0
T166	0	76	0	0
T176	0	53	0	0
T177	0	71	0	0
T205	0	22	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3443	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	33	0	0
T88	47673	16	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	51	0	0
T159	0	19	0	0
T160	0	6	0	0
T161	0	23	0	0
T166	0	72	0	0
T176	0	58	0	0
T177	0	90	0	0
T205	0	13	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	4155	0	0
T24	21130	0	0	0
T36	4804	0	0	0
T51	3413	0	0	0
T52	14532	0	0	0
T65	0	48	0	0
T66	0	10	0	0
T67	5646	0	0	0
T77	0	10	0	0
T88	0	24	0	0
T114	75895	35	0	0
T176	0	109	0	0
T177	0	51	0	0
T208	0	77	0	0
T209	0	46	0	0
T210	0	23	0	0
T211	1904	0	0	0
T212	1282	0	0	0
T213	79298	0	0	0
T214	4162	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3506	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	41	0	0
T88	47673	35	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	64	0	0
T159	0	23	0	0
T160	0	9	0	0
T161	0	86	0	0
T166	0	88	0	0
T176	0	58	0	0
T177	0	69	0	0
T205	0	26	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3515	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	23	0	0
T88	47673	24	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	35	0	0
T159	0	3	0	0
T160	0	4	0	0
T161	0	33	0	0
T166	0	95	0	0
T176	0	44	0	0
T177	0	70	0	0
T205	0	35	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3402	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	30	0	0
T88	47673	34	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	57	0	0
T159	0	4	0	0
T161	0	37	0	0
T162	0	30	0	0
T166	0	73	0	0
T176	0	63	0	0
T177	0	38	0	0
T205	0	22	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3522	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	37	0	0
T88	47673	56	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	64	0	0
T159	0	7	0	0
T160	0	1	0	0
T161	0	44	0	0
T166	0	48	0	0
T176	0	68	0	0
T177	0	46	0	0
T205	0	26	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3507	0	0
T7	13724	0	0	0
T49	9650	0	0	0
T63	12717	6	0	0
T64	7880	0	0	0
T65	0	36	0	0
T70	64212	0	0	0
T88	0	42	0	0
T99	14803	0	0	0
T128	0	67	0	0
T159	0	41	0	0
T160	0	3	0	0
T176	0	54	0	0
T177	0	59	0	0
T205	0	31	0	0
T215	0	6	0	0
T216	8180	0	0	0
T217	4805	0	0	0
T218	6098	0	0	0
T219	7754	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3500	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	24	0	0
T88	47673	19	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	99	0	0
T159	0	17	0	0
T160	0	5	0	0
T161	0	44	0	0
T166	0	69	0	0
T176	0	73	0	0
T177	0	61	0	0
T205	0	25	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3549	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	37	0	0
T88	47673	25	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	67	0	0
T159	0	25	0	0
T160	0	6	0	0
T161	0	16	0	0
T166	0	69	0	0
T176	0	41	0	0
T177	0	43	0	0
T205	0	13	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3531	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	33	0	0
T88	47673	20	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	74	0	0
T159	0	2	0	0
T160	0	8	0	0
T161	0	57	0	0
T166	0	79	0	0
T176	0	53	0	0
T177	0	59	0	0
T205	0	19	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3545	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	27	0	0
T88	47673	31	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	100	0	0
T159	0	9	0	0
T160	0	2	0	0
T161	0	15	0	0
T166	0	75	0	0
T176	0	52	0	0
T177	0	55	0	0
T205	0	25	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3664	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	40	0	0
T88	47673	14	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	49	0	0
T159	0	21	0	0
T160	0	2	0	0
T161	0	35	0	0
T166	0	63	0	0
T176	0	63	0	0
T177	0	75	0	0
T205	0	23	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3789	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	66	0	0
T88	47673	24	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	69	0	0
T159	0	42	0	0
T160	0	3	0	0
T161	0	63	0	0
T166	0	74	0	0
T176	0	57	0	0
T177	0	41	0	0
T205	0	35	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3697	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	29	0	0
T88	47673	37	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	68	0	0
T159	0	38	0	0
T160	0	3	0	0
T161	0	57	0	0
T166	0	79	0	0
T176	0	60	0	0
T177	0	70	0	0
T205	0	24	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3527	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	38	0	0
T88	47673	17	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	73	0	0
T159	0	9	0	0
T160	0	8	0	0
T161	0	14	0	0
T166	0	78	0	0
T176	0	69	0	0
T177	0	46	0	0
T205	0	19	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3519	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	39	0	0
T88	47673	28	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	68	0	0
T159	0	35	0	0
T160	0	3	0	0
T161	0	66	0	0
T166	0	78	0	0
T176	0	47	0	0
T177	0	39	0	0
T205	0	18	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3795	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	35	0	0
T88	47673	33	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	51	0	0
T159	0	23	0	0
T160	0	8	0	0
T161	0	80	0	0
T166	0	82	0	0
T176	0	51	0	0
T177	0	39	0	0
T205	0	29	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3493	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	20	0	0
T88	47673	42	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	60	0	0
T159	0	31	0	0
T160	0	3	0	0
T161	0	46	0	0
T166	0	70	0	0
T176	0	82	0	0
T177	0	65	0	0
T205	0	28	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3617	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	19	0	0
T88	47673	37	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	59	0	0
T159	0	40	0	0
T160	0	1	0	0
T161	0	36	0	0
T166	0	82	0	0
T176	0	47	0	0
T177	0	61	0	0
T205	0	26	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3626	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	37	0	0
T88	47673	40	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	60	0	0
T159	0	13	0	0
T160	0	7	0	0
T161	0	22	0	0
T166	0	63	0	0
T176	0	41	0	0
T177	0	55	0	0
T205	0	28	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3441	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	41	0	0
T88	47673	21	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	51	0	0
T159	0	13	0	0
T160	0	2	0	0
T161	0	32	0	0
T166	0	84	0	0
T176	0	58	0	0
T177	0	58	0	0
T205	0	35	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3646	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	39	0	0
T88	47673	22	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	96	0	0
T159	0	10	0	0
T160	0	1	0	0
T161	0	46	0	0
T166	0	84	0	0
T176	0	48	0	0
T177	0	45	0	0
T205	0	27	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3599	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	47	0	0
T88	47673	26	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	85	0	0
T159	0	39	0	0
T160	0	6	0	0
T161	0	33	0	0
T166	0	68	0	0
T176	0	59	0	0
T177	0	55	0	0
T205	0	17	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	27340823	3620	0	0
T6	38792	0	0	0
T59	11102	0	0	0
T65	0	34	0	0
T88	47673	48	0	0
T89	46269	0	0	0
T90	7824	0	0	0
T117	3777	0	0	0
T118	3115	0	0	0
T119	2027	0	0	0
T120	7374	0	0	0
T121	93898	0	0	0
T128	0	47	0	0
T159	0	15	0	0
T160	0	3	0	0
T166	0	82	0	0
T176	0	66	0	0
T177	0	70	0	0
T205	0	32	0	0
T220	0	6	0	0