Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	21397268	13185	0	0
attest_sw_binding_0_rd_A	21397268	2439	0	0
attest_sw_binding_1_rd_A	21397268	2494	0	0
attest_sw_binding_2_rd_A	21397268	2563	0	0
attest_sw_binding_3_rd_A	21397268	2348	0	0
attest_sw_binding_4_rd_A	21397268	2472	0	0
attest_sw_binding_5_rd_A	21397268	2417	0	0
attest_sw_binding_6_rd_A	21397268	2466	0	0
attest_sw_binding_7_rd_A	21397268	2463	0	0
intr_enable_rd_A	21397268	2859	0	0
key_version_rd_A	21397268	2460	0	0
max_creator_key_ver_regwen_rd_A	21397268	2321	0	0
max_owner_int_key_ver_regwen_rd_A	21397268	2266	0	0
max_owner_key_ver_regwen_rd_A	21397268	2414	0	0
reseed_interval_regwen_rd_A	21397268	2473	0	0
salt_0_rd_A	21397268	2406	0	0
salt_1_rd_A	21397268	2429	0	0
salt_2_rd_A	21397268	2439	0	0
salt_3_rd_A	21397268	2424	0	0
salt_4_rd_A	21397268	2535	0	0
salt_5_rd_A	21397268	2470	0	0
salt_6_rd_A	21397268	2545	0	0
salt_7_rd_A	21397268	2437	0	0
sealing_sw_binding_0_rd_A	21397268	2376	0	0
sealing_sw_binding_1_rd_A	21397268	2522	0	0
sealing_sw_binding_2_rd_A	21397268	2407	0	0
sealing_sw_binding_3_rd_A	21397268	2494	0	0
sealing_sw_binding_4_rd_A	21397268	2565	0	0
sealing_sw_binding_5_rd_A	21397268	2560	0	0
sealing_sw_binding_6_rd_A	21397268	2503	0	0
sealing_sw_binding_7_rd_A	21397268	2352	0	0
sideload_clear_rd_A	21397268	2439	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	13185	0	0
T33	39825	35	0	0
T34	4902	0	0	0
T42	0	68	0	0
T44	4685	0	0	0
T45	10513	0	0	0
T50	0	62	0	0
T51	8046	0	0	0
T61	0	750	0	0
T85	18674	0	0	0
T86	12056	0	0	0
T106	0	87	0	0
T117	5319	0	0	0
T122	0	55	0	0
T123	0	21	0	0
T124	0	308	0	0
T125	0	162	0	0
T126	13487	0	0	0
T127	2332	0	0	0
T154	0	153	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2439	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	51	0	0
T115	0	37	0	0
T122	0	55	0	0
T123	0	25	0	0
T125	0	27	0	0
T147	0	12	0	0
T157	0	268	0	0
T179	0	38	0	0
T180	0	44	0	0
T181	0	29	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2494	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	59	0	0
T115	0	31	0	0
T122	0	41	0	0
T123	0	27	0	0
T125	0	29	0	0
T147	0	3	0	0
T157	0	242	0	0
T179	0	18	0	0
T180	0	34	0	0
T181	0	26	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2563	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	63	0	0
T122	0	46	0	0
T123	0	23	0	0
T125	0	66	0	0
T147	0	10	0	0
T157	0	259	0	0
T179	0	24	0	0
T180	0	40	0	0
T181	0	20	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	3	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2348	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	63	0	0
T122	0	44	0	0
T123	0	31	0	0
T125	0	37	0	0
T147	0	5	0	0
T157	0	216	0	0
T179	0	51	0	0
T180	0	29	0	0
T181	0	27	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	10	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2472	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	64	0	0
T115	0	36	0	0
T122	0	49	0	0
T123	0	23	0	0
T125	0	24	0	0
T147	0	8	0	0
T157	0	232	0	0
T179	0	27	0	0
T180	0	34	0	0
T181	0	27	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2417	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	55	0	0
T122	0	53	0	0
T123	0	14	0	0
T125	0	30	0	0
T147	0	4	0	0
T157	0	227	0	0
T179	0	45	0	0
T180	0	30	0	0
T181	0	21	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2466	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	55	0	0
T122	0	71	0	0
T123	0	34	0	0
T125	0	19	0	0
T147	0	12	0	0
T157	0	268	0	0
T179	0	49	0	0
T180	0	27	0	0
T181	0	36	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	1	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2463	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	53	0	0
T122	0	38	0	0
T123	0	12	0	0
T125	0	31	0	0
T157	0	241	0	0
T179	0	22	0	0
T180	0	18	0	0
T181	0	40	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	6	0	0
T189	0	1	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2859	0	0
T5	234907	11	0	0
T7	0	17	0	0
T38	10009	0	0	0
T57	0	7	0	0
T58	54041	0	0	0
T106	0	73	0	0
T122	0	80	0	0
T123	0	22	0	0
T125	0	51	0	0
T141	2693	0	0	0
T179	0	61	0	0
T190	0	32	0	0
T191	0	19	0	0
T192	2469	0	0	0
T193	16053	0	0	0
T194	6795	0	0	0
T195	91179	0	0	0
T196	19478	0	0	0
T197	12259	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2460	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	56	0	0
T122	0	75	0	0
T123	0	32	0	0
T125	0	20	0	0
T147	0	9	0	0
T157	0	278	0	0
T179	0	28	0	0
T180	0	35	0	0
T181	0	37	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	1	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2321	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	68	0	0
T122	0	60	0	0
T123	0	20	0	0
T125	0	21	0	0
T147	0	13	0	0
T157	0	233	0	0
T179	0	17	0	0
T180	0	36	0	0
T181	0	22	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	11	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2266	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	49	0	0
T115	0	37	0	0
T122	0	42	0	0
T123	0	38	0	0
T125	0	27	0	0
T147	0	14	0	0
T157	0	239	0	0
T179	0	45	0	0
T180	0	30	0	0
T181	0	44	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2414	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	70	0	0
T122	0	57	0	0
T123	0	32	0	0
T125	0	15	0	0
T147	0	11	0	0
T157	0	251	0	0
T179	0	18	0	0
T180	0	20	0	0
T181	0	39	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2473	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	67	0	0
T122	0	54	0	0
T123	0	28	0	0
T125	0	42	0	0
T147	0	6	0	0
T157	0	257	0	0
T179	0	29	0	0
T180	0	41	0	0
T181	0	53	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	2	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2406	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	29	0	0
T122	0	44	0	0
T123	0	13	0	0
T125	0	18	0	0
T147	0	2	0	0
T157	0	223	0	0
T179	0	40	0	0
T180	0	34	0	0
T181	0	26	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2429	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	52	0	0
T115	0	23	0	0
T116	0	48	0	0
T122	0	52	0	0
T123	0	33	0	0
T125	0	15	0	0
T157	0	282	0	0
T179	0	39	0	0
T180	0	48	0	0
T181	0	14	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2439	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	63	0	0
T122	0	75	0	0
T123	0	26	0	0
T125	0	42	0	0
T147	0	4	0	0
T157	0	249	0	0
T179	0	31	0	0
T180	0	33	0	0
T181	0	21	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2424	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	47	0	0
T122	0	56	0	0
T123	0	15	0	0
T125	0	38	0	0
T147	0	16	0	0
T157	0	230	0	0
T179	0	32	0	0
T180	0	34	0	0
T181	0	50	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	6	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2535	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	49	0	0
T115	0	28	0	0
T122	0	39	0	0
T123	0	29	0	0
T125	0	38	0	0
T147	0	8	0	0
T157	0	272	0	0
T179	0	12	0	0
T180	0	21	0	0
T181	0	16	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2470	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	62	0	0
T122	0	76	0	0
T123	0	20	0	0
T125	0	37	0	0
T157	0	227	0	0
T179	0	30	0	0
T180	0	17	0	0
T181	0	62	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	2	0	0
T198	0	1	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2545	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	64	0	0
T122	0	79	0	0
T123	0	37	0	0
T125	0	21	0	0
T147	0	10	0	0
T157	0	228	0	0
T179	0	46	0	0
T180	0	32	0	0
T181	0	27	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	10	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2437	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	78	0	0
T122	0	18	0	0
T123	0	35	0	0
T125	0	49	0	0
T147	0	9	0	0
T157	0	269	0	0
T179	0	22	0	0
T180	0	26	0	0
T181	0	41	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	4	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2376	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	65	0	0
T115	0	47	0	0
T122	0	52	0	0
T123	0	27	0	0
T125	0	43	0	0
T147	0	10	0	0
T157	0	310	0	0
T179	0	26	0	0
T180	0	14	0	0
T181	0	21	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2522	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	70	0	0
T122	0	33	0	0
T123	0	27	0	0
T125	0	48	0	0
T147	0	9	0	0
T157	0	274	0	0
T179	0	40	0	0
T180	0	21	0	0
T181	0	40	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	3	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2407	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	62	0	0
T122	0	57	0	0
T123	0	24	0	0
T125	0	50	0	0
T147	0	9	0	0
T157	0	230	0	0
T179	0	27	0	0
T180	0	21	0	0
T181	0	39	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	2	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2494	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	58	0	0
T122	0	53	0	0
T123	0	28	0	0
T125	0	11	0	0
T147	0	7	0	0
T157	0	252	0	0
T179	0	35	0	0
T180	0	12	0	0
T181	0	10	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	3	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2565	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	53	0	0
T122	0	28	0	0
T123	0	39	0	0
T125	0	21	0	0
T147	0	3	0	0
T157	0	245	0	0
T179	0	56	0	0
T180	0	38	0	0
T181	0	13	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T199	0	1	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2560	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	57	0	0
T122	0	72	0	0
T123	0	35	0	0
T125	0	35	0	0
T147	0	7	0	0
T157	0	274	0	0
T179	0	31	0	0
T180	0	27	0	0
T181	0	20	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	19	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2503	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	30	0	0
T122	0	50	0	0
T123	0	33	0	0
T125	0	24	0	0
T147	0	11	0	0
T157	0	214	0	0
T179	0	26	0	0
T180	0	32	0	0
T181	0	23	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	8	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2352	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	74	0	0
T122	0	41	0	0
T123	0	26	0	0
T125	0	39	0	0
T147	0	3	0	0
T157	0	271	0	0
T179	0	13	0	0
T180	0	23	0	0
T181	0	39	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	21397268	2439	0	0
T35	10739	0	0	0
T59	5874	0	0	0
T71	6134	0	0	0
T106	59164	50	0	0
T122	0	47	0	0
T123	0	32	0	0
T125	0	41	0	0
T147	0	14	0	0
T157	0	264	0	0
T179	0	17	0	0
T180	0	23	0	0
T181	0	43	0	0
T182	44424	0	0	0
T183	7380	0	0	0
T184	2978	0	0	0
T185	3380	0	0	0
T186	5226	0	0	0
T187	5844	0	0	0
T188	0	9	0	0