Unified Coverage Report :: Module :: keymgr_csr_assert_fpv

Module : keymgr_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_22/keymgr-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_keymgr_csr_assert_0/keymgr_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.keymgr_csr_assert	100.00						100.00

---

Module Instance : tb.dut.keymgr_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.05	96.00	98.36	99.96		95.92	100.00	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : keymgr_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	32	32	100.00	32	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	32	32	100.00	32	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	22491082	17650	0	0
attest_sw_binding_0_rd_A	22491082	3177	0	0
attest_sw_binding_1_rd_A	22491082	3291	0	0
attest_sw_binding_2_rd_A	22491082	3089	0	0
attest_sw_binding_3_rd_A	22491082	3148	0	0
attest_sw_binding_4_rd_A	22491082	3165	0	0
attest_sw_binding_5_rd_A	22491082	3239	0	0
attest_sw_binding_6_rd_A	22491082	3324	0	0
attest_sw_binding_7_rd_A	22491082	3325	0	0
intr_enable_rd_A	22491082	3883	0	0
key_version_rd_A	22491082	3338	0	0
max_creator_key_ver_regwen_rd_A	22491082	3125	0	0
max_owner_int_key_ver_regwen_rd_A	22491082	3403	0	0
max_owner_key_ver_regwen_rd_A	22491082	3245	0	0
reseed_interval_regwen_rd_A	22491082	3166	0	0
salt_0_rd_A	22491082	3205	0	0
salt_1_rd_A	22491082	3221	0	0
salt_2_rd_A	22491082	3319	0	0
salt_3_rd_A	22491082	3174	0	0
salt_4_rd_A	22491082	3159	0	0
salt_5_rd_A	22491082	3269	0	0
salt_6_rd_A	22491082	3200	0	0
salt_7_rd_A	22491082	3328	0	0
sealing_sw_binding_0_rd_A	22491082	3159	0	0
sealing_sw_binding_1_rd_A	22491082	3341	0	0
sealing_sw_binding_2_rd_A	22491082	2926	0	0
sealing_sw_binding_3_rd_A	22491082	3522	0	0
sealing_sw_binding_4_rd_A	22491082	3222	0	0
sealing_sw_binding_5_rd_A	22491082	3164	0	0
sealing_sw_binding_6_rd_A	22491082	3238	0	0
sealing_sw_binding_7_rd_A	22491082	3212	0	0
sideload_clear_rd_A	22491082	3330	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	17650	0	0
T21	1210	0	0	0
T25	30415	0	0	0
T47	9723	0	0	0
T59	898	0	0	0
T62	36359	676	0	0
T63	0	177	0	0
T69	0	390	0	0
T70	71508	0	0	0
T74	13471	0	0	0
T75	83426	0	0	0
T76	7077	0	0	0
T77	0	20	0	0
T87	0	419	0	0
T88	0	284	0	0
T89	0	537	0	0
T90	0	1065	0	0
T91	0	1019	0	0
T95	5333	0	0	0
T97	0	59	0	0

attest_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3177	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	43	0	0
T79	0	183	0	0
T82	0	41	0	0
T107	4013	0	0	0
T114	0	18	0	0
T117	0	34	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T175	0	66	0	0
T188	0	14	0	0
T189	0	42	0	0
T190	0	41	0	0
T191	0	6	0	0
T192	12182	0	0	0

attest_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3291	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	34	0	0
T79	0	160	0	0
T82	0	46	0	0
T107	4013	0	0	0
T114	0	4	0	0
T117	0	15	0	0
T118	0	4	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	38	0	0
T189	0	46	0	0
T190	0	34	0	0
T191	0	4	0	0
T192	12182	0	0	0

attest_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3089	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	25	0	0
T79	0	186	0	0
T82	0	17	0	0
T107	4013	0	0	0
T117	0	26	0	0
T118	0	3	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	4	0	0
T175	0	86	0	0
T188	0	17	0	0
T189	0	28	0	0
T190	0	46	0	0
T192	12182	0	0	0

attest_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3148	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	26	0	0
T79	0	193	0	0
T82	0	36	0	0
T107	4013	0	0	0
T114	0	38	0	0
T117	0	17	0	0
T118	0	3	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	21	0	0
T189	0	36	0	0
T190	0	86	0	0
T191	0	7	0	0
T192	12182	0	0	0

attest_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3165	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	21	0	0
T82	0	39	0	0
T107	4013	0	0	0
T114	0	11	0	0
T117	0	23	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	4	0	0
T188	0	16	0	0
T189	0	23	0	0
T190	0	40	0	0
T191	0	4	0	0
T192	12182	0	0	0
T193	0	7	0	0

attest_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3239	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	23	0	0
T82	0	55	0	0
T107	4013	0	0	0
T114	0	2	0	0
T117	0	19	0	0
T118	0	5	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	1	0	0
T188	0	21	0	0
T189	0	62	0	0
T190	0	51	0	0
T191	0	3	0	0
T192	12182	0	0	0

attest_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3324	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	40	0	0
T79	0	216	0	0
T82	0	29	0	0
T107	4013	0	0	0
T114	0	10	0	0
T117	0	6	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	6	0	0
T188	0	21	0	0
T189	0	42	0	0
T190	0	47	0	0
T192	12182	0	0	0

attest_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3325	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	37	0	0
T79	0	187	0	0
T82	0	26	0	0
T107	4013	0	0	0
T114	0	8	0	0
T117	0	26	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T175	0	95	0	0
T188	0	28	0	0
T189	0	33	0	0
T190	0	60	0	0
T191	0	3	0	0
T192	12182	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3883	0	0
T13	40415	0	0	0
T68	22189	23	0	0
T71	1783	0	0	0
T77	32343	56	0	0
T106	3964	0	0	0
T108	0	40	0	0
T129	0	34	0	0
T140	2013	0	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	73	0	0
T194	0	37	0	0
T195	0	25	0	0
T196	0	13	0	0
T197	0	68	0	0
T198	0	33	0	0
T199	3213	0	0	0

key_version_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3338	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	39	0	0
T79	0	191	0	0
T82	0	22	0	0
T107	4013	0	0	0
T114	0	16	0	0
T117	0	16	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	4	0	0
T188	0	32	0	0
T189	0	48	0	0
T190	0	87	0	0
T192	12182	0	0	0

max_creator_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3125	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	25	0	0
T79	0	168	0	0
T82	0	45	0	0
T107	4013	0	0	0
T114	0	5	0	0
T117	0	13	0	0
T118	0	6	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	13	0	0
T189	0	39	0	0
T190	0	59	0	0
T191	0	4	0	0
T192	12182	0	0	0

max_owner_int_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3403	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	36	0	0
T79	0	195	0	0
T82	0	45	0	0
T107	4013	0	0	0
T114	0	2	0	0
T117	0	34	0	0
T118	0	7	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	27	0	0
T189	0	29	0	0
T190	0	50	0	0
T191	0	1	0	0
T192	12182	0	0	0

max_owner_key_ver_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3245	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	34	0	0
T82	0	24	0	0
T107	4013	0	0	0
T114	0	26	0	0
T117	0	2	0	0
T118	0	1	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	9	0	0
T188	0	35	0	0
T189	0	36	0	0
T190	0	60	0	0
T191	0	8	0	0
T192	12182	0	0	0

reseed_interval_regwen_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3166	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	46	0	0
T82	0	31	0	0
T107	4013	0	0	0
T114	0	32	0	0
T117	0	6	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	7	0	0
T188	0	19	0	0
T189	0	56	0	0
T190	0	62	0	0
T191	0	2	0	0
T192	12182	0	0	0

salt_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3205	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	33	0	0
T82	0	28	0	0
T107	4013	0	0	0
T114	0	8	0	0
T117	0	8	0	0
T118	0	4	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	1	0	0
T188	0	16	0	0
T189	0	34	0	0
T190	0	51	0	0
T191	0	1	0	0
T192	12182	0	0	0

salt_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3221	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	16	0	0
T79	0	209	0	0
T82	0	21	0	0
T107	4013	0	0	0
T117	0	24	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	5	0	0
T175	0	88	0	0
T188	0	28	0	0
T189	0	22	0	0
T190	0	47	0	0
T191	0	9	0	0
T192	12182	0	0	0

salt_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3319	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	24	0	0
T82	0	45	0	0
T107	4013	0	0	0
T114	0	3	0	0
T117	0	26	0	0
T118	0	7	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	3	0	0
T188	0	51	0	0
T189	0	30	0	0
T190	0	47	0	0
T191	0	1	0	0
T192	12182	0	0	0

salt_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3174	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	13	0	0
T79	0	182	0	0
T82	0	44	0	0
T107	4013	0	0	0
T114	0	4	0	0
T117	0	37	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	3	0	0
T188	0	22	0	0
T189	0	23	0	0
T190	0	68	0	0
T191	0	7	0	0
T192	12182	0	0	0

salt_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3159	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	34	0	0
T79	0	192	0	0
T82	0	14	0	0
T107	4013	0	0	0
T114	0	14	0	0
T117	0	24	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	18	0	0
T189	0	32	0	0
T190	0	50	0	0
T191	0	3	0	0
T192	12182	0	0	0

salt_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3269	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	34	0	0
T79	0	194	0	0
T82	0	21	0	0
T107	4013	0	0	0
T114	0	29	0	0
T117	0	24	0	0
T118	0	8	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	21	0	0
T189	0	43	0	0
T190	0	64	0	0
T191	0	1	0	0
T192	12182	0	0	0

salt_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3200	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	29	0	0
T79	0	192	0	0
T82	0	50	0	0
T107	4013	0	0	0
T114	0	22	0	0
T117	0	19	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	17	0	0
T189	0	40	0	0
T190	0	36	0	0
T191	0	10	0	0
T192	12182	0	0	0

salt_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3328	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	33	0	0
T79	0	231	0	0
T82	0	15	0	0
T107	4013	0	0	0
T114	0	1	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	9	0	0
T188	0	22	0	0
T189	0	51	0	0
T190	0	66	0	0
T191	0	4	0	0
T192	12182	0	0	0

sealing_sw_binding_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3159	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	32	0	0
T82	0	31	0	0
T107	4013	0	0	0
T114	0	3	0	0
T117	0	21	0	0
T118	0	3	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	1	0	0
T188	0	9	0	0
T189	0	30	0	0
T190	0	53	0	0
T191	0	6	0	0
T192	12182	0	0	0

sealing_sw_binding_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3341	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	26	0	0
T82	0	24	0	0
T107	4013	0	0	0
T114	0	18	0	0
T117	0	22	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	7	0	0
T188	0	22	0	0
T189	0	63	0	0
T190	0	58	0	0
T191	0	8	0	0
T192	12182	0	0	0
T200	0	3	0	0

sealing_sw_binding_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	2926	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	39	0	0
T82	0	23	0	0
T107	4013	0	0	0
T114	0	6	0	0
T117	0	8	0	0
T118	0	1	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	24	0	0
T189	0	24	0	0
T190	0	56	0	0
T191	0	5	0	0
T192	12182	0	0	0
T201	0	1	0	0

sealing_sw_binding_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3522	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	33	0	0
T82	0	12	0	0
T107	4013	0	0	0
T114	0	19	0	0
T117	0	50	0	0
T118	0	2	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	6	0	0
T188	0	37	0	0
T189	0	39	0	0
T190	0	57	0	0
T191	0	3	0	0
T192	12182	0	0	0

sealing_sw_binding_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3222	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	23	0	0
T82	0	32	0	0
T107	4013	0	0	0
T114	0	9	0	0
T117	0	23	0	0
T118	0	5	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	7	0	0
T188	0	19	0	0
T189	0	32	0	0
T190	0	46	0	0
T191	0	8	0	0
T192	12182	0	0	0

sealing_sw_binding_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3164	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	29	0	0
T79	0	217	0	0
T82	0	40	0	0
T107	4013	0	0	0
T114	0	17	0	0
T118	0	5	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T157	0	5	0	0
T188	0	24	0	0
T189	0	22	0	0
T190	0	50	0	0
T191	0	6	0	0
T192	12182	0	0	0

sealing_sw_binding_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3238	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	22	0	0
T79	0	175	0	0
T82	0	22	0	0
T107	4013	0	0	0
T114	0	14	0	0
T117	0	29	0	0
T118	0	3	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	16	0	0
T189	0	34	0	0
T190	0	51	0	0
T191	0	3	0	0
T192	12182	0	0	0

sealing_sw_binding_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3212	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	28	0	0
T79	0	178	0	0
T82	0	25	0	0
T107	4013	0	0	0
T114	0	13	0	0
T117	0	2	0	0
T118	0	4	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T188	0	34	0	0
T189	0	62	0	0
T190	0	65	0	0
T191	0	2	0	0
T192	12182	0	0	0

sideload_clear_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	22491082	3330	0	0
T13	40415	0	0	0
T26	5059	0	0	0
T28	8640	0	0	0
T71	1783	0	0	0
T77	32343	28	0	0
T79	0	219	0	0
T82	0	14	0	0
T107	4013	0	0	0
T114	0	8	0	0
T117	0	46	0	0
T148	15366	0	0	0
T149	7847	0	0	0
T150	39709	0	0	0
T175	0	93	0	0
T188	0	25	0	0
T189	0	30	0	0
T190	0	48	0	0
T191	0	6	0	0
T192	12182	0	0	0