Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4848

1

T3

6

T4

2

T15

2

auto[1]

2404

1

T15

8

T16

2

T17

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	232	1			T19	2		T56	2		T111	2
auto[134217728:268435455]	226	1			T17	2		T44	2		T57	4
auto[268435456:402653183]	198	1			T4	2		T16	2		T27	2
auto[402653184:536870911]	288	1			T20	4		T56	2		T47	2
auto[536870912:671088639]	224	1			T35	4		T20	2		T57	2
auto[671088640:805306367]	208	1			T15	2		T20	2		T57	2
auto[805306368:939524095]	204	1			T16	2		T20	2		T57	2
auto[939524096:1073741823]	224	1			T201	2		T38	2		T89	2
auto[1073741824:1207959551]	230	1			T3	2		T19	2		T117	2
auto[1207959552:1342177279]	240	1			T15	2		T44	2		T117	2
auto[1342177280:1476395007]	216	1			T15	2		T86	2		T57	2
auto[1476395008:1610612735]	226	1			T16	2		T35	2		T117	2
auto[1610612736:1744830463]	250	1			T44	2		T5	2		T199	2
auto[1744830464:1879048191]	202	1			T27	2		T57	2		T97	2
auto[1879048192:2013265919]	250	1			T35	2		T115	2		T57	2
auto[2013265920:2147483647]	234	1			T16	2		T44	2		T86	2
auto[2147483648:2281701375]	240	1			T35	2		T142	2		T97	2
auto[2281701376:2415919103]	210	1			T15	2		T115	2		T117	2
auto[2415919104:2550136831]	208	1			T16	2		T19	2		T35	6
auto[2550136832:2684354559]	190	1			T30	2		T57	2		T87	2
auto[2684354560:2818572287]	224	1			T15	2		T27	2		T57	2
auto[2818572288:2952790015]	198	1			T27	2		T56	2		T257	4
auto[2952790016:3087007743]	232	1			T30	2		T57	4		T21	2
auto[3087007744:3221225471]	218	1			T27	2		T57	2		T206	2
auto[3221225472:3355443199]	220	1			T17	2		T115	2		T59	2
auto[3355443200:3489660927]	230	1			T19	2		T35	2		T116	2
auto[3489660928:3623878655]	236	1			T117	2		T57	2		T21	2
auto[3623878656:3758096383]	238	1			T3	2		T27	2		T57	4
auto[3758096384:3892314111]	226	1			T56	2		T5	2		T8	2
auto[3892314112:4026531839]	230	1			T3	2		T16	2		T17	2
auto[4026531840:4160749567]	264	1			T117	2		T36	2		T56	2
auto[4160749568:4294967295]	236	1			T35	2		T44	2		T115	4

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	136	1			T198	2		T325	2		T71	2
auto[0:134217727]	auto[1]	96	1			T19	2		T56	2		T111	2
auto[134217728:268435455]	auto[0]	148	1			T17	2		T44	2		T57	2
auto[134217728:268435455]	auto[1]	78	1			T57	2		T198	2		T447	2
auto[268435456:402653183]	auto[0]	132	1			T4	2		T16	2		T36	2
auto[268435456:402653183]	auto[1]	66	1			T27	2		T447	2		T451	2
auto[402653184:536870911]	auto[0]	188	1			T20	4		T56	2		T187	2
auto[402653184:536870911]	auto[1]	100	1			T47	2		T38	2		T73	2
auto[536870912:671088639]	auto[0]	154	1			T35	4		T57	2		T88	2
auto[536870912:671088639]	auto[1]	70	1			T20	2		T59	2		T97	2
auto[671088640:805306367]	auto[0]	140	1			T15	2		T5	2		T206	2
auto[671088640:805306367]	auto[1]	68	1			T20	2		T57	2		T201	2
auto[805306368:939524095]	auto[0]	138	1			T16	2		T20	2		T57	2
auto[805306368:939524095]	auto[1]	66	1			T142	2		T28	2		T345	2
auto[939524096:1073741823]	auto[0]	148	1			T201	2		T38	2		T89	2
auto[939524096:1073741823]	auto[1]	76	1			T22	2		T447	2		T50	2
auto[1073741824:1207959551]	auto[0]	150	1			T3	2		T19	2		T117	2
auto[1073741824:1207959551]	auto[1]	80	1			T111	2		T282	2		T128	2
auto[1207959552:1342177279]	auto[0]	176	1			T44	2		T117	2		T88	2
auto[1207959552:1342177279]	auto[1]	64	1			T15	2		T5	2		T8	2
auto[1342177280:1476395007]	auto[0]	150	1			T86	2		T57	2		T87	2
auto[1342177280:1476395007]	auto[1]	66	1			T15	2		T111	2		T136	2
auto[1476395008:1610612735]	auto[0]	152	1			T35	2		T117	2		T282	2
auto[1476395008:1610612735]	auto[1]	74	1			T16	2		T25	2		T132	2
auto[1610612736:1744830463]	auto[0]	162	1			T44	2		T199	2		T47	2
auto[1610612736:1744830463]	auto[1]	88	1			T5	2		T49	2		T140	2
auto[1744830464:1879048191]	auto[0]	148	1			T27	2		T57	2		T97	2
auto[1744830464:1879048191]	auto[1]	54	1			T247	2		T208	2		T198	2
auto[1879048192:2013265919]	auto[0]	170	1			T115	2		T57	2		T5	2
auto[1879048192:2013265919]	auto[1]	80	1			T35	2		T5	2		T206	2
auto[2013265920:2147483647]	auto[0]	160	1			T16	2		T44	2		T36	2
auto[2013265920:2147483647]	auto[1]	74	1			T86	2		T47	2		T48	2
auto[2147483648:2281701375]	auto[0]	158	1			T142	2		T97	2		T188	2
auto[2147483648:2281701375]	auto[1]	82	1			T35	2		T111	2		T69	2
auto[2281701376:2415919103]	auto[0]	136	1			T115	2		T117	2		T27	2
auto[2281701376:2415919103]	auto[1]	74	1			T15	2		T247	2		T50	2
auto[2415919104:2550136831]	auto[0]	154	1			T16	2		T19	2		T35	6
auto[2415919104:2550136831]	auto[1]	54	1			T116	2		T6	2		T53	2
auto[2550136832:2684354559]	auto[0]	128	1			T30	2		T57	2		T87	2
auto[2550136832:2684354559]	auto[1]	62	1			T111	2		T47	2		T42	2
auto[2684354560:2818572287]	auto[0]	146	1			T57	2		T72	2		T203	2
auto[2684354560:2818572287]	auto[1]	78	1			T15	2		T27	2		T447	2
auto[2818572288:2952790015]	auto[0]	126	1			T27	2		T56	2		T257	2
auto[2818572288:2952790015]	auto[1]	72	1			T257	2		T188	2		T50	2
auto[2952790016:3087007743]	auto[0]	148	1			T30	2		T57	4		T21	2
auto[2952790016:3087007743]	auto[1]	84	1			T47	4		T270	2		T132	2
auto[3087007744:3221225471]	auto[0]	142	1			T27	2		T57	2		T206	2
auto[3087007744:3221225471]	auto[1]	76	1			T253	2		T28	2		T50	2
auto[3221225472:3355443199]	auto[0]	160	1			T17	2		T115	2		T59	2
auto[3221225472:3355443199]	auto[1]	60	1			T107	2		T53	2		T141	2
auto[3355443200:3489660927]	auto[0]	168	1			T19	2		T87	2		T88	4
auto[3355443200:3489660927]	auto[1]	62	1			T35	2		T116	2		T142	2
auto[3489660928:3623878655]	auto[0]	164	1			T117	2		T57	2		T21	2
auto[3489660928:3623878655]	auto[1]	72	1			T247	2		T94	2		T138	2
auto[3623878656:3758096383]	auto[0]	156	1			T3	2		T57	2		T282	2
auto[3623878656:3758096383]	auto[1]	82	1			T27	2		T57	2		T5	2
auto[3758096384:3892314111]	auto[0]	156	1			T56	2		T5	2		T47	4
auto[3758096384:3892314111]	auto[1]	70	1			T8	2		T25	2		T141	2
auto[3892314112:4026531839]	auto[0]	132	1			T3	2		T16	2		T35	2
auto[3892314112:4026531839]	auto[1]	98	1			T17	2		T36	2		T8	2
auto[4026531840:4160749567]	auto[0]	160	1			T36	2		T57	2		T5	2
auto[4026531840:4160749567]	auto[1]	104	1			T117	2		T56	2		T90	2
auto[4160749568:4294967295]	auto[0]	162	1			T35	2		T44	2		T115	2
auto[4160749568:4294967295]	auto[1]	74	1			T115	2		T48	2		T95	2