Module Definition
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Module : kmac_core
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_kmac_core 0.00 0.00 0.00 0.00 0.00



Module Instance : tb.dut.u_kmac_core

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
1.32 0.00 0.00 6.61 0.00 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_key_slicer[0].u_key_slicer 0.00 0.00
gen_key_slicer[1].u_key_slicer 0.00 0.00
u_key_index_count 0.00 0.00
u_state_regs 0.00 0.00 0.00

Line Coverage for Module : kmac_core
Line No.TotalCoveredPercent
TOTAL7600.00
CONT_ASSIGN151100.00
ALWAYS159300.00
ALWAYS1643000.00
CONT_ASSIGN249100.00
CONT_ASSIGN250100.00
CONT_ASSIGN251100.00
CONT_ASSIGN252100.00
CONT_ASSIGN256100.00
CONT_ASSIGN258100.00
CONT_ASSIGN263100.00
ALWAYS266600.00
CONT_ASSIGN285100.00
ALWAYS305600.00
ALWAYS336600.00
ALWAYS336600.00
CONT_ASSIGN370100.00
CONT_ASSIGN373100.00
CONT_ASSIGN392100.00
ALWAYS418600.00
CONT_ASSIGN429100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
151 0 1
159 0 3
164 0 1
166 0 1
167 0 1
169 0 1
171 0 1
172 0 1
174 0 1
176 0 1
178 0 1
179 0 1
181 0 1
188 0 1
189 0 1
191 0 1
192 0 1
194 0 1
195 0 1
197 0 1
199 0 1
205 0 1
206 0 1
208 0 1
210 0 1
215 0 1
216 0 1
218 0 1
224 0 1
225 0 1
238 0 1
239 0 1
==> MISSING_ELSE
249 0 1
250 0 1
251 0 1
252 0 1
256 0 1
258 0 1
263 0 1
266 0 1
267 0 1
268 0 1
269 0 1
270 0 1
272 0 1
==> MISSING_ELSE
285 0 1
305 0 1
315 0 1
316 0 1
317 0 1
318 0 1
319 0 1
336 0 1
339 0 1
343 0 1
347 0 1
351 0 1
356 0 1
336 0 1
339 0 1
343 0 1
347 0 1
351 0 1
356 0 1
370 0 1
373 0 1
392 0 1
418 0 1
419 0 1
420 0 1
421 0 1
422 0 1
423 0 1
429 0 1


Cond Coverage for Module : kmac_core
TotalCoveredPercent
Conditions2800.00
Logical2800.00
Non-Logical00
Event00

 LINE       178
 EXPRESSION (kmac_en_i && start_i)
             ----1----    ---2---
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       205
 EXPRESSION (process_i || process_latched)
             ----1----    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       249
 EXPRESSION (en_kmac_datapath ? kmac_valid : fifo_valid_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       250
 EXPRESSION (en_kmac_datapath ? kmac_data : fifo_data_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       251
 EXPRESSION (en_kmac_datapath ? kmac_strb : fifo_strb_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       252
 EXPRESSION (en_kmac_datapath ? 1'b0 : msg_ready_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       256
 EXPRESSION (en_key_write ? '1 : '0)
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       258
 EXPRESSION (en_key_write ? key_sliced : ('{(*adjust*)default:'0}))
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       263
 EXPRESSION (kmac_en_i ? kmac_process : process_i)
             ----1----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       268
 EXPRESSION (process_i && ((!process_o)))
             ----1----    -------2------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       392
 EXPRESSION (kmac_valid & msg_ready_i)
             -----1----   -----2-----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       429
 EXPRESSION (key_index == block_addr_limit)
            ---------------1---------------
-1-StatusTests
0Not Covered
1Not Covered

FSM Coverage for Module : kmac_core
Summary for FSM :: st
TotalCoveredPercent
States 5 0 0.00 (Not included in score)
Transitions 8 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: st
statesLine No.CoveredTests
StKey 179 Not Covered
StKmacFlush 206 Not Covered
StKmacIdle 181 Not Covered
StKmacMsg 192 Not Covered
StTerminalError 239 Not Covered


transitionsLine No.CoveredTests
StKey->StKmacMsg 192 Not Covered
StKey->StTerminalError 239 Not Covered
StKmacFlush->StKmacIdle 216 Not Covered
StKmacFlush->StTerminalError 239 Not Covered
StKmacIdle->StKey 179 Not Covered
StKmacIdle->StTerminalError 239 Not Covered
StKmacMsg->StKmacFlush 206 Not Covered
StKmacMsg->StTerminalError 239 Not Covered



Branch Coverage for Module : kmac_core
Line No.TotalCoveredPercent
Branches 56 0 0.00
TERNARY 249 2 0 0.00
TERNARY 250 2 0 0.00
TERNARY 251 2 0 0.00
TERNARY 252 2 0 0.00
TERNARY 256 2 0 0.00
TERNARY 258 2 0 0.00
TERNARY 263 2 0 0.00
IF 159 2 0 0.00
CASE 176 10 0 0.00
IF 238 2 0 0.00
IF 266 4 0 0.00
CASE 305 6 0 0.00
CASE 418 6 0 0.00
CASE 336 6 0 0.00
CASE 336 6 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 249 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 250 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 251 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 252 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 256 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 258 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 263 (kmac_en_i) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 159 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 176 case (st) -2-: 178 if ((kmac_en_i && start_i)) -3-: 191 if (sent_blocksize) -4-: 205 if ((process_i || process_latched)) -5-: 215 if (prim_mubi_pkg::mubi4_test_true_strict(done_i))

Branches:
-1--2--3--4--5-StatusTests
StKmacIdle 1 - - - Not Covered
StKmacIdle 0 - - - Not Covered
StKey - 1 - - Not Covered
StKey - 0 - - Not Covered
StKmacMsg - - 1 - Not Covered
StKmacMsg - - 0 - Not Covered
StKmacFlush - - - 1 Not Covered
StKmacFlush - - - 0 Not Covered
StTerminalError - - - - Not Covered
default - - - - Not Covered


LineNo. Expression -1-: 238 if (lc_ctrl_pkg::lc_tx_test_true_loose(lc_escalate_en_i))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 266 if ((!rst_ni)) -2-: 268 if ((process_i && (!process_o))) -3-: 270 if ((process_o || prim_mubi_pkg::mubi4_test_true_strict(done_i)))

Branches:
-1--2--3-StatusTests
1 - - Not Covered
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Not Covered


LineNo. Expression -1-: 305 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 418 case (strength_i)

Branches:
-1-StatusTests
L128 Not Covered
L224 Not Covered
L256 Not Covered
L384 Not Covered
L512 Not Covered
default Not Covered


LineNo. Expression -1-: 336 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 336 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered

Line Coverage for Instance : tb.dut.u_kmac_core
Line No.TotalCoveredPercent
TOTAL7600.00
CONT_ASSIGN151100.00
ALWAYS159300.00
ALWAYS1643000.00
CONT_ASSIGN249100.00
CONT_ASSIGN250100.00
CONT_ASSIGN251100.00
CONT_ASSIGN252100.00
CONT_ASSIGN256100.00
CONT_ASSIGN258100.00
CONT_ASSIGN263100.00
ALWAYS266600.00
CONT_ASSIGN285100.00
ALWAYS305600.00
ALWAYS336600.00
ALWAYS336600.00
CONT_ASSIGN370100.00
CONT_ASSIGN373100.00
CONT_ASSIGN392100.00
ALWAYS418600.00
CONT_ASSIGN429100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
151 0 1
159 0 3
164 0 1
166 0 1
167 0 1
169 0 1
171 0 1
172 0 1
174 0 1
176 0 1
178 0 1
179 0 1
181 0 1
188 0 1
189 0 1
191 0 1
192 0 1
194 0 1
195 0 1
197 0 1
199 0 1
205 0 1
206 0 1
208 0 1
210 0 1
215 0 1
216 0 1
218 0 1
224 0 1
225 0 1
238 0 1
239 0 1
==> MISSING_ELSE
249 0 1
250 0 1
251 0 1
252 0 1
256 0 1
258 0 1
263 0 1
266 0 1
267 0 1
268 0 1
269 0 1
270 0 1
272 0 1
==> MISSING_ELSE
285 0 1
305 0 1
315 0 1
316 0 1
317 0 1
318 0 1
319 0 1
336 0 1
339 0 1
343 0 1
347 0 1
351 0 1
356 0 1
336 0 1
339 0 1
343 0 1
347 0 1
351 0 1
356 0 1
370 0 1
373 0 1
392 0 1
418 0 1
419 0 1
420 0 1
421 0 1
422 0 1
423 0 1
429 0 1


Cond Coverage for Instance : tb.dut.u_kmac_core
TotalCoveredPercent
Conditions2800.00
Logical2800.00
Non-Logical00
Event00

 LINE       178
 EXPRESSION (kmac_en_i && start_i)
             ----1----    ---2---
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       205
 EXPRESSION (process_i || process_latched)
             ----1----    -------2-------
-1--2-StatusTests
00Not Covered
01Not Covered
10Not Covered

 LINE       249
 EXPRESSION (en_kmac_datapath ? kmac_valid : fifo_valid_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       250
 EXPRESSION (en_kmac_datapath ? kmac_data : fifo_data_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       251
 EXPRESSION (en_kmac_datapath ? kmac_strb : fifo_strb_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       252
 EXPRESSION (en_kmac_datapath ? 1'b0 : msg_ready_i)
             --------1-------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       256
 EXPRESSION (en_key_write ? '1 : '0)
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       258
 EXPRESSION (en_key_write ? key_sliced : ('{(*adjust*)default:'0}))
             ------1-----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       263
 EXPRESSION (kmac_en_i ? kmac_process : process_i)
             ----1----
-1-StatusTests
0Not Covered
1Not Covered

 LINE       268
 EXPRESSION (process_i && ((!process_o)))
             ----1----    -------2------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       392
 EXPRESSION (kmac_valid & msg_ready_i)
             -----1----   -----2-----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       429
 EXPRESSION (key_index == block_addr_limit)
            ---------------1---------------
-1-StatusTests
0Not Covered
1Not Covered

FSM Coverage for Instance : tb.dut.u_kmac_core
Summary for FSM :: st
TotalCoveredPercent
States 5 0 0.00 (Not included in score)
Transitions 7 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: st
statesLine No.CoveredTests
StKey 179 Not Covered
StKmacFlush 206 Not Covered
StKmacIdle 181 Not Covered
StKmacMsg 192 Not Covered
StTerminalError 239 Not Covered


transitionsLine No.CoveredTestsExclude Annotation
StKey->StKmacMsg 192 Not Covered
StKey->StTerminalError 239 Not Covered
StKmacFlush->StKmacIdle 216 Not Covered
StKmacFlush->StTerminalError 239 Excluded [LOW_RISK] The transition from any state to error_terminal state is fully verified in FPV.
StKmacIdle->StKey 179 Not Covered
StKmacIdle->StTerminalError 239 Not Covered
StKmacMsg->StKmacFlush 206 Not Covered
StKmacMsg->StTerminalError 239 Not Covered



Branch Coverage for Instance : tb.dut.u_kmac_core
Line No.TotalCoveredPercent
Branches 56 0 0.00
TERNARY 249 2 0 0.00
TERNARY 250 2 0 0.00
TERNARY 251 2 0 0.00
TERNARY 252 2 0 0.00
TERNARY 256 2 0 0.00
TERNARY 258 2 0 0.00
TERNARY 263 2 0 0.00
IF 159 2 0 0.00
CASE 176 10 0 0.00
IF 238 2 0 0.00
IF 266 4 0 0.00
CASE 305 6 0 0.00
CASE 418 6 0 0.00
CASE 336 6 0 0.00
CASE 336 6 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv' or '../src/lowrisc_ip_kmac_0.1/rtl/kmac_core.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 249 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 250 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 251 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 252 (en_kmac_datapath) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 256 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 258 (en_key_write) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 263 (kmac_en_i) ?

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 159 if ((!rst_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 176 case (st) -2-: 178 if ((kmac_en_i && start_i)) -3-: 191 if (sent_blocksize) -4-: 205 if ((process_i || process_latched)) -5-: 215 if (prim_mubi_pkg::mubi4_test_true_strict(done_i))

Branches:
-1--2--3--4--5-StatusTests
StKmacIdle 1 - - - Not Covered
StKmacIdle 0 - - - Not Covered
StKey - 1 - - Not Covered
StKey - 0 - - Not Covered
StKmacMsg - - 1 - Not Covered
StKmacMsg - - 0 - Not Covered
StKmacFlush - - - 1 Not Covered
StKmacFlush - - - 0 Not Covered
StTerminalError - - - - Not Covered
default - - - - Not Covered


LineNo. Expression -1-: 238 if (lc_ctrl_pkg::lc_tx_test_true_loose(lc_escalate_en_i))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 266 if ((!rst_ni)) -2-: 268 if ((process_i && (!process_o))) -3-: 270 if ((process_o || prim_mubi_pkg::mubi4_test_true_strict(done_i)))

Branches:
-1--2--3-StatusTests
1 - - Not Covered
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Not Covered


LineNo. Expression -1-: 305 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 418 case (strength_i)

Branches:
-1-StatusTests
L128 Not Covered
L224 Not Covered
L256 Not Covered
L384 Not Covered
L512 Not Covered
default Not Covered


LineNo. Expression -1-: 336 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered


LineNo. Expression -1-: 336 case (key_len_i)

Branches:
-1-StatusTests
Key128 Not Covered
Key192 Not Covered
Key256 Not Covered
Key384 Not Covered
Key512 Not Covered
default Not Covered

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%