Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 148945218 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 111626235 1 T1 225419 T2 12361 T3 9



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 136125433 1 T1 131621 T2 16697 T3 1
values[0x0] 59920753 1 T1 81913 T2 3243 T3 9
values[0x1] 64525267 1 T1 83876 T2 3531 T3 21



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 115599390 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 144972063 1 T1 243323 T2 15248 T3 11



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 791411 1 T1 1180 T2 61 T15 1
valid_sources[0x01] 1442785 1 T1 1078 T2 104 T15 3
valid_sources[0x02] 795181 1 T1 1032 T2 103 T15 1
valid_sources[0x03] 1325208 1 T1 1309 T2 89 T15 2
valid_sources[0x04] 798951 1 T1 1201 T2 97 T15 2
valid_sources[0x05] 790701 1 T1 1049 T2 119 T15 4
valid_sources[0x06] 798901 1 T1 1205 T2 29 T30 1727
valid_sources[0x07] 1705812 1 T1 1186 T2 76 T15 2
valid_sources[0x08] 796736 1 T1 1285 T2 107 T30 1877
valid_sources[0x09] 801022 1 T1 1012 T2 85 T3 1
valid_sources[0x0a] 794699 1 T1 1250 T2 170 T3 1
valid_sources[0x0b] 1457725 1 T1 1083 T2 68 T15 2
valid_sources[0x0c] 896930 1 T1 1165 T2 89 T15 2
valid_sources[0x0d] 800484 1 T1 1265 T2 61 T30 1741
valid_sources[0x0e] 797559 1 T1 1225 T2 107 T15 1
valid_sources[0x0f] 791507 1 T1 1211 T2 91 T15 1
valid_sources[0x10] 790289 1 T1 1126 T2 58 T15 1
valid_sources[0x11] 948153 1 T1 1219 T2 57 T30 1700
valid_sources[0x12] 795479 1 T1 1325 T2 51 T3 1
valid_sources[0x13] 793415 1 T1 1122 T2 65 T15 4
valid_sources[0x14] 794399 1 T1 1040 T2 73 T15 1
valid_sources[0x15] 798752 1 T1 1211 T2 115 T15 1
valid_sources[0x16] 788749 1 T1 1165 T2 132 T30 1861
valid_sources[0x17] 798806 1 T1 1136 T2 58 T15 1
valid_sources[0x18] 799230 1 T1 1097 T2 75 T15 2
valid_sources[0x19] 798522 1 T1 1040 T2 52 T3 1
valid_sources[0x1a] 800034 1 T1 1316 T2 56 T30 1858
valid_sources[0x1b] 939509 1 T1 992 T2 88 T3 1
valid_sources[0x1c] 796516 1 T1 1163 T2 171 T15 1
valid_sources[0x1d] 974712 1 T1 1276 T2 95 T15 5681
valid_sources[0x1e] 2755927 1 T1 1086 T2 165 T30 1764
valid_sources[0x1f] 1264693 1 T1 1173 T2 88 T15 1
valid_sources[0x20] 794560 1 T1 1101 T2 108 T15 1
valid_sources[0x21] 799510 1 T1 1116 T2 115 T15 2
valid_sources[0x22] 1670250 1 T1 1118 T2 110 T15 2
valid_sources[0x23] 792623 1 T1 1254 T2 131 T3 1
valid_sources[0x24] 1316677 1 T1 1153 T2 100 T30 1750
valid_sources[0x25] 844331 1 T1 1182 T2 30 T15 3
valid_sources[0x26] 898077 1 T1 1268 T2 77 T15 1
valid_sources[0x27] 894438 1 T1 1133 T2 89 T15 1
valid_sources[0x28] 802601 1 T1 1174 T2 82 T15 1
valid_sources[0x29] 796558 1 T1 1190 T2 72 T15 1
valid_sources[0x2a] 801676 1 T1 1138 T2 116 T15 3
valid_sources[0x2b] 801117 1 T1 1224 T2 110 T30 1751
valid_sources[0x2c] 1253846 1 T1 1147 T2 63 T15 1
valid_sources[0x2d] 859675 1 T1 1128 T2 91 T15 2
valid_sources[0x2e] 789938 1 T1 1301 T2 95 T30 1867
valid_sources[0x2f] 1160492 1 T1 1273 T2 101 T15 2
valid_sources[0x30] 982782 1 T1 1297 T2 66 T15 2
valid_sources[0x31] 800167 1 T1 1102 T2 62 T3 1
valid_sources[0x32] 797149 1 T1 1353 T2 45 T15 1
valid_sources[0x33] 795344 1 T1 1106 T2 112 T15 1
valid_sources[0x34] 792233 1 T1 1166 T2 111 T30 1857
valid_sources[0x35] 1899406 1 T1 1204 T2 57 T15 1
valid_sources[0x36] 795585 1 T1 1311 T2 62 T3 1
valid_sources[0x37] 2107219 1 T1 1283 T2 34 T30 1741
valid_sources[0x38] 797505 1 T1 1043 T2 84 T30 1927
valid_sources[0x39] 1570679 1 T1 1268 T2 81 T15 1
valid_sources[0x3a] 795841 1 T1 1219 T2 55 T15 3
valid_sources[0x3b] 3133714 1 T1 1065 T2 93 T15 1
valid_sources[0x3c] 862290 1 T1 1191 T2 99 T15 2
valid_sources[0x3d] 797472 1 T1 1359 T2 72 T30 1751
valid_sources[0x3e] 1456940 1 T1 1068 T2 115 T15 1
valid_sources[0x3f] 844671 1 T1 1218 T2 35 T15 1
valid_sources[0x40] 830380 1 T1 1284 T2 133 T30 1805
valid_sources[0x41] 793161 1 T1 1158 T2 106 T15 2
valid_sources[0x42] 1590809 1 T1 1146 T2 115 T15 2
valid_sources[0x43] 790382 1 T1 1039 T2 96 T15 1
valid_sources[0x44] 920460 1 T1 1212 T2 90 T15 1
valid_sources[0x45] 828837 1 T1 1043 T2 107 T15 2
valid_sources[0x46] 1006046 1 T1 1215 T2 153 T30 1833
valid_sources[0x47] 1457927 1 T1 1176 T2 137 T15 1
valid_sources[0x48] 793942 1 T1 1109 T2 64 T3 1
valid_sources[0x49] 793161 1 T1 1183 T2 58 T30 1883
valid_sources[0x4a] 798997 1 T1 1093 T2 92 T30 1843
valid_sources[0x4b] 795199 1 T1 1201 T2 120 T15 1
valid_sources[0x4c] 858765 1 T1 1177 T2 101 T15 2
valid_sources[0x4d] 791124 1 T1 975 T2 192 T30 1811
valid_sources[0x4e] 794918 1 T1 1257 T2 60 T30 1810
valid_sources[0x4f] 813398 1 T1 1264 T2 114 T30 1919
valid_sources[0x50] 796480 1 T1 1242 T2 70 T30 1748
valid_sources[0x51] 899447 1 T1 968 T2 95 T15 1
valid_sources[0x52] 2114621 1 T1 1234 T2 97 T30 1805
valid_sources[0x53] 984168 1 T1 1178 T2 148 T15 2
valid_sources[0x54] 800664 1 T1 1274 T2 76 T15 1
valid_sources[0x55] 1347011 1 T1 1180 T2 132 T15 1
valid_sources[0x56] 793785 1 T1 1193 T2 78 T15 3
valid_sources[0x57] 789933 1 T1 1084 T2 72 T15 3
valid_sources[0x58] 798071 1 T1 1295 T2 58 T15 1
valid_sources[0x59] 791760 1 T1 1189 T2 99 T15 1
valid_sources[0x5a] 1422377 1 T1 1057 T2 94 T15 1
valid_sources[0x5b] 797130 1 T1 1285 T2 82 T3 2
valid_sources[0x5c] 834756 1 T1 1125 T2 47 T15 3
valid_sources[0x5d] 800102 1 T1 1183 T2 111 T15 1
valid_sources[0x5e] 801285 1 T1 1123 T2 162 T3 1
valid_sources[0x5f] 1081852 1 T1 1198 T2 71 T30 1862
valid_sources[0x60] 795920 1 T1 1155 T2 69 T30 1884
valid_sources[0x61] 1244189 1 T1 1261 T2 69 T15 2
valid_sources[0x62] 892816 1 T1 1256 T2 103 T15 2
valid_sources[0x63] 791113 1 T1 1104 T2 86 T15 3
valid_sources[0x64] 800626 1 T1 1167 T2 77 T15 1
valid_sources[0x65] 792530 1 T1 1049 T2 95 T15 3
valid_sources[0x66] 791263 1 T1 1271 T2 84 T30 1773
valid_sources[0x67] 791159 1 T1 1099 T2 69 T15 1
valid_sources[0x68] 794637 1 T1 1097 T2 128 T30 1806
valid_sources[0x69] 803622 1 T1 1162 T2 40 T15 2
valid_sources[0x6a] 1255712 1 T1 1139 T2 103 T30 1815
valid_sources[0x6b] 899880 1 T1 1063 T2 113 T30 1833
valid_sources[0x6c] 891683 1 T1 1139 T2 116 T3 1
valid_sources[0x6d] 2193822 1 T1 1300 T2 121 T30 1787
valid_sources[0x6e] 797059 1 T1 1016 T2 74 T15 1
valid_sources[0x6f] 800109 1 T1 1204 T2 78 T15 2
valid_sources[0x70] 844822 1 T1 1153 T2 80 T15 1
valid_sources[0x71] 799657 1 T1 1095 T2 173 T30 1815
valid_sources[0x72] 2784999 1 T1 1176 T2 103 T15 1
valid_sources[0x73] 793622 1 T1 1222 T2 161 T30 1815
valid_sources[0x74] 797401 1 T1 1167 T2 132 T30 1783
valid_sources[0x75] 799653 1 T1 1068 T2 147 T30 1773
valid_sources[0x76] 797305 1 T1 1077 T2 107 T30 1655
valid_sources[0x77] 799328 1 T1 1165 T2 97 T30 1883
valid_sources[0x78] 794479 1 T1 1039 T2 130 T3 1
valid_sources[0x79] 1336604 1 T1 1068 T2 41 T30 1754
valid_sources[0x7a] 795581 1 T1 1223 T2 103 T15 2
valid_sources[0x7b] 799652 1 T1 1147 T2 91 T15 1
valid_sources[0x7c] 794150 1 T1 1290 T2 100 T30 1925
valid_sources[0x7d] 1706089 1 T1 1055 T2 74 T15 1
valid_sources[0x7e] 878952 1 T1 1094 T2 48 T15 2
valid_sources[0x7f] 1769193 1 T1 1204 T2 95 T15 1
valid_sources[0x80] 1244114 1 T1 1183 T2 64 T15 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 43649631 1 T1 76292 T2 8516 T3 1
values[0x0] all_enables biggest_size 36354100 1 T1 74884 T2 2040 T3 4
values[0x1] all_enables biggest_size 31622504 1 T1 74243 T2 1805 T3 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%