Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180234 |
1 |
|
|
T7 |
76 |
|
T8 |
853 |
|
T14 |
2203 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
97258 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
59991 |
1 |
|
|
T7 |
76 |
|
T8 |
843 |
|
T14 |
705 |
seven_bytes |
3280 |
1 |
|
|
T14 |
45 |
|
T21 |
47 |
|
T18 |
22 |
six_bytes |
3369 |
1 |
|
|
T14 |
45 |
|
T21 |
54 |
|
T18 |
28 |
five_bytes |
3226 |
1 |
|
|
T14 |
46 |
|
T21 |
45 |
|
T18 |
29 |
four_bytes |
3320 |
1 |
|
|
T14 |
37 |
|
T21 |
52 |
|
T18 |
18 |
three_bytes |
3201 |
1 |
|
|
T14 |
38 |
|
T21 |
58 |
|
T18 |
21 |
two_bytes |
3277 |
1 |
|
|
T14 |
48 |
|
T21 |
65 |
|
T18 |
20 |
one_byte |
3312 |
1 |
|
|
T14 |
37 |
|
T21 |
75 |
|
T18 |
21 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176888 |
1 |
|
|
T7 |
76 |
|
T8 |
833 |
|
T14 |
2163 |
auto[1] |
3346 |
1 |
|
|
T8 |
20 |
|
T14 |
40 |
|
T21 |
34 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180234 |
1 |
|
|
T7 |
76 |
|
T8 |
853 |
|
T14 |
2203 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180224 |
1 |
|
|
T7 |
76 |
|
T8 |
853 |
|
T14 |
2203 |
auto[1] |
10 |
1 |
|
|
T16 |
1 |
|
T173 |
1 |
|
T174 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1150 |
1 |
|
|
T8 |
10 |
|
T14 |
15 |
|
T21 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3346 |
1 |
|
|
T8 |
20 |
|
T14 |
40 |
|
T21 |
34 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
181449 |
1 |
|
|
T2 |
47 |
|
T7 |
120 |
|
T8 |
553 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
94000 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64905 |
1 |
|
|
T2 |
46 |
|
T7 |
119 |
|
T8 |
544 |
seven_bytes |
3257 |
1 |
|
|
T14 |
23 |
|
T21 |
67 |
|
T18 |
15 |
six_bytes |
3293 |
1 |
|
|
T14 |
21 |
|
T21 |
75 |
|
T18 |
6 |
five_bytes |
3197 |
1 |
|
|
T14 |
14 |
|
T21 |
63 |
|
T18 |
14 |
four_bytes |
3218 |
1 |
|
|
T14 |
14 |
|
T21 |
69 |
|
T18 |
14 |
three_bytes |
3247 |
1 |
|
|
T14 |
30 |
|
T21 |
78 |
|
T18 |
13 |
two_bytes |
3187 |
1 |
|
|
T14 |
20 |
|
T21 |
60 |
|
T18 |
11 |
one_byte |
3145 |
1 |
|
|
T14 |
27 |
|
T21 |
63 |
|
T18 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177999 |
1 |
|
|
T2 |
45 |
|
T7 |
118 |
|
T8 |
535 |
auto[1] |
3450 |
1 |
|
|
T2 |
2 |
|
T7 |
2 |
|
T8 |
18 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
181449 |
1 |
|
|
T2 |
47 |
|
T7 |
120 |
|
T8 |
553 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
181435 |
1 |
|
|
T2 |
47 |
|
T7 |
120 |
|
T8 |
553 |
auto[1] |
14 |
1 |
|
|
T9 |
2 |
|
T175 |
1 |
|
T176 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1209 |
1 |
|
|
T2 |
1 |
|
T7 |
1 |
|
T8 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3450 |
1 |
|
|
T2 |
2 |
|
T7 |
2 |
|
T8 |
18 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352387 |
1 |
|
|
T7 |
209 |
|
T8 |
531 |
|
T14 |
3869 |
auto[1] |
514 |
1 |
|
|
T9 |
80 |
|
T10 |
60 |
|
T11 |
18 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
191420 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
116030 |
1 |
|
|
T7 |
206 |
|
T8 |
523 |
|
T14 |
1826 |
seven_bytes |
6487 |
1 |
|
|
T14 |
54 |
|
T21 |
143 |
|
T18 |
42 |
six_bytes |
6581 |
1 |
|
|
T14 |
55 |
|
T21 |
163 |
|
T18 |
59 |
five_bytes |
6533 |
1 |
|
|
T14 |
48 |
|
T21 |
148 |
|
T18 |
42 |
four_bytes |
6547 |
1 |
|
|
T14 |
43 |
|
T21 |
149 |
|
T18 |
46 |
three_bytes |
6421 |
1 |
|
|
T14 |
53 |
|
T21 |
149 |
|
T18 |
44 |
two_bytes |
6578 |
1 |
|
|
T14 |
60 |
|
T21 |
161 |
|
T18 |
59 |
one_byte |
6304 |
1 |
|
|
T14 |
71 |
|
T21 |
151 |
|
T18 |
43 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
346249 |
1 |
|
|
T7 |
203 |
|
T8 |
515 |
|
T14 |
3793 |
auto[1] |
6652 |
1 |
|
|
T7 |
6 |
|
T8 |
16 |
|
T14 |
76 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352901 |
1 |
|
|
T7 |
209 |
|
T8 |
531 |
|
T14 |
3869 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352882 |
1 |
|
|
T7 |
209 |
|
T8 |
531 |
|
T14 |
3869 |
auto[1] |
19 |
1 |
|
|
T9 |
1 |
|
T79 |
1 |
|
T177 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2226 |
1 |
|
|
T7 |
3 |
|
T8 |
8 |
|
T14 |
30 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6652 |
1 |
|
|
T7 |
6 |
|
T8 |
16 |
|
T14 |
76 |