Unified Coverage Report :: Group :: tb.dut.kmac_cov_if::cmd_process_cg

Group : tb.dut.kmac_cov_if::cmd_process_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
42.86	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_cov_0/kmac_cov_if.sv

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Summary for Group tb.dut.kmac_cov_if::cmd_process_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	4	3	42.86

Variables for Group tb.dut.kmac_cov_if::cmd_process_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
kmac_keccak_state	2	1	1	50.00	100	1	1	0
kmac_msgfifo_empty	2	1	1	50.00	100	1	1	0
kmac_msgfifo_full	2	1	1	50.00	100	1	1	0
kmac_msgfifo_has_data	1	1	0	0.00	100	1	1	0

Summary for Variable kmac_keccak_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	1	1	50.00

User Defined Bins for kmac_keccak_state

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
active	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

inactive

196

1

T2

1

T3

1

T5

1

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Summary for Variable kmac_msgfifo_empty

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	1	1	50.00

User Defined Bins for kmac_msgfifo_empty

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
not_empty	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

empty

196

1

T2

1

T3

1

T5

1

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Summary for Variable kmac_msgfifo_full

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	1	1	50.00

User Defined Bins for kmac_msgfifo_full

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
full	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

not_full

196

1

T2

1

T3

1

T5

1

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Summary for Variable kmac_msgfifo_has_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	1	0	0.00

User Defined Bins for kmac_msgfifo_has_data

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
has_data	0	1	1