Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	254255957	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

200001578

1

T1

359060

T2

65732

T3

359261

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	239719988	1			T1	481513		T2	70680		T3	469879
values[0x0]	103060304	1			T1	220308		T2	17123		T3	215363
values[0x1]	111477243	1			T1	242370		T2	18351		T3	235676

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	198193891	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

256063644

1

T1

490089

T2

74943

T3

482946

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4410784	1			T1	3709		T2	417		T3	3561
valid_sources[0x01]	1316425	1			T1	3688		T2	399		T3	4115
valid_sources[0x02]	1772929	1			T1	3759		T2	415		T3	3691
valid_sources[0x03]	1324287	1			T1	3747		T2	406		T3	3727
valid_sources[0x04]	1322561	1			T1	3694		T2	427		T3	3363
valid_sources[0x05]	1327534	1			T1	3706		T2	396		T3	3630
valid_sources[0x06]	1325583	1			T1	3752		T2	365		T3	3227
valid_sources[0x07]	1324124	1			T1	3749		T2	445		T3	3434
valid_sources[0x08]	1324076	1			T1	3593		T2	404		T3	3455
valid_sources[0x09]	2178448	1			T1	3839		T2	464		T3	3724
valid_sources[0x0a]	2201317	1			T1	3635		T2	436		T3	4313
valid_sources[0x0b]	3395507	1			T1	3609		T2	435		T3	3434
valid_sources[0x0c]	1316256	1			T1	3680		T2	397		T3	3236
valid_sources[0x0d]	1321015	1			T1	3617		T2	404		T3	3516
valid_sources[0x0e]	1318135	1			T1	3728		T2	393		T3	3821
valid_sources[0x0f]	3343424	1			T1	3717		T2	421		T3	3438
valid_sources[0x10]	1319592	1			T1	3710		T2	428		T3	3613
valid_sources[0x11]	1320840	1			T1	3656		T2	423		T3	3331
valid_sources[0x12]	1327016	1			T1	3742		T2	421		T3	3459
valid_sources[0x13]	1319605	1			T1	3744		T2	459		T3	3645
valid_sources[0x14]	1326976	1			T1	3610		T2	368		T3	3716
valid_sources[0x15]	1644049	1			T1	3708		T2	403		T3	3678
valid_sources[0x16]	1311286	1			T1	3565		T2	431		T3	3702
valid_sources[0x17]	1316886	1			T1	3755		T2	419		T3	3573
valid_sources[0x18]	2217951	1			T1	3829		T2	416		T3	3542
valid_sources[0x19]	3752937	1			T1	3780		T2	403		T3	3220
valid_sources[0x1a]	1317252	1			T1	3667		T2	402		T3	3726
valid_sources[0x1b]	1780785	1			T1	3656		T2	415		T3	4010
valid_sources[0x1c]	1324266	1			T1	3679		T2	448		T3	3566
valid_sources[0x1d]	1322510	1			T1	3685		T2	464		T3	3896
valid_sources[0x1e]	1318061	1			T1	3634		T2	425		T3	3199
valid_sources[0x1f]	1962379	1			T1	3580		T2	409		T3	3503
valid_sources[0x20]	1314981	1			T1	3806		T2	386		T3	3767
valid_sources[0x21]	1321036	1			T1	3660		T2	430		T3	3848
valid_sources[0x22]	1321182	1			T1	3708		T2	394		T3	3764
valid_sources[0x23]	1317428	1			T1	3777		T2	405		T3	3744
valid_sources[0x24]	1319587	1			T1	3624		T2	384		T3	3576
valid_sources[0x25]	1491308	1			T1	3739		T2	453		T3	3766
valid_sources[0x26]	1330952	1			T1	3750		T2	422		T3	3418
valid_sources[0x27]	1320944	1			T1	3690		T2	399		T3	3155
valid_sources[0x28]	1312703	1			T1	3739		T2	408		T3	3842
valid_sources[0x29]	1614780	1			T1	3660		T2	408		T3	3840
valid_sources[0x2a]	1971882	1			T1	3657		T2	436		T3	3646
valid_sources[0x2b]	1393226	1			T1	3666		T2	423		T3	3112
valid_sources[0x2c]	1324631	1			T1	3659		T2	425		T3	4119
valid_sources[0x2d]	1339956	1			T1	3662		T2	409		T3	4112
valid_sources[0x2e]	1325862	1			T1	3780		T2	400		T3	3762
valid_sources[0x2f]	1315669	1			T1	3666		T2	415		T3	3305
valid_sources[0x30]	1357754	1			T1	3724		T2	454		T3	3177
valid_sources[0x31]	3781784	1			T1	3923		T2	404		T3	3506
valid_sources[0x32]	2301392	1			T1	3599		T2	387		T3	3926
valid_sources[0x33]	1325992	1			T1	3715		T2	429		T3	3652
valid_sources[0x34]	4065479	1			T1	3676		T2	426		T3	3627
valid_sources[0x35]	1322564	1			T1	3688		T2	385		T3	3625
valid_sources[0x36]	1802541	1			T1	3663		T2	419		T3	3451
valid_sources[0x37]	1860783	1			T1	3707		T2	419		T3	3440
valid_sources[0x38]	1314589	1			T1	3812		T2	417		T3	3540
valid_sources[0x39]	1341454	1			T1	3671		T2	464		T3	3758
valid_sources[0x3a]	1312394	1			T1	3661		T2	421		T3	4017
valid_sources[0x3b]	1443452	1			T1	3720		T2	402		T3	4028
valid_sources[0x3c]	1526218	1			T1	3722		T2	415		T3	3885
valid_sources[0x3d]	3766820	1			T1	3691		T2	429		T3	3290
valid_sources[0x3e]	1790901	1			T1	3653		T2	395		T3	3569
valid_sources[0x3f]	1317750	1			T1	3741		T2	386		T3	3822
valid_sources[0x40]	1340280	1			T1	3881		T2	398		T3	3624
valid_sources[0x41]	3702185	1			T1	3658		T2	427		T3	3463
valid_sources[0x42]	1319102	1			T1	3767		T2	378		T3	3738
valid_sources[0x43]	1986406	1			T1	3582		T2	439		T3	3571
valid_sources[0x44]	2187352	1			T1	3680		T2	438		T3	4003
valid_sources[0x45]	1807035	1			T1	3568		T2	436		T3	3818
valid_sources[0x46]	1319362	1			T1	3824		T2	434		T3	3106
valid_sources[0x47]	1317252	1			T1	3794		T2	423		T3	3714
valid_sources[0x48]	2256668	1			T1	3783		T2	431		T3	3172
valid_sources[0x49]	5769530	1			T1	3687		T2	404		T3	3919
valid_sources[0x4a]	3070124	1			T1	3658		T2	424		T3	3956
valid_sources[0x4b]	1323877	1			T1	3691		T2	446		T3	3732
valid_sources[0x4c]	1971340	1			T1	3662		T2	423		T3	3876
valid_sources[0x4d]	1856367	1			T1	3703		T2	411		T3	3615
valid_sources[0x4e]	1362868	1			T1	3579		T2	408		T3	3400
valid_sources[0x4f]	1989329	1			T1	3613		T2	409		T3	3176
valid_sources[0x50]	3776728	1			T1	3570		T2	410		T3	3420
valid_sources[0x51]	2214539	1			T1	3661		T2	382		T3	3996
valid_sources[0x52]	1330462	1			T1	3683		T2	431		T3	4108
valid_sources[0x53]	1420422	1			T1	3799		T2	376		T3	3926
valid_sources[0x54]	1787009	1			T1	3739		T2	421		T3	3674
valid_sources[0x55]	2259505	1			T1	3684		T2	412		T3	3378
valid_sources[0x56]	1320588	1			T1	3673		T2	411		T3	3501
valid_sources[0x57]	1449593	1			T1	3707		T2	394		T3	3300
valid_sources[0x58]	1774848	1			T1	3737		T2	404		T3	3599
valid_sources[0x59]	2194664	1			T1	3741		T2	434		T3	3839
valid_sources[0x5a]	2254419	1			T1	3645		T2	404		T3	3987
valid_sources[0x5b]	2191487	1			T1	3694		T2	406		T3	3510
valid_sources[0x5c]	1432612	1			T1	3664		T2	386		T3	3478
valid_sources[0x5d]	1323739	1			T1	3694		T2	423		T3	3791
valid_sources[0x5e]	1478971	1			T1	3656		T2	413		T3	3646
valid_sources[0x5f]	1332343	1			T1	3745		T2	396		T3	3094
valid_sources[0x60]	1445613	1			T1	3628		T2	433		T3	3051
valid_sources[0x61]	1594665	1			T1	3716		T2	437		T3	3840
valid_sources[0x62]	2233860	1			T1	3617		T2	448		T3	3443
valid_sources[0x63]	1317962	1			T1	3742		T2	414		T3	3700
valid_sources[0x64]	1321942	1			T1	3693		T2	392		T3	3780
valid_sources[0x65]	1331945	1			T1	3854		T2	419		T3	4125
valid_sources[0x66]	1314617	1			T1	3659		T2	419		T3	3827
valid_sources[0x67]	1373076	1			T1	3603		T2	407		T3	4059
valid_sources[0x68]	1390876	1			T1	3597		T2	405		T3	3506
valid_sources[0x69]	1629763	1			T1	3615		T2	405		T3	3445
valid_sources[0x6a]	3895839	1			T1	3586		T2	399		T3	3511
valid_sources[0x6b]	1320624	1			T1	3739		T2	425		T3	3383
valid_sources[0x6c]	1323071	1			T1	3796		T2	426		T3	3914
valid_sources[0x6d]	3351896	1			T1	3597		T2	440		T3	3412
valid_sources[0x6e]	2255044	1			T1	3676		T2	334		T3	3810
valid_sources[0x6f]	1320473	1			T1	3640		T2	422		T3	3465
valid_sources[0x70]	1983491	1			T1	3627		T2	398		T3	3575
valid_sources[0x71]	1338814	1			T1	3670		T2	409		T3	3646
valid_sources[0x72]	1319674	1			T1	3707		T2	424		T3	3119
valid_sources[0x73]	1318889	1			T1	3692		T2	385		T3	3323
valid_sources[0x74]	1319469	1			T1	3647		T2	409		T3	3061
valid_sources[0x75]	1324252	1			T1	3707		T2	418		T3	3359
valid_sources[0x76]	1787485	1			T1	3730		T2	403		T3	3780
valid_sources[0x77]	1590006	1			T1	3748		T2	397		T3	3752
valid_sources[0x78]	2039050	1			T1	3766		T2	419		T3	4120
valid_sources[0x79]	1315011	1			T1	3646		T2	464		T3	3986
valid_sources[0x7a]	3379541	1			T1	3689		T2	440		T3	3808
valid_sources[0x7b]	1397760	1			T1	3614		T2	399		T3	3480
valid_sources[0x7c]	1418522	1			T1	3632		T2	358		T3	3246
valid_sources[0x7d]	1402022	1			T1	3667		T2	365		T3	3207
valid_sources[0x7e]	1986005	1			T1	3665		T2	430		T3	3768
valid_sources[0x7f]	1367478	1			T1	3751		T2	424		T3	3816
valid_sources[0x80]	3351319	1			T1	3710		T2	390		T3	2832

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

87287730

1

T1

137312

T2

46090

T3

134696

values[0x0]

all_enables

biggest_size

60642840

1

T1

120622

T2

10467

T3

121584

values[0x1]

all_enables

biggest_size

52071008

1

T1

101126

T2

9175

T3

102981