Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 206735796 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 167499782 1 T1 1419 T2 1425 T3 73087



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 197167694 1 T1 1087 T2 1187 T3 78588
values[0x0] 85158598 1 T1 452 T2 527 T3 18110
values[0x1] 91909286 1 T1 545 T2 572 T3 19513



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 161168033 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 213067545 1 T1 1606 T2 1638 T3 82908



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1100791 1 T3 26 T14 37 T15 3407
valid_sources[0x01] 1172167 1 T2 2 T3 26 T14 39
valid_sources[0x02] 1101848 1 T2 7 T3 21 T14 46
valid_sources[0x03] 1256135 1 T2 25 T3 22 T14 10
valid_sources[0x04] 1101883 1 T2 20 T3 22 T14 37
valid_sources[0x05] 1101519 1 T2 11 T3 16 T14 76
valid_sources[0x06] 1096712 1 T3 28 T14 28 T15 3061
valid_sources[0x07] 1103062 1 T3 28 T14 45 T15 3523
valid_sources[0x08] 1091602 1 T2 5 T3 27 T14 49
valid_sources[0x09] 1150529 1 T2 4 T3 26 T14 43
valid_sources[0x0a] 1205721 1 T3 23 T14 42 T15 3422
valid_sources[0x0b] 1165135 1 T3 21 T14 52 T15 3395
valid_sources[0x0c] 1095014 1 T2 1 T3 25 T14 41
valid_sources[0x0d] 1095618 1 T2 25 T3 26 T14 53
valid_sources[0x0e] 1356652 1 T3 34 T14 26 T15 3316
valid_sources[0x0f] 1097260 1 T2 5 T3 19 T14 43
valid_sources[0x10] 1105442 1 T2 13 T3 28 T14 55
valid_sources[0x11] 1099521 1 T2 4 T3 24 T14 50
valid_sources[0x12] 1094819 1 T2 28 T3 25 T14 34
valid_sources[0x13] 1098423 1 T2 57 T3 23 T14 9
valid_sources[0x14] 1593768 1 T3 33 T14 55 T15 3297
valid_sources[0x15] 1094550 1 T3 20 T14 34 T15 3487
valid_sources[0x16] 1095400 1 T3 26 T14 39 T15 3482
valid_sources[0x17] 1092342 1 T2 8 T3 20 T14 28
valid_sources[0x18] 1093440 1 T2 24 T3 36 T14 38
valid_sources[0x19] 1094817 1 T2 18 T3 23 T14 51
valid_sources[0x1a] 4555046 1 T2 18 T3 36 T14 48
valid_sources[0x1b] 1103734 1 T2 19 T3 26 T14 48
valid_sources[0x1c] 1098368 1 T3 22 T14 43 T15 3426
valid_sources[0x1d] 1092766 1 T3 14 T14 33 T15 3383
valid_sources[0x1e] 1111109 1 T3 23 T14 19 T15 3366
valid_sources[0x1f] 1560844 1 T2 17 T3 26 T14 20
valid_sources[0x20] 1191416 1 T3 24 T14 47 T15 3353
valid_sources[0x21] 1094272 1 T3 26 T14 36 T15 3421
valid_sources[0x22] 1094143 1 T2 1 T3 24 T14 20
valid_sources[0x23] 1096107 1 T3 22 T14 71 T15 3520
valid_sources[0x24] 1091201 1 T3 24 T14 49 T15 3378
valid_sources[0x25] 1097077 1 T3 32 T14 30 T15 3243
valid_sources[0x26] 1098121 1 T2 2 T3 21 T14 13
valid_sources[0x27] 1092869 1 T3 25 T14 33 T15 3417
valid_sources[0x28] 1116924 1 T3 18 T14 47 T15 3190
valid_sources[0x29] 1098931 1 T2 5 T3 26 T14 50
valid_sources[0x2a] 2015936 1 T2 6 T3 19 T14 35
valid_sources[0x2b] 1096801 1 T3 27 T14 11 T15 3383
valid_sources[0x2c] 1092691 1 T2 7 T3 18 T14 39
valid_sources[0x2d] 1744507 1 T2 25 T3 22 T14 35
valid_sources[0x2e] 1106718 1 T2 20 T3 23 T14 47
valid_sources[0x2f] 1096369 1 T2 11 T3 20 T14 67
valid_sources[0x30] 1097131 1 T2 1 T3 28 T14 33
valid_sources[0x31] 3500813 1 T2 12 T3 30 T14 30
valid_sources[0x32] 1099896 1 T3 23 T14 76 T15 3381
valid_sources[0x33] 3585349 1 T3 34 T14 61 T15 3318
valid_sources[0x34] 1098638 1 T3 22 T14 33 T15 3420
valid_sources[0x35] 1095116 1 T2 1 T3 20 T14 48
valid_sources[0x36] 1100599 1 T2 18 T3 24 T14 29
valid_sources[0x37] 1092332 1 T2 10 T3 32 T14 26
valid_sources[0x38] 2002947 1 T2 1 T3 30 T14 19
valid_sources[0x39] 3132935 1 T2 14 T3 19 T14 40
valid_sources[0x3a] 1113725 1 T3 24 T14 30 T15 3435
valid_sources[0x3b] 1101196 1 T3 22 T14 44 T15 3492
valid_sources[0x3c] 3603242 1 T3 25 T14 40 T15 3308
valid_sources[0x3d] 1971508 1 T3 19 T14 32 T15 3301
valid_sources[0x3e] 1271396 1 T3 21 T14 39 T15 3437
valid_sources[0x3f] 1095316 1 T2 3 T3 20 T14 29
valid_sources[0x40] 1099425 1 T2 2 T3 27 T14 49
valid_sources[0x41] 1093014 1 T3 29 T14 26 T15 3400
valid_sources[0x42] 1240873 1 T2 1 T3 26 T14 57
valid_sources[0x43] 2023617 1 T3 15 T14 29 T15 3514
valid_sources[0x44] 1098836 1 T2 16 T3 28 T14 27
valid_sources[0x45] 3187298 1 T2 3 T3 34 T14 13
valid_sources[0x46] 1124622 1 T2 29 T3 38 T14 43
valid_sources[0x47] 1126898 1 T2 22 T3 28 T14 26
valid_sources[0x48] 1096029 1 T2 1 T3 21 T14 26
valid_sources[0x49] 1092829 1 T2 6 T3 27 T14 57
valid_sources[0x4a] 1566880 1 T3 26 T14 39 T15 3269
valid_sources[0x4b] 5153907 1 T3 29 T14 42 T15 3342
valid_sources[0x4c] 1096099 1 T2 46 T3 21 T14 45
valid_sources[0x4d] 2144962 1 T2 1 T3 27 T14 22
valid_sources[0x4e] 1097311 1 T2 20 T3 28 T14 35
valid_sources[0x4f] 1413647 1 T2 55 T3 24 T14 74
valid_sources[0x50] 1098261 1 T2 11 T3 19 T14 75
valid_sources[0x51] 1193574 1 T3 18 T14 54 T15 3408
valid_sources[0x52] 1557655 1 T3 25 T14 43 T15 3360
valid_sources[0x53] 1091812 1 T2 20 T3 27 T14 46
valid_sources[0x54] 1095991 1 T2 11 T3 13 T14 34
valid_sources[0x55] 1100636 1 T2 5 T3 26 T14 16
valid_sources[0x56] 1097017 1 T2 11 T3 18 T14 30
valid_sources[0x57] 1100983 1 T3 31 T14 36 T15 3429
valid_sources[0x58] 1091322 1 T2 5 T3 29 T14 40
valid_sources[0x59] 1095396 1 T3 24 T14 47 T15 3445
valid_sources[0x5a] 1093271 1 T3 20 T14 48 T15 3263
valid_sources[0x5b] 1315585 1 T2 38 T3 109959 T14 39
valid_sources[0x5c] 1099476 1 T2 8 T3 25 T14 60
valid_sources[0x5d] 3117623 1 T2 2 T3 20 T14 12
valid_sources[0x5e] 1097049 1 T2 3 T3 36 T14 33
valid_sources[0x5f] 1343173 1 T2 19 T3 32 T14 36
valid_sources[0x60] 1101548 1 T3 19 T14 46 T15 3463
valid_sources[0x61] 1972893 1 T2 28 T3 25 T14 57
valid_sources[0x62] 3833170 1 T2 7 T3 23 T13 206266
valid_sources[0x63] 1974597 1 T2 28 T3 18 T14 28
valid_sources[0x64] 1954996 1 T2 4 T3 33 T14 88
valid_sources[0x65] 1092238 1 T3 21 T14 57 T15 3294
valid_sources[0x66] 1116330 1 T2 13 T3 27 T14 20
valid_sources[0x67] 1093022 1 T3 28 T14 41 T15 3475
valid_sources[0x68] 1151638 1 T3 18 T14 17 T15 3227
valid_sources[0x69] 3659132 1 T2 10 T3 29 T14 27
valid_sources[0x6a] 1097792 1 T2 22 T3 37 T14 6
valid_sources[0x6b] 1100898 1 T3 22 T14 58 T15 3482
valid_sources[0x6c] 1093666 1 T2 9 T3 26 T14 51
valid_sources[0x6d] 3119592 1 T3 19 T14 44 T15 3387
valid_sources[0x6e] 1105470 1 T2 1 T3 19 T14 37
valid_sources[0x6f] 1105915 1 T3 32 T14 31 T15 3173
valid_sources[0x70] 1098506 1 T2 34 T3 22 T14 35
valid_sources[0x71] 1756184 1 T3 24 T14 43 T15 3379
valid_sources[0x72] 1096648 1 T3 24 T14 32 T15 3288
valid_sources[0x73] 1094122 1 T2 30 T3 24 T14 31
valid_sources[0x74] 1091942 1 T3 14 T14 57 T15 3287
valid_sources[0x75] 1950192 1 T2 5 T3 21 T14 62
valid_sources[0x76] 1094543 1 T3 21 T14 39 T15 3556
valid_sources[0x77] 1095747 1 T2 14 T3 25 T14 32
valid_sources[0x78] 1093579 1 T3 20 T14 46 T15 3281
valid_sources[0x79] 1092934 1 T3 23 T14 37 T15 3339
valid_sources[0x7a] 2037673 1 T2 6 T3 20 T14 24
valid_sources[0x7b] 1767550 1 T2 16 T3 26 T14 39
valid_sources[0x7c] 1957961 1 T3 30 T14 54 T15 3288
valid_sources[0x7d] 1100902 1 T2 2 T3 27 T14 30
valid_sources[0x7e] 1104232 1 T2 16 T3 26 T14 35
valid_sources[0x7f] 1098368 1 T3 15 T14 53 T15 3527
valid_sources[0x80] 1095220 1 T3 37 T14 68 T15 3390



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 72890300 1 T1 704 T2 718 T3 52590
values[0x0] all_enables biggest_size 50773490 1 T1 342 T2 357 T3 10945
values[0x1] all_enables biggest_size 43835992 1 T1 373 T2 350 T3 9552

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%