Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
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Group Instance : kmac_reg_block.cfg_shadowed.en_unsupported_modestrength_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.en_unsupported_modestrength_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.en_unsupported_modestrength_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.entropy_fast_process_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.entropy_fast_process_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.entropy_fast_process_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.entropy_mode_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.entropy_mode_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.entropy_mode_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.entropy_ready_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.entropy_ready_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.entropy_ready_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.kmac_en_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.kmac_en_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.kmac_en_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.kstrength_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.kstrength_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.kstrength_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.mode_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.mode_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.mode_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.msg_endianness_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.msg_endianness_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.msg_endianness_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.msg_mask_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.msg_mask_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.msg_mask_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.sideload_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.sideload_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.sideload_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.cfg_shadowed.state_endianness_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.cfg_shadowed.state_endianness_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.cfg_shadowed.state_endianness_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : kmac_reg_block.entropy_refresh_threshold_shadowed.threshold_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance kmac_reg_block.entropy_refresh_threshold_shadowed.threshold_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance kmac_reg_block.entropy_refresh_threshold_shadowed.threshold_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 11 1 T97 1 T98 1 T103 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 13 1 T99 1 T97 1 T100 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 15 1 T94 1 T99 1 T97 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 13 1 T99 1 T97 4 T96 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 14 1 T97 1 T96 1 T98 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 19 1 T99 1 T97 3 T96 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 23 1 T95 1 T99 2 T97 3


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 11 1 T97 1 T96 2 T100 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 17 1 T99 1 T97 4 T100 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 12 1 T93 1 T97 1 T96 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 108977 1 T1 6 T2 6 T12 138



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 14 1 T97 3 T96 1 T100 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 110111 1 T1 6 T2 6 T12 146



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 43 1 T91 4 T92 2 T104 2

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