SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 91.67 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_rma_token_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_secrets_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_otp_lc_data_i_test_tokens_valid_if | 83.33 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_clk_byp_ack_i_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[0].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_flash_rma_ack_i_if.gen_connect_lc_tx_items[1].lc_tx_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
83.33 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 1 | 5 | 83.33 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 1 | 5 | 83.33 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 320 | 1 | T20 | 12 | T52 | 10 | T73 | 6 | ||||
others[1] | 264 | 1 | T20 | 4 | T52 | 14 | T73 | 4 | ||||
others[2] | 286 | 1 | T20 | 7 | T52 | 4 | T73 | 4 | ||||
others[3] | 424 | 1 | T20 | 6 | T52 | 10 | T73 | 9 | ||||
true | 52177 | 1 | T1 | 1 | T2 | 78 | T3 | 75 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
true | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 242 | 1 | T20 | 10 | T52 | 2 | T73 | 4 | ||||
others[1] | 295 | 1 | T20 | 10 | T52 | 14 | T73 | 8 | ||||
others[2] | 266 | 1 | T20 | 10 | T52 | 6 | T73 | 6 | ||||
others[3] | 445 | 1 | T20 | 19 | T52 | 16 | T73 | 4 | ||||
false | 52188 | 1 | T1 | 1 | T2 | 78 | T3 | 75 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 1 | 5 | 83.33 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 250 | 1 | T20 | 2 | T73 | 2 | T53 | 8 | ||||
others[1] | 262 | 1 | T20 | 6 | T52 | 8 | T73 | 2 | ||||
others[2] | 299 | 1 | T20 | 8 | T52 | 4 | T73 | 8 | ||||
others[3] | 466 | 1 | T20 | 19 | T52 | 16 | T73 | 22 | ||||
true | 52173 | 1 | T1 | 1 | T2 | 78 | T3 | 75 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 155 | 1 | T20 | 1 | T52 | 3 | T73 | 2 | ||||
others[1] | 166 | 1 | T20 | 6 | T52 | 3 | T53 | 7 | ||||
others[2] | 150 | 1 | T20 | 7 | T73 | 2 | T53 | 4 | ||||
others[3] | 236 | 1 | T20 | 6 | T52 | 8 | T73 | 6 | ||||
false | 897974 | 1 | T1 | 1 | T2 | 78 | T3 | 75 | ||||
true | 845000 | 1 | T1 | 1 | T4 | 9 | T14 | 6 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 140 | 1 | T20 | 4 | T52 | 3 | T73 | 2 | ||||
others[1] | 136 | 1 | T20 | 5 | T52 | 3 | T73 | 1 | ||||
others[2] | 141 | 1 | T20 | 4 | T52 | 2 | T73 | 4 | ||||
others[3] | 257 | 1 | T20 | 7 | T52 | 5 | T73 | 6 | ||||
false | 2926560 | 1 | T1 | 1 | T2 | 78 | T3 | 77 | ||||
true | 2873691 | 1 | T3 | 2 | T4 | 2 | T14 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 140 | 1 | T20 | 4 | T52 | 3 | T73 | 2 | ||||
others[1] | 136 | 1 | T20 | 5 | T52 | 3 | T73 | 1 | ||||
others[2] | 141 | 1 | T20 | 4 | T52 | 2 | T73 | 4 | ||||
others[3] | 257 | 1 | T20 | 7 | T52 | 5 | T73 | 6 | ||||
false | 2926560 | 1 | T1 | 1 | T2 | 78 | T3 | 77 | ||||
true | 2873691 | 1 | T3 | 2 | T4 | 2 | T14 | 2 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |