| T610 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_errors.3145998624 |
|
|
Aug 23 10:15:34 PM UTC 24 |
Aug 23 10:15:46 PM UTC 24 |
1788314078 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2265474954 |
|
|
Aug 23 10:15:45 PM UTC 24 |
Aug 23 10:15:47 PM UTC 24 |
23628170 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_post_trans.112839446 |
|
|
Aug 23 10:15:45 PM UTC 24 |
Aug 23 10:15:49 PM UTC 24 |
452478744 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.460656938 |
|
|
Aug 23 10:15:39 PM UTC 24 |
Aug 23 10:15:49 PM UTC 24 |
4234312754 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_jtag_access.3952644292 |
|
|
Aug 23 10:15:47 PM UTC 24 |
Aug 23 10:15:50 PM UTC 24 |
663185801 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.2197471631 |
|
|
Aug 23 10:15:46 PM UTC 24 |
Aug 23 10:15:50 PM UTC 24 |
248633874 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.1566199306 |
|
|
Aug 23 10:12:11 PM UTC 24 |
Aug 23 10:15:52 PM UTC 24 |
29412194362 ps |
| T49 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all_with_rand_reset.303030817 |
|
|
Aug 23 10:14:26 PM UTC 24 |
Aug 23 10:15:53 PM UTC 24 |
5958052925 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_stress_all.4287074627 |
|
|
Aug 23 10:13:50 PM UTC 24 |
Aug 23 10:15:53 PM UTC 24 |
4591173652 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.833545977 |
|
|
Aug 23 10:16:29 PM UTC 24 |
Aug 23 10:16:31 PM UTC 24 |
112187482 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.4162918458 |
|
|
Aug 23 10:14:36 PM UTC 24 |
Aug 23 10:15:55 PM UTC 24 |
3126546404 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.1014017099 |
|
|
Aug 23 10:15:53 PM UTC 24 |
Aug 23 10:15:55 PM UTC 24 |
15063215 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.512024940 |
|
|
Aug 23 10:15:25 PM UTC 24 |
Aug 23 10:16:31 PM UTC 24 |
9392101762 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1693041552 |
|
|
Aug 23 10:15:53 PM UTC 24 |
Aug 23 10:15:55 PM UTC 24 |
25509368 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.3275865315 |
|
|
Aug 23 10:15:47 PM UTC 24 |
Aug 23 10:15:57 PM UTC 24 |
227317227 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.3427790698 |
|
|
Aug 23 10:15:33 PM UTC 24 |
Aug 23 10:15:58 PM UTC 24 |
1313168161 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_errors.3814336521 |
|
|
Aug 23 10:15:47 PM UTC 24 |
Aug 23 10:15:59 PM UTC 24 |
270280055 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.2326645861 |
|
|
Aug 23 10:15:56 PM UTC 24 |
Aug 23 10:15:59 PM UTC 24 |
97129551 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.3200394397 |
|
|
Aug 23 10:15:51 PM UTC 24 |
Aug 23 10:16:01 PM UTC 24 |
951522482 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.1054289 |
|
|
Aug 23 10:15:53 PM UTC 24 |
Aug 23 10:16:01 PM UTC 24 |
244307761 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.725142862 |
|
|
Aug 23 10:15:49 PM UTC 24 |
Aug 23 10:16:02 PM UTC 24 |
326309858 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.2984490677 |
|
|
Aug 23 10:16:02 PM UTC 24 |
Aug 23 10:16:04 PM UTC 24 |
20346337 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.377431236 |
|
|
Aug 23 10:15:45 PM UTC 24 |
Aug 23 10:16:04 PM UTC 24 |
1710604778 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_errors.3927816806 |
|
|
Aug 23 10:15:56 PM UTC 24 |
Aug 23 10:16:05 PM UTC 24 |
1207428321 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.1162158297 |
|
|
Aug 23 10:15:51 PM UTC 24 |
Aug 23 10:16:06 PM UTC 24 |
1906774246 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.3788575319 |
|
|
Aug 23 10:15:56 PM UTC 24 |
Aug 23 10:16:06 PM UTC 24 |
1839864823 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.3497074208 |
|
|
Aug 23 10:15:56 PM UTC 24 |
Aug 23 10:16:07 PM UTC 24 |
359682281 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.555967817 |
|
|
Aug 23 10:16:06 PM UTC 24 |
Aug 23 10:16:07 PM UTC 24 |
114293302 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_errors.1588652072 |
|
|
Aug 23 10:16:21 PM UTC 24 |
Aug 23 10:16:32 PM UTC 24 |
3238197429 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.1727814577 |
|
|
Aug 23 10:16:06 PM UTC 24 |
Aug 23 10:16:09 PM UTC 24 |
144732887 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.1564704242 |
|
|
Aug 23 10:15:59 PM UTC 24 |
Aug 23 10:16:09 PM UTC 24 |
970202373 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.3327003822 |
|
|
Aug 23 10:15:58 PM UTC 24 |
Aug 23 10:16:09 PM UTC 24 |
413345091 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.3439214159 |
|
|
Aug 23 10:15:59 PM UTC 24 |
Aug 23 10:16:10 PM UTC 24 |
1605395904 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.3740241910 |
|
|
Aug 23 10:16:07 PM UTC 24 |
Aug 23 10:16:11 PM UTC 24 |
670887019 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.394161047 |
|
|
Aug 23 10:16:09 PM UTC 24 |
Aug 23 10:16:12 PM UTC 24 |
410630269 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.611462833 |
|
|
Aug 23 10:16:07 PM UTC 24 |
Aug 23 10:16:16 PM UTC 24 |
74463052 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.3164412431 |
|
|
Aug 23 10:15:59 PM UTC 24 |
Aug 23 10:16:16 PM UTC 24 |
1791247217 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.1810798790 |
|
|
Aug 23 10:16:16 PM UTC 24 |
Aug 23 10:16:18 PM UTC 24 |
49049152 ps |
| T75 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.2417828736 |
|
|
Aug 23 10:14:09 PM UTC 24 |
Aug 23 10:16:18 PM UTC 24 |
27992253480 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.1379357914 |
|
|
Aug 23 10:16:11 PM UTC 24 |
Aug 23 10:16:18 PM UTC 24 |
554100682 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.2689080382 |
|
|
Aug 23 10:16:08 PM UTC 24 |
Aug 23 10:16:19 PM UTC 24 |
575202913 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all.791127274 |
|
|
Aug 23 10:14:59 PM UTC 24 |
Aug 23 10:16:19 PM UTC 24 |
2088274148 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.2697284400 |
|
|
Aug 23 10:16:18 PM UTC 24 |
Aug 23 10:16:20 PM UTC 24 |
12710440 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.1041000113 |
|
|
Aug 23 10:16:09 PM UTC 24 |
Aug 23 10:16:21 PM UTC 24 |
240654318 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_errors.874810380 |
|
|
Aug 23 10:16:07 PM UTC 24 |
Aug 23 10:16:21 PM UTC 24 |
1576279169 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.1921479910 |
|
|
Aug 23 10:16:19 PM UTC 24 |
Aug 23 10:16:22 PM UTC 24 |
18163673 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all.381823889 |
|
|
Aug 23 10:15:51 PM UTC 24 |
Aug 23 10:16:22 PM UTC 24 |
953302272 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.1179114777 |
|
|
Aug 23 10:16:11 PM UTC 24 |
Aug 23 10:16:23 PM UTC 24 |
852346847 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.1341950183 |
|
|
Aug 23 10:16:17 PM UTC 24 |
Aug 23 10:16:24 PM UTC 24 |
1251234386 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.560236344 |
|
|
Aug 23 10:16:22 PM UTC 24 |
Aug 23 10:16:26 PM UTC 24 |
127643168 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_state_failure.3252811799 |
|
|
Aug 23 10:15:56 PM UTC 24 |
Aug 23 10:16:27 PM UTC 24 |
1304684637 ps |
| T159 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.2042131921 |
|
|
Aug 23 10:15:26 PM UTC 24 |
Aug 23 10:16:27 PM UTC 24 |
1343273742 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.2268309630 |
|
|
Aug 23 10:16:21 PM UTC 24 |
Aug 23 10:16:29 PM UTC 24 |
611757701 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.1435799784 |
|
|
Aug 23 10:16:19 PM UTC 24 |
Aug 23 10:16:29 PM UTC 24 |
386822657 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.2254406758 |
|
|
Aug 23 10:16:27 PM UTC 24 |
Aug 23 10:16:30 PM UTC 24 |
25171643 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.3658019188 |
|
|
Aug 23 10:16:23 PM UTC 24 |
Aug 23 10:16:31 PM UTC 24 |
815144407 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.1565749643 |
|
|
Aug 23 10:16:28 PM UTC 24 |
Aug 23 10:16:31 PM UTC 24 |
92443550 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/4.lc_ctrl_stress_all.1133339241 |
|
|
Aug 23 10:08:21 PM UTC 24 |
Aug 23 10:16:33 PM UTC 24 |
18247550311 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.558153342 |
|
|
Aug 23 10:16:22 PM UTC 24 |
Aug 23 10:16:34 PM UTC 24 |
2593036666 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.1105796721 |
|
|
Aug 23 10:16:07 PM UTC 24 |
Aug 23 10:16:35 PM UTC 24 |
630845066 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.3175974405 |
|
|
Aug 23 10:16:23 PM UTC 24 |
Aug 23 10:16:35 PM UTC 24 |
859360428 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.2904907522 |
|
|
Aug 23 10:16:32 PM UTC 24 |
Aug 23 10:16:36 PM UTC 24 |
45779122 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.2221402477 |
|
|
Aug 23 10:16:31 PM UTC 24 |
Aug 23 10:16:37 PM UTC 24 |
548473369 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.1682699289 |
|
|
Aug 23 10:16:30 PM UTC 24 |
Aug 23 10:16:37 PM UTC 24 |
63036298 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.1543483185 |
|
|
Aug 23 10:16:36 PM UTC 24 |
Aug 23 10:16:39 PM UTC 24 |
20202528 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.2807299116 |
|
|
Aug 23 10:16:37 PM UTC 24 |
Aug 23 10:16:39 PM UTC 24 |
54742262 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.971069757 |
|
|
Aug 23 10:16:38 PM UTC 24 |
Aug 23 10:16:40 PM UTC 24 |
39439548 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.3077856389 |
|
|
Aug 23 10:16:32 PM UTC 24 |
Aug 23 10:16:44 PM UTC 24 |
319552255 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.3693451178 |
|
|
Aug 23 10:16:32 PM UTC 24 |
Aug 23 10:16:44 PM UTC 24 |
331153190 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_errors.2124360853 |
|
|
Aug 23 10:16:31 PM UTC 24 |
Aug 23 10:16:44 PM UTC 24 |
1660340428 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.1386045751 |
|
|
Aug 23 10:16:40 PM UTC 24 |
Aug 23 10:16:44 PM UTC 24 |
70449073 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.343013007 |
|
|
Aug 23 10:16:19 PM UTC 24 |
Aug 23 10:16:47 PM UTC 24 |
258756248 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1351573668 |
|
|
Aug 23 10:16:39 PM UTC 24 |
Aug 23 10:16:47 PM UTC 24 |
75208210 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.2837763399 |
|
|
Aug 23 10:16:34 PM UTC 24 |
Aug 23 10:16:47 PM UTC 24 |
2641569739 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.2593841931 |
|
|
Aug 23 10:16:45 PM UTC 24 |
Aug 23 10:16:53 PM UTC 24 |
336948645 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.280773107 |
|
|
Aug 23 10:16:45 PM UTC 24 |
Aug 23 10:16:54 PM UTC 24 |
305256138 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.1070385549 |
|
|
Aug 23 10:14:48 PM UTC 24 |
Aug 23 10:16:55 PM UTC 24 |
22109171604 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_errors.2894670223 |
|
|
Aug 23 10:16:40 PM UTC 24 |
Aug 23 10:16:56 PM UTC 24 |
1792798493 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.4194510828 |
|
|
Aug 23 10:16:54 PM UTC 24 |
Aug 23 10:16:56 PM UTC 24 |
14434906 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.3868285388 |
|
|
Aug 23 10:16:35 PM UTC 24 |
Aug 23 10:16:56 PM UTC 24 |
4259123727 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.865715252 |
|
|
Aug 23 10:16:45 PM UTC 24 |
Aug 23 10:16:57 PM UTC 24 |
882659815 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.2947577430 |
|
|
Aug 23 10:16:45 PM UTC 24 |
Aug 23 10:16:57 PM UTC 24 |
1534958068 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.3683088103 |
|
|
Aug 23 10:16:38 PM UTC 24 |
Aug 23 10:16:58 PM UTC 24 |
822016751 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.979021555 |
|
|
Aug 23 10:16:55 PM UTC 24 |
Aug 23 10:16:58 PM UTC 24 |
25308931 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1059050854 |
|
|
Aug 23 10:16:57 PM UTC 24 |
Aug 23 10:16:59 PM UTC 24 |
14641300 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.2153310707 |
|
|
Aug 23 10:16:49 PM UTC 24 |
Aug 23 10:16:59 PM UTC 24 |
1305296742 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.2356123243 |
|
|
Aug 23 10:17:42 PM UTC 24 |
Aug 23 10:17:51 PM UTC 24 |
530717476 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.2944760515 |
|
|
Aug 23 10:16:57 PM UTC 24 |
Aug 23 10:17:01 PM UTC 24 |
153037520 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.2759830457 |
|
|
Aug 23 10:16:30 PM UTC 24 |
Aug 23 10:17:01 PM UTC 24 |
290370678 ps |
| T50 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.3073492287 |
|
|
Aug 23 10:14:26 PM UTC 24 |
Aug 23 10:17:02 PM UTC 24 |
7235622844 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.4048412725 |
|
|
Aug 23 10:17:02 PM UTC 24 |
Aug 23 10:17:04 PM UTC 24 |
18679971 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.2779192767 |
|
|
Aug 23 10:16:57 PM UTC 24 |
Aug 23 10:17:05 PM UTC 24 |
154284914 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.824391378 |
|
|
Aug 23 10:17:05 PM UTC 24 |
Aug 23 10:17:07 PM UTC 24 |
18676073 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.67528724 |
|
|
Aug 23 10:17:04 PM UTC 24 |
Aug 23 10:17:07 PM UTC 24 |
315743614 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.705615203 |
|
|
Aug 23 10:16:58 PM UTC 24 |
Aug 23 10:17:07 PM UTC 24 |
306516791 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/29.lc_ctrl_stress_all_with_rand_reset.1503798184 |
|
|
Aug 23 10:16:01 PM UTC 24 |
Aug 23 10:17:07 PM UTC 24 |
1714438561 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_errors.1330940090 |
|
|
Aug 23 10:16:58 PM UTC 24 |
Aug 23 10:17:08 PM UTC 24 |
406661671 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.3271272932 |
|
|
Aug 23 10:17:00 PM UTC 24 |
Aug 23 10:17:08 PM UTC 24 |
6189343535 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.2078686048 |
|
|
Aug 23 10:17:00 PM UTC 24 |
Aug 23 10:17:10 PM UTC 24 |
1634835674 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.656007151 |
|
|
Aug 23 10:17:00 PM UTC 24 |
Aug 23 10:17:12 PM UTC 24 |
886201161 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.3495617506 |
|
|
Aug 23 10:17:09 PM UTC 24 |
Aug 23 10:17:13 PM UTC 24 |
62791501 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.3954632003 |
|
|
Aug 23 10:17:00 PM UTC 24 |
Aug 23 10:17:15 PM UTC 24 |
1619754975 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.127092627 |
|
|
Aug 23 10:17:09 PM UTC 24 |
Aug 23 10:17:16 PM UTC 24 |
486701241 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.2998014334 |
|
|
Aug 23 10:17:07 PM UTC 24 |
Aug 23 10:17:18 PM UTC 24 |
400219046 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.3323790065 |
|
|
Aug 23 10:17:09 PM UTC 24 |
Aug 23 10:17:18 PM UTC 24 |
975619252 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.157621039 |
|
|
Aug 23 10:17:17 PM UTC 24 |
Aug 23 10:17:19 PM UTC 24 |
59961790 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.1964917453 |
|
|
Aug 23 10:17:10 PM UTC 24 |
Aug 23 10:17:20 PM UTC 24 |
245931866 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.2410953304 |
|
|
Aug 23 10:17:11 PM UTC 24 |
Aug 23 10:17:21 PM UTC 24 |
1618689473 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.1275442746 |
|
|
Aug 23 10:17:19 PM UTC 24 |
Aug 23 10:17:21 PM UTC 24 |
29885125 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.3114562720 |
|
|
Aug 23 10:17:19 PM UTC 24 |
Aug 23 10:17:21 PM UTC 24 |
31251433 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.1604047693 |
|
|
Aug 23 10:17:12 PM UTC 24 |
Aug 23 10:17:25 PM UTC 24 |
1058572738 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_errors.2741597643 |
|
|
Aug 23 10:17:09 PM UTC 24 |
Aug 23 10:17:25 PM UTC 24 |
5147843063 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.3326439924 |
|
|
Aug 23 10:16:57 PM UTC 24 |
Aug 23 10:17:26 PM UTC 24 |
537758278 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.4150385937 |
|
|
Aug 23 10:17:22 PM UTC 24 |
Aug 23 10:17:26 PM UTC 24 |
93197691 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.1683278558 |
|
|
Aug 23 10:17:21 PM UTC 24 |
Aug 23 10:17:27 PM UTC 24 |
186128523 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.181174613 |
|
|
Aug 23 10:17:06 PM UTC 24 |
Aug 23 10:17:28 PM UTC 24 |
241762610 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.4038215017 |
|
|
Aug 23 10:17:22 PM UTC 24 |
Aug 23 10:17:28 PM UTC 24 |
159474204 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.1546868092 |
|
|
Aug 23 10:17:29 PM UTC 24 |
Aug 23 10:17:31 PM UTC 24 |
30843112 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.1012346001 |
|
|
Aug 23 10:17:26 PM UTC 24 |
Aug 23 10:17:32 PM UTC 24 |
5033684198 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_errors.2241933177 |
|
|
Aug 23 10:17:22 PM UTC 24 |
Aug 23 10:17:32 PM UTC 24 |
1422711223 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.1488755776 |
|
|
Aug 23 10:17:33 PM UTC 24 |
Aug 23 10:17:35 PM UTC 24 |
162437935 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.3624003340 |
|
|
Aug 23 10:17:33 PM UTC 24 |
Aug 23 10:17:36 PM UTC 24 |
223899661 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.1071720185 |
|
|
Aug 23 10:17:27 PM UTC 24 |
Aug 23 10:17:37 PM UTC 24 |
262901355 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.654799905 |
|
|
Aug 23 10:15:52 PM UTC 24 |
Aug 23 10:17:38 PM UTC 24 |
3902214187 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.2393806022 |
|
|
Aug 23 10:16:13 PM UTC 24 |
Aug 23 10:17:38 PM UTC 24 |
10321886913 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.1567644217 |
|
|
Aug 23 10:17:26 PM UTC 24 |
Aug 23 10:17:39 PM UTC 24 |
1572829686 ps |
| T192 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.1815682098 |
|
|
Aug 23 10:17:36 PM UTC 24 |
Aug 23 10:17:39 PM UTC 24 |
126160297 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all_with_rand_reset.665076419 |
|
|
Aug 23 10:17:16 PM UTC 24 |
Aug 23 10:17:40 PM UTC 24 |
1538152684 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/33.lc_ctrl_stress_all.3576934311 |
|
|
Aug 23 10:16:49 PM UTC 24 |
Aug 23 10:17:40 PM UTC 24 |
2896797814 ps |
| T194 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.2803646928 |
|
|
Aug 23 10:17:35 PM UTC 24 |
Aug 23 10:17:41 PM UTC 24 |
191761179 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.1620306297 |
|
|
Aug 23 10:17:27 PM UTC 24 |
Aug 23 10:17:43 PM UTC 24 |
1987878990 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3762831740 |
|
|
Aug 23 10:17:44 PM UTC 24 |
Aug 23 10:17:46 PM UTC 24 |
81499705 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3691421331 |
|
|
Aug 23 10:17:39 PM UTC 24 |
Aug 23 10:17:47 PM UTC 24 |
889899572 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.2015203696 |
|
|
Aug 23 10:17:20 PM UTC 24 |
Aug 23 10:17:47 PM UTC 24 |
602740241 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.3090755180 |
|
|
Aug 23 10:17:39 PM UTC 24 |
Aug 23 10:17:48 PM UTC 24 |
277697784 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.2533690227 |
|
|
Aug 23 10:17:48 PM UTC 24 |
Aug 23 10:17:50 PM UTC 24 |
14341825 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.2333494743 |
|
|
Aug 23 10:17:39 PM UTC 24 |
Aug 23 10:17:50 PM UTC 24 |
1261857191 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.980018142 |
|
|
Aug 23 10:17:39 PM UTC 24 |
Aug 23 10:17:52 PM UTC 24 |
1561287589 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.443935332 |
|
|
Aug 23 10:17:48 PM UTC 24 |
Aug 23 10:17:52 PM UTC 24 |
130535371 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.4097966322 |
|
|
Aug 23 10:17:41 PM UTC 24 |
Aug 23 10:17:52 PM UTC 24 |
321830423 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.2485309355 |
|
|
Aug 23 10:17:50 PM UTC 24 |
Aug 23 10:17:54 PM UTC 24 |
225360845 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.970409915 |
|
|
Aug 23 10:17:49 PM UTC 24 |
Aug 23 10:17:56 PM UTC 24 |
223254512 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/36.lc_ctrl_stress_all.2755896680 |
|
|
Aug 23 10:17:28 PM UTC 24 |
Aug 23 10:17:56 PM UTC 24 |
1349160740 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.52675289 |
|
|
Aug 23 10:17:52 PM UTC 24 |
Aug 23 10:17:59 PM UTC 24 |
1133789837 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.1033299793 |
|
|
Aug 23 10:17:58 PM UTC 24 |
Aug 23 10:18:00 PM UTC 24 |
41300607 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.2748130150 |
|
|
Aug 23 10:17:53 PM UTC 24 |
Aug 23 10:18:00 PM UTC 24 |
481784658 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.3273260102 |
|
|
Aug 23 10:17:53 PM UTC 24 |
Aug 23 10:18:02 PM UTC 24 |
574864559 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_errors.3550259024 |
|
|
Aug 23 10:17:52 PM UTC 24 |
Aug 23 10:18:02 PM UTC 24 |
746814493 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.4053050720 |
|
|
Aug 23 10:17:53 PM UTC 24 |
Aug 23 10:18:02 PM UTC 24 |
169701793 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.130109034 |
|
|
Aug 23 10:18:00 PM UTC 24 |
Aug 23 10:18:02 PM UTC 24 |
40938620 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.2954914903 |
|
|
Aug 23 10:18:00 PM UTC 24 |
Aug 23 10:18:03 PM UTC 24 |
141493797 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.578703739 |
|
|
Aug 23 10:18:03 PM UTC 24 |
Aug 23 10:18:06 PM UTC 24 |
42419232 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all.1409844486 |
|
|
Aug 23 10:15:15 PM UTC 24 |
Aug 23 10:18:08 PM UTC 24 |
6825126383 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.2530450264 |
|
|
Aug 23 10:17:34 PM UTC 24 |
Aug 23 10:18:10 PM UTC 24 |
2203563931 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.24760374 |
|
|
Aug 23 10:16:35 PM UTC 24 |
Aug 23 10:18:12 PM UTC 24 |
3127171356 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.3874210788 |
|
|
Aug 23 10:18:03 PM UTC 24 |
Aug 23 10:18:13 PM UTC 24 |
229676921 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.1444141646 |
|
|
Aug 23 10:18:04 PM UTC 24 |
Aug 23 10:18:13 PM UTC 24 |
632180783 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.1207064275 |
|
|
Aug 23 10:17:54 PM UTC 24 |
Aug 23 10:18:14 PM UTC 24 |
1385955234 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.3845203359 |
|
|
Aug 23 10:18:06 PM UTC 24 |
Aug 23 10:18:14 PM UTC 24 |
282101474 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.2948982604 |
|
|
Aug 23 10:18:03 PM UTC 24 |
Aug 23 10:18:14 PM UTC 24 |
317437097 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.3962277727 |
|
|
Aug 23 10:18:14 PM UTC 24 |
Aug 23 10:18:16 PM UTC 24 |
92455329 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_errors.3655762720 |
|
|
Aug 23 10:18:03 PM UTC 24 |
Aug 23 10:18:16 PM UTC 24 |
307098739 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.3894587853 |
|
|
Aug 23 10:18:14 PM UTC 24 |
Aug 23 10:18:17 PM UTC 24 |
80927765 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.2518972040 |
|
|
Aug 23 10:18:15 PM UTC 24 |
Aug 23 10:18:17 PM UTC 24 |
15020070 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.2933529527 |
|
|
Aug 23 10:18:07 PM UTC 24 |
Aug 23 10:18:17 PM UTC 24 |
799281113 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.1899610902 |
|
|
Aug 23 10:18:16 PM UTC 24 |
Aug 23 10:18:19 PM UTC 24 |
67810374 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.36798683 |
|
|
Aug 23 10:17:49 PM UTC 24 |
Aug 23 10:18:20 PM UTC 24 |
1628604016 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all.114617082 |
|
|
Aug 23 10:15:39 PM UTC 24 |
Aug 23 10:18:21 PM UTC 24 |
24584523595 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.3518381420 |
|
|
Aug 23 10:18:15 PM UTC 24 |
Aug 23 10:18:23 PM UTC 24 |
54883909 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.2123258039 |
|
|
Aug 23 10:18:18 PM UTC 24 |
Aug 23 10:18:27 PM UTC 24 |
800946803 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_errors.2619045575 |
|
|
Aug 23 10:18:18 PM UTC 24 |
Aug 23 10:18:27 PM UTC 24 |
573879811 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.1519633712 |
|
|
Aug 23 10:18:18 PM UTC 24 |
Aug 23 10:18:28 PM UTC 24 |
333454812 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3137211170 |
|
|
Aug 23 10:18:02 PM UTC 24 |
Aug 23 10:18:29 PM UTC 24 |
272742550 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.2751795092 |
|
|
Aug 23 10:18:20 PM UTC 24 |
Aug 23 10:18:30 PM UTC 24 |
391663631 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.1829235646 |
|
|
Aug 23 10:18:29 PM UTC 24 |
Aug 23 10:18:31 PM UTC 24 |
44577218 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.2623348872 |
|
|
Aug 23 10:18:29 PM UTC 24 |
Aug 23 10:18:31 PM UTC 24 |
11209912 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.1289322379 |
|
|
Aug 23 10:18:18 PM UTC 24 |
Aug 23 10:18:31 PM UTC 24 |
320935472 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.1616523337 |
|
|
Aug 23 10:18:29 PM UTC 24 |
Aug 23 10:18:32 PM UTC 24 |
31492037 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.3409460070 |
|
|
Aug 23 10:18:09 PM UTC 24 |
Aug 23 10:18:32 PM UTC 24 |
6249345477 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.3670104001 |
|
|
Aug 23 10:18:22 PM UTC 24 |
Aug 23 10:18:33 PM UTC 24 |
628888590 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/34.lc_ctrl_stress_all_with_rand_reset.894272307 |
|
|
Aug 23 10:17:01 PM UTC 24 |
Aug 23 10:18:33 PM UTC 24 |
5179736425 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.1337859026 |
|
|
Aug 23 10:18:31 PM UTC 24 |
Aug 23 10:18:36 PM UTC 24 |
180690051 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.2675591294 |
|
|
Aug 23 10:18:33 PM UTC 24 |
Aug 23 10:18:38 PM UTC 24 |
398341283 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.2214812140 |
|
|
Aug 23 10:18:33 PM UTC 24 |
Aug 23 10:18:41 PM UTC 24 |
2071120851 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.1621005737 |
|
|
Aug 23 10:18:34 PM UTC 24 |
Aug 23 10:18:42 PM UTC 24 |
954170303 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.3920560443 |
|
|
Aug 23 10:18:15 PM UTC 24 |
Aug 23 10:18:44 PM UTC 24 |
649095666 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.2889609515 |
|
|
Aug 23 10:18:42 PM UTC 24 |
Aug 23 10:18:44 PM UTC 24 |
26648515 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.2925494499 |
|
|
Aug 23 10:18:34 PM UTC 24 |
Aug 23 10:18:44 PM UTC 24 |
442431152 ps |
| T51 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_errors.3303428468 |
|
|
Aug 23 10:18:33 PM UTC 24 |
Aug 23 10:18:45 PM UTC 24 |
2210805735 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.1090495074 |
|
|
Aug 23 10:18:43 PM UTC 24 |
Aug 23 10:18:46 PM UTC 24 |
58764717 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.1301868836 |
|
|
Aug 23 10:18:33 PM UTC 24 |
Aug 23 10:18:47 PM UTC 24 |
1420570099 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.134222848 |
|
|
Aug 23 10:18:33 PM UTC 24 |
Aug 23 10:18:47 PM UTC 24 |
433864838 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.2765514722 |
|
|
Aug 23 10:18:46 PM UTC 24 |
Aug 23 10:18:48 PM UTC 24 |
22924327 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all.622125313 |
|
|
Aug 23 10:17:56 PM UTC 24 |
Aug 23 10:18:50 PM UTC 24 |
4193201315 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.3610908443 |
|
|
Aug 23 10:18:49 PM UTC 24 |
Aug 23 10:18:51 PM UTC 24 |
104584568 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.1410846125 |
|
|
Aug 23 10:18:47 PM UTC 24 |
Aug 23 10:18:54 PM UTC 24 |
157653707 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.1421315905 |
|
|
Aug 23 10:18:46 PM UTC 24 |
Aug 23 10:18:57 PM UTC 24 |
250257309 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.1229708716 |
|
|
Aug 23 10:18:49 PM UTC 24 |
Aug 23 10:18:57 PM UTC 24 |
1775504288 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.139917235 |
|
|
Aug 23 10:18:30 PM UTC 24 |
Aug 23 10:18:58 PM UTC 24 |
771280682 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.1980231820 |
|
|
Aug 23 10:18:57 PM UTC 24 |
Aug 23 10:18:59 PM UTC 24 |
37773182 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.3720439371 |
|
|
Aug 23 10:18:49 PM UTC 24 |
Aug 23 10:19:00 PM UTC 24 |
2241862726 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_errors.696366806 |
|
|
Aug 23 10:18:47 PM UTC 24 |
Aug 23 10:19:01 PM UTC 24 |
703475378 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.4254485076 |
|
|
Aug 23 10:18:59 PM UTC 24 |
Aug 23 10:19:01 PM UTC 24 |
73265371 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2665228967 |
|
|
Aug 23 10:19:00 PM UTC 24 |
Aug 23 10:19:02 PM UTC 24 |
18069690 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.2023196196 |
|
|
Aug 23 10:18:52 PM UTC 24 |
Aug 23 10:19:03 PM UTC 24 |
4862999785 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.196812711 |
|
|
Aug 23 10:18:52 PM UTC 24 |
Aug 23 10:19:05 PM UTC 24 |
681007084 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.1421400652 |
|
|
Aug 23 10:19:03 PM UTC 24 |
Aug 23 10:19:06 PM UTC 24 |
88818402 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.1365426033 |
|
|
Aug 23 10:19:03 PM UTC 24 |
Aug 23 10:19:06 PM UTC 24 |
129447074 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_stress_all.971523113 |
|
|
Aug 23 10:16:12 PM UTC 24 |
Aug 23 10:19:07 PM UTC 24 |
27797021839 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/38.lc_ctrl_stress_all_with_rand_reset.939874251 |
|
|
Aug 23 10:17:57 PM UTC 24 |
Aug 23 10:19:12 PM UTC 24 |
13954996432 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_errors.1858241519 |
|
|
Aug 23 10:19:03 PM UTC 24 |
Aug 23 10:19:14 PM UTC 24 |
455542407 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.2061393575 |
|
|
Aug 23 10:19:04 PM UTC 24 |
Aug 23 10:19:14 PM UTC 24 |
2082855715 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.157696331 |
|
|
Aug 23 10:16:24 PM UTC 24 |
Aug 23 10:19:15 PM UTC 24 |
30207047198 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.3146366715 |
|
|
Aug 23 10:19:08 PM UTC 24 |
Aug 23 10:19:16 PM UTC 24 |
353686162 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/40.lc_ctrl_stress_all_with_rand_reset.668635072 |
|
|
Aug 23 10:18:24 PM UTC 24 |
Aug 23 10:19:17 PM UTC 24 |
1803251786 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.2058029718 |
|
|
Aug 23 10:19:15 PM UTC 24 |
Aug 23 10:19:17 PM UTC 24 |
21857284 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.3253972130 |
|
|
Aug 23 10:19:06 PM UTC 24 |
Aug 23 10:19:17 PM UTC 24 |
445251321 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.1307274800 |
|
|
Aug 23 10:19:16 PM UTC 24 |
Aug 23 10:19:18 PM UTC 24 |
50584290 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.2173593629 |
|
|
Aug 23 10:19:17 PM UTC 24 |
Aug 23 10:19:19 PM UTC 24 |
52107026 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.1890316962 |
|
|
Aug 23 10:19:08 PM UTC 24 |
Aug 23 10:19:21 PM UTC 24 |
304414383 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.3929524852 |
|
|
Aug 23 10:19:19 PM UTC 24 |
Aug 23 10:19:21 PM UTC 24 |
26150910 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.2339980116 |
|
|
Aug 23 10:19:06 PM UTC 24 |
Aug 23 10:19:22 PM UTC 24 |
562522980 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.2133191359 |
|
|
Aug 23 10:18:46 PM UTC 24 |
Aug 23 10:19:23 PM UTC 24 |
954115660 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.3222448932 |
|
|
Aug 23 10:19:01 PM UTC 24 |
Aug 23 10:19:24 PM UTC 24 |
209648759 ps |
| T189 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all_with_rand_reset.4117133318 |
|
|
Aug 23 10:16:24 PM UTC 24 |
Aug 23 10:19:25 PM UTC 24 |
27002095317 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.3412342545 |
|
|
Aug 23 10:19:17 PM UTC 24 |
Aug 23 10:19:26 PM UTC 24 |
109379431 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.61202182 |
|
|
Aug 23 10:19:20 PM UTC 24 |
Aug 23 10:19:28 PM UTC 24 |
285821535 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.3889312457 |
|
|
Aug 23 10:19:27 PM UTC 24 |
Aug 23 10:19:29 PM UTC 24 |
22182854 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.442639046 |
|
|
Aug 23 10:19:22 PM UTC 24 |
Aug 23 10:19:30 PM UTC 24 |
2443538944 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_errors.3573295883 |
|
|
Aug 23 10:19:19 PM UTC 24 |
Aug 23 10:19:31 PM UTC 24 |
289054646 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.3672652518 |
|
|
Aug 23 10:19:29 PM UTC 24 |
Aug 23 10:19:31 PM UTC 24 |
53678303 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.55969342 |
|
|
Aug 23 10:19:30 PM UTC 24 |
Aug 23 10:19:32 PM UTC 24 |
20190519 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all.2134886082 |
|
|
Aug 23 10:17:14 PM UTC 24 |
Aug 23 10:19:34 PM UTC 24 |
22577898570 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.2110069309 |
|
|
Aug 23 10:19:24 PM UTC 24 |
Aug 23 10:19:35 PM UTC 24 |
4762434683 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.3561381621 |
|
|
Aug 23 10:19:25 PM UTC 24 |
Aug 23 10:19:36 PM UTC 24 |
1192684020 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.4219931310 |
|
|
Aug 23 10:19:22 PM UTC 24 |
Aug 23 10:19:36 PM UTC 24 |
691908550 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.1920847938 |
|
|
Aug 23 10:19:33 PM UTC 24 |
Aug 23 10:19:37 PM UTC 24 |
70262162 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/43.lc_ctrl_stress_all.3791317150 |
|
|
Aug 23 10:19:13 PM UTC 24 |
Aug 23 10:19:39 PM UTC 24 |
903689263 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.1495014174 |
|
|
Aug 23 10:19:33 PM UTC 24 |
Aug 23 10:19:41 PM UTC 24 |
772287090 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all.1280139212 |
|
|
Aug 23 10:18:11 PM UTC 24 |
Aug 23 10:19:43 PM UTC 24 |
23236869182 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.1784520133 |
|
|
Aug 23 10:19:38 PM UTC 24 |
Aug 23 10:19:44 PM UTC 24 |
199955875 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.553199993 |
|
|
Aug 23 10:19:43 PM UTC 24 |
Aug 23 10:19:44 PM UTC 24 |
58600675 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.1269238811 |
|
|
Aug 23 10:19:43 PM UTC 24 |
Aug 23 10:19:44 PM UTC 24 |
16982737 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_errors.2390714820 |
|
|
Aug 23 10:19:33 PM UTC 24 |
Aug 23 10:19:46 PM UTC 24 |
596967304 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.1806753499 |
|
|
Aug 23 10:19:44 PM UTC 24 |
Aug 23 10:19:46 PM UTC 24 |
13248109 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.2190858503 |
|
|
Aug 23 10:19:17 PM UTC 24 |
Aug 23 10:19:46 PM UTC 24 |
890196234 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.2784643185 |
|
|
Aug 23 10:19:36 PM UTC 24 |
Aug 23 10:19:47 PM UTC 24 |
360469551 ps |
| T125 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.771929410 |
|
|
Aug 23 10:18:14 PM UTC 24 |
Aug 23 10:19:47 PM UTC 24 |
23353074192 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.2523306794 |
|
|
Aug 23 10:19:35 PM UTC 24 |
Aug 23 10:19:48 PM UTC 24 |
667882800 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_22/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.1007292211 |
|
|
Aug 23 10:19:45 PM UTC 24 |
Aug 23 10:19:49 PM UTC 24 |
67705196 ps |