SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
60.00 | 60.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi8_cov_of_mubi8_cov_of_lc_ctrl_reg_block.claim_transition_if.mutex | 60.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
60.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 10 | 4 | 6 | 60.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 10 | 4 | 6 | 60.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 10 | 4 | 6 | 60.00 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
others[5] | 0 | 1 | 1 | |
others[6] | 0 | 1 | 1 | |
others[7] | 0 | 1 | 1 | |
false | 0 | 1 | 1 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2440 | 1 | T7 | 34 | T8 | 310 | T9 | 26 | ||||
others[1] | 2 | 1 | T209 | 1 | T210 | 1 | - | - | ||||
others[2] | 1 | 1 | T14 | 1 | - | - | - | - | ||||
others[3] | 2 | 1 | T211 | 1 | T212 | 1 | - | - | ||||
others[4] | 1 | 1 | T213 | 1 | - | - | - | - | ||||
true | 40621 | 1 | T1 | 1 | T2 | 10 | T3 | 29 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |