T365 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_state_failure.3584614140 |
|
|
Sep 18 12:40:44 PM UTC 24 |
Sep 18 12:41:42 PM UTC 24 |
7534478109 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_errors.2150368492 |
|
|
Sep 18 12:41:19 PM UTC 24 |
Sep 18 12:41:42 PM UTC 24 |
1541686503 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_errors.898260957 |
|
|
Sep 18 12:41:11 PM UTC 24 |
Sep 18 12:41:42 PM UTC 24 |
7309729779 ps |
T368 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_sec_token_digest.727004920 |
|
|
Sep 18 12:41:14 PM UTC 24 |
Sep 18 12:41:43 PM UTC 24 |
3104613043 ps |
T369 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_smoke.1139457711 |
|
|
Sep 18 12:41:39 PM UTC 24 |
Sep 18 12:41:43 PM UTC 24 |
68525523 ps |
T370 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_jtag_errors.1353620865 |
|
|
Sep 18 12:40:52 PM UTC 24 |
Sep 18 12:41:44 PM UTC 24 |
5658525782 ps |
T371 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_access.597487321 |
|
|
Sep 18 12:41:43 PM UTC 24 |
Sep 18 12:41:46 PM UTC 24 |
66374658 ps |
T372 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_errors.3004615364 |
|
|
Sep 18 12:41:37 PM UTC 24 |
Sep 18 12:41:47 PM UTC 24 |
1108310324 ps |
T373 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_prog_failure.4265602828 |
|
|
Sep 18 12:41:43 PM UTC 24 |
Sep 18 12:41:48 PM UTC 24 |
169333191 ps |
T374 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_digest.1868312356 |
|
|
Sep 18 12:41:28 PM UTC 24 |
Sep 18 12:41:48 PM UTC 24 |
818410875 ps |
T375 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_post_trans.1790719351 |
|
|
Sep 18 12:41:35 PM UTC 24 |
Sep 18 12:41:49 PM UTC 24 |
86423500 ps |
T376 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_state_failure.4232755686 |
|
|
Sep 18 12:41:35 PM UTC 24 |
Sep 18 12:41:51 PM UTC 24 |
303089409 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/3.lc_ctrl_stress_all_with_rand_reset.1808029467 |
|
|
Sep 18 12:38:15 PM UTC 24 |
Sep 18 12:41:51 PM UTC 24 |
23274269703 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_smoke.3163995917 |
|
|
Sep 18 12:41:49 PM UTC 24 |
Sep 18 12:41:51 PM UTC 24 |
31972268 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_alert_test.4037356157 |
|
|
Sep 18 12:41:49 PM UTC 24 |
Sep 18 12:41:51 PM UTC 24 |
52346482 ps |
T163 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_sec_token_mux.904864210 |
|
|
Sep 18 12:41:27 PM UTC 24 |
Sep 18 12:41:51 PM UTC 24 |
742848654 ps |
T164 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_volatile_unlock_smoke.2111631506 |
|
|
Sep 18 12:41:50 PM UTC 24 |
Sep 18 12:41:52 PM UTC 24 |
51202322 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_post_trans.2519144969 |
|
|
Sep 18 12:41:23 PM UTC 24 |
Sep 18 12:41:52 PM UTC 24 |
1269289013 ps |
T166 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_security_escalation.792003565 |
|
|
Sep 18 12:41:38 PM UTC 24 |
Sep 18 12:41:52 PM UTC 24 |
215233751 ps |
T167 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_mux.2030213399 |
|
|
Sep 18 12:41:44 PM UTC 24 |
Sep 18 12:41:55 PM UTC 24 |
359108236 ps |
T168 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_errors.786573341 |
|
|
Sep 18 12:41:24 PM UTC 24 |
Sep 18 12:41:57 PM UTC 24 |
1009901043 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_state_failure.70105823 |
|
|
Sep 18 12:41:17 PM UTC 24 |
Sep 18 12:41:57 PM UTC 24 |
799224753 ps |
T377 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_token_digest.3966374177 |
|
|
Sep 18 12:41:45 PM UTC 24 |
Sep 18 12:41:58 PM UTC 24 |
1324238868 ps |
T378 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_prog_failure.3290215959 |
|
|
Sep 18 12:41:52 PM UTC 24 |
Sep 18 12:41:58 PM UTC 24 |
75690193 ps |
T379 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_post_trans.2225850799 |
|
|
Sep 18 12:41:52 PM UTC 24 |
Sep 18 12:41:59 PM UTC 24 |
1284915411 ps |
T380 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_sec_mubi.624188558 |
|
|
Sep 18 12:41:44 PM UTC 24 |
Sep 18 12:41:59 PM UTC 24 |
3798497133 ps |
T381 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_volatile_unlock_smoke.2058652239 |
|
|
Sep 18 12:42:34 PM UTC 24 |
Sep 18 12:42:36 PM UTC 24 |
27465337 ps |
T382 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_jtag_state_failure.575883102 |
|
|
Sep 18 12:41:07 PM UTC 24 |
Sep 18 12:42:01 PM UTC 24 |
5827581263 ps |
T383 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_post_trans.2346597660 |
|
|
Sep 18 12:41:43 PM UTC 24 |
Sep 18 12:42:03 PM UTC 24 |
1894860129 ps |
T384 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_smoke.4059789709 |
|
|
Sep 18 12:41:53 PM UTC 24 |
Sep 18 12:42:03 PM UTC 24 |
273581838 ps |
T385 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_alert_test.3930463366 |
|
|
Sep 18 12:42:01 PM UTC 24 |
Sep 18 12:42:03 PM UTC 24 |
19828754 ps |
T36 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_access.2616217205 |
|
|
Sep 18 12:41:58 PM UTC 24 |
Sep 18 12:42:03 PM UTC 24 |
173333321 ps |
T386 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_security_escalation.1990046902 |
|
|
Sep 18 12:41:53 PM UTC 24 |
Sep 18 12:42:04 PM UTC 24 |
170222072 ps |
T387 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_errors.2537879207 |
|
|
Sep 18 12:41:53 PM UTC 24 |
Sep 18 12:42:04 PM UTC 24 |
162364551 ps |
T388 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_prog_failure.3970156022 |
|
|
Sep 18 12:41:54 PM UTC 24 |
Sep 18 12:42:05 PM UTC 24 |
545227453 ps |
T389 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_smoke.6443016 |
|
|
Sep 18 12:42:02 PM UTC 24 |
Sep 18 12:42:06 PM UTC 24 |
180112387 ps |
T390 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_volatile_unlock_smoke.441679906 |
|
|
Sep 18 12:42:04 PM UTC 24 |
Sep 18 12:42:06 PM UTC 24 |
52677706 ps |
T391 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_post_trans.2646960497 |
|
|
Sep 18 12:41:53 PM UTC 24 |
Sep 18 12:42:07 PM UTC 24 |
2188768928 ps |
T392 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_mubi.1494021250 |
|
|
Sep 18 12:41:58 PM UTC 24 |
Sep 18 12:42:08 PM UTC 24 |
5703477301 ps |
T393 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_prog_failure.3329749757 |
|
|
Sep 18 12:42:04 PM UTC 24 |
Sep 18 12:42:08 PM UTC 24 |
400757257 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_mux.357197172 |
|
|
Sep 18 12:41:58 PM UTC 24 |
Sep 18 12:42:10 PM UTC 24 |
349642062 ps |
T395 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_smoke.2499583082 |
|
|
Sep 18 12:42:07 PM UTC 24 |
Sep 18 12:42:11 PM UTC 24 |
146743799 ps |
T396 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_jtag_state_failure.1204286475 |
|
|
Sep 18 12:41:22 PM UTC 24 |
Sep 18 12:42:11 PM UTC 24 |
2369525681 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all_with_rand_reset.3875430192 |
|
|
Sep 18 12:40:58 PM UTC 24 |
Sep 18 12:42:15 PM UTC 24 |
4068003017 ps |
T397 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_sec_token_digest.3484866998 |
|
|
Sep 18 12:41:59 PM UTC 24 |
Sep 18 12:42:15 PM UTC 24 |
1477653710 ps |
T398 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_post_trans.345272965 |
|
|
Sep 18 12:42:04 PM UTC 24 |
Sep 18 12:42:16 PM UTC 24 |
278710126 ps |
T63 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_security_escalation.656676319 |
|
|
Sep 18 12:42:06 PM UTC 24 |
Sep 18 12:42:16 PM UTC 24 |
447404374 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.231989227 |
|
|
Sep 18 12:41:49 PM UTC 24 |
Sep 18 12:42:16 PM UTC 24 |
4833875930 ps |
T399 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_alert_test.1056463248 |
|
|
Sep 18 12:42:16 PM UTC 24 |
Sep 18 12:42:19 PM UTC 24 |
17588563 ps |
T400 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_state_failure.2032234239 |
|
|
Sep 18 12:41:52 PM UTC 24 |
Sep 18 12:42:20 PM UTC 24 |
1332782915 ps |
T401 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_prog_failure.352166357 |
|
|
Sep 18 12:42:08 PM UTC 24 |
Sep 18 12:42:20 PM UTC 24 |
3518229145 ps |
T402 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_volatile_unlock_smoke.1778178765 |
|
|
Sep 18 12:42:17 PM UTC 24 |
Sep 18 12:42:20 PM UTC 24 |
20302176 ps |
T89 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_smoke.379959066 |
|
|
Sep 18 12:42:17 PM UTC 24 |
Sep 18 12:42:22 PM UTC 24 |
47230001 ps |
T37 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_access.3017466890 |
|
|
Sep 18 12:42:09 PM UTC 24 |
Sep 18 12:42:23 PM UTC 24 |
299041320 ps |
T403 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_errors.3947398325 |
|
|
Sep 18 12:42:21 PM UTC 24 |
Sep 18 12:42:35 PM UTC 24 |
1848418900 ps |
T404 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_errors.2672282403 |
|
|
Sep 18 12:42:05 PM UTC 24 |
Sep 18 12:42:24 PM UTC 24 |
1860759663 ps |
T405 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_post_trans.1367016333 |
|
|
Sep 18 12:42:08 PM UTC 24 |
Sep 18 12:42:25 PM UTC 24 |
2598129199 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_mux.3793872076 |
|
|
Sep 18 12:42:10 PM UTC 24 |
Sep 18 12:42:26 PM UTC 24 |
1129385125 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_token_digest.1796017295 |
|
|
Sep 18 12:42:12 PM UTC 24 |
Sep 18 12:42:26 PM UTC 24 |
307186767 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_prog_failure.1482597868 |
|
|
Sep 18 12:42:21 PM UTC 24 |
Sep 18 12:42:28 PM UTC 24 |
412184789 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_sec_mubi.2443678330 |
|
|
Sep 18 12:42:09 PM UTC 24 |
Sep 18 12:42:28 PM UTC 24 |
2096604873 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_post_trans.1745685336 |
|
|
Sep 18 12:42:20 PM UTC 24 |
Sep 18 12:42:29 PM UTC 24 |
91875634 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_prog_failure.2144204673 |
|
|
Sep 18 12:42:24 PM UTC 24 |
Sep 18 12:42:30 PM UTC 24 |
198618423 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_alert_test.2135996696 |
|
|
Sep 18 12:42:30 PM UTC 24 |
Sep 18 12:42:33 PM UTC 24 |
93763124 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_security_escalation.658938611 |
|
|
Sep 18 12:42:21 PM UTC 24 |
Sep 18 12:42:35 PM UTC 24 |
459489916 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_smoke.2993294948 |
|
|
Sep 18 12:42:23 PM UTC 24 |
Sep 18 12:42:36 PM UTC 24 |
253159761 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/9.lc_ctrl_stress_all.1648171178 |
|
|
Sep 18 12:40:57 PM UTC 24 |
Sep 18 12:42:37 PM UTC 24 |
5396942362 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_smoke.760663762 |
|
|
Sep 18 12:42:30 PM UTC 24 |
Sep 18 12:42:37 PM UTC 24 |
455211611 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_state_failure.3931225643 |
|
|
Sep 18 12:42:17 PM UTC 24 |
Sep 18 12:42:38 PM UTC 24 |
768202515 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_digest.1515168047 |
|
|
Sep 18 12:42:29 PM UTC 24 |
Sep 18 12:42:40 PM UTC 24 |
427344252 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_post_trans.196171556 |
|
|
Sep 18 12:42:24 PM UTC 24 |
Sep 18 12:42:40 PM UTC 24 |
439649294 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_post_trans.50806219 |
|
|
Sep 18 12:42:36 PM UTC 24 |
Sep 18 12:42:41 PM UTC 24 |
169247028 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_prog_failure.2505770238 |
|
|
Sep 18 12:42:37 PM UTC 24 |
Sep 18 12:42:42 PM UTC 24 |
460514674 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_token_mux.734081687 |
|
|
Sep 18 12:42:27 PM UTC 24 |
Sep 18 12:42:42 PM UTC 24 |
1217739537 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_access.1090950393 |
|
|
Sep 18 12:42:26 PM UTC 24 |
Sep 18 12:42:43 PM UTC 24 |
3381148164 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_smoke.1015811663 |
|
|
Sep 18 12:42:38 PM UTC 24 |
Sep 18 12:42:45 PM UTC 24 |
377093372 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_sec_mubi.3669152458 |
|
|
Sep 18 12:42:27 PM UTC 24 |
Sep 18 12:42:45 PM UTC 24 |
231052093 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_state_failure.2342369197 |
|
|
Sep 18 12:42:04 PM UTC 24 |
Sep 18 12:42:46 PM UTC 24 |
323384853 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_errors.381111795 |
|
|
Sep 18 12:42:08 PM UTC 24 |
Sep 18 12:42:47 PM UTC 24 |
6184497691 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_prog_failure.2848883855 |
|
|
Sep 18 12:42:41 PM UTC 24 |
Sep 18 12:42:48 PM UTC 24 |
131367339 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_security_escalation.394341551 |
|
|
Sep 18 12:42:38 PM UTC 24 |
Sep 18 12:42:48 PM UTC 24 |
485930512 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_alert_test.2902048829 |
|
|
Sep 18 12:42:47 PM UTC 24 |
Sep 18 12:42:49 PM UTC 24 |
49509047 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_volatile_unlock_smoke.1295648513 |
|
|
Sep 18 12:42:48 PM UTC 24 |
Sep 18 12:42:50 PM UTC 24 |
12978171 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_errors.1597809968 |
|
|
Sep 18 12:42:37 PM UTC 24 |
Sep 18 12:42:50 PM UTC 24 |
1765159785 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_errors.3429037905 |
|
|
Sep 18 12:41:43 PM UTC 24 |
Sep 18 12:42:52 PM UTC 24 |
1961886851 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_access.2412510949 |
|
|
Sep 18 12:42:43 PM UTC 24 |
Sep 18 12:42:52 PM UTC 24 |
585384924 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_mux.1590147021 |
|
|
Sep 18 12:42:44 PM UTC 24 |
Sep 18 12:42:52 PM UTC 24 |
208098947 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_smoke.1807371157 |
|
|
Sep 18 12:42:48 PM UTC 24 |
Sep 18 12:42:53 PM UTC 24 |
86610495 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_stress_all.1522717312 |
|
|
Sep 18 12:41:59 PM UTC 24 |
Sep 18 12:43:34 PM UTC 24 |
14150318132 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_prog_failure.326833455 |
|
|
Sep 18 12:42:50 PM UTC 24 |
Sep 18 12:42:54 PM UTC 24 |
79064802 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_post_trans.3898502588 |
|
|
Sep 18 12:42:41 PM UTC 24 |
Sep 18 12:42:57 PM UTC 24 |
1066130047 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_access.2900439238 |
|
|
Sep 18 12:42:55 PM UTC 24 |
Sep 18 12:42:59 PM UTC 24 |
335202919 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_token_digest.266331013 |
|
|
Sep 18 12:42:47 PM UTC 24 |
Sep 18 12:42:59 PM UTC 24 |
1700385994 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_post_trans.3249869139 |
|
|
Sep 18 12:42:49 PM UTC 24 |
Sep 18 12:43:00 PM UTC 24 |
90997323 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all.3422928046 |
|
|
Sep 18 12:42:12 PM UTC 24 |
Sep 18 12:43:01 PM UTC 24 |
1287600581 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_sec_mubi.1026049570 |
|
|
Sep 18 12:42:43 PM UTC 24 |
Sep 18 12:43:02 PM UTC 24 |
3196131827 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_smoke.4025238033 |
|
|
Sep 18 12:42:52 PM UTC 24 |
Sep 18 12:43:02 PM UTC 24 |
610495029 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_alert_test.3245255282 |
|
|
Sep 18 12:43:01 PM UTC 24 |
Sep 18 12:43:04 PM UTC 24 |
23660597 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_security_escalation.3817064000 |
|
|
Sep 18 12:42:52 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
994571485 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_volatile_unlock_smoke.1699567869 |
|
|
Sep 18 12:43:02 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
13839344 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_errors.1950484847 |
|
|
Sep 18 12:42:52 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
191814285 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_mubi.437047423 |
|
|
Sep 18 12:42:55 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
476870329 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_smoke.2745033966 |
|
|
Sep 18 12:43:01 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
46219502 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_mux.4081742781 |
|
|
Sep 18 12:43:24 PM UTC 24 |
Sep 18 12:43:37 PM UTC 24 |
294421228 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_prog_failure.2019167643 |
|
|
Sep 18 12:42:53 PM UTC 24 |
Sep 18 12:43:05 PM UTC 24 |
1595926898 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_state_failure.3236425593 |
|
|
Sep 18 12:41:53 PM UTC 24 |
Sep 18 12:43:07 PM UTC 24 |
8342993705 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_digest.2510374185 |
|
|
Sep 18 12:42:58 PM UTC 24 |
Sep 18 12:43:08 PM UTC 24 |
216509050 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_prog_failure.2332744670 |
|
|
Sep 18 12:43:05 PM UTC 24 |
Sep 18 12:43:08 PM UTC 24 |
178767797 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_post_trans.1980798057 |
|
|
Sep 18 12:43:04 PM UTC 24 |
Sep 18 12:43:10 PM UTC 24 |
112845599 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_errors.4090901827 |
|
|
Sep 18 12:42:26 PM UTC 24 |
Sep 18 12:43:10 PM UTC 24 |
1165695075 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_state_failure.1781949920 |
|
|
Sep 18 12:42:36 PM UTC 24 |
Sep 18 12:43:11 PM UTC 24 |
247424864 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_prog_failure.1055630124 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:43:12 PM UTC 24 |
699465538 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_sec_token_mux.3228843336 |
|
|
Sep 18 12:42:58 PM UTC 24 |
Sep 18 12:43:12 PM UTC 24 |
335640057 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_state_failure.1731210591 |
|
|
Sep 18 12:42:49 PM UTC 24 |
Sep 18 12:43:13 PM UTC 24 |
173946101 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.994244926 |
|
|
Sep 18 12:42:16 PM UTC 24 |
Sep 18 12:43:14 PM UTC 24 |
4156351225 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_alert_test.1336370556 |
|
|
Sep 18 12:43:13 PM UTC 24 |
Sep 18 12:43:16 PM UTC 24 |
14743858 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_post_trans.912215494 |
|
|
Sep 18 12:42:53 PM UTC 24 |
Sep 18 12:43:16 PM UTC 24 |
1515563994 ps |
T64 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_security_escalation.541114363 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:43:16 PM UTC 24 |
552672851 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_smoke.3371501647 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:43:17 PM UTC 24 |
510055142 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_smoke.2286477201 |
|
|
Sep 18 12:43:15 PM UTC 24 |
Sep 18 12:43:18 PM UTC 24 |
37213698 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_volatile_unlock_smoke.1967004712 |
|
|
Sep 18 12:43:16 PM UTC 24 |
Sep 18 12:43:18 PM UTC 24 |
47840000 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/13.lc_ctrl_jtag_errors.3563524709 |
|
|
Sep 18 12:41:56 PM UTC 24 |
Sep 18 12:43:19 PM UTC 24 |
15749702420 ps |
T66 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_mux.3638078752 |
|
|
Sep 18 12:43:11 PM UTC 24 |
Sep 18 12:43:19 PM UTC 24 |
269198224 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_state_failure.2803805523 |
|
|
Sep 18 12:43:03 PM UTC 24 |
Sep 18 12:43:19 PM UTC 24 |
148229575 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_prog_failure.2374418910 |
|
|
Sep 18 12:43:17 PM UTC 24 |
Sep 18 12:43:21 PM UTC 24 |
191058050 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_access.3576608535 |
|
|
Sep 18 12:43:09 PM UTC 24 |
Sep 18 12:43:21 PM UTC 24 |
446417524 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_errors.1570921531 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:43:22 PM UTC 24 |
264097920 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_jtag_state_failure.282010241 |
|
|
Sep 18 12:42:23 PM UTC 24 |
Sep 18 12:43:35 PM UTC 24 |
4006828004 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_smoke.2206249127 |
|
|
Sep 18 12:43:19 PM UTC 24 |
Sep 18 12:43:23 PM UTC 24 |
241080737 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/14.lc_ctrl_jtag_state_failure.3698103041 |
|
|
Sep 18 12:42:07 PM UTC 24 |
Sep 18 12:43:23 PM UTC 24 |
3291168008 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_mubi.1663894941 |
|
|
Sep 18 12:43:10 PM UTC 24 |
Sep 18 12:43:23 PM UTC 24 |
1226096466 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_post_trans.1338779640 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:43:24 PM UTC 24 |
1621875075 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_post_trans.1194232227 |
|
|
Sep 18 12:43:17 PM UTC 24 |
Sep 18 12:43:25 PM UTC 24 |
596710450 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_errors.3475936917 |
|
|
Sep 18 12:42:54 PM UTC 24 |
Sep 18 12:43:26 PM UTC 24 |
863125707 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.2378404967 |
|
|
Sep 18 12:42:29 PM UTC 24 |
Sep 18 12:43:27 PM UTC 24 |
36375886150 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_prog_failure.3858193181 |
|
|
Sep 18 12:43:29 PM UTC 24 |
Sep 18 12:43:37 PM UTC 24 |
207531204 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_sec_token_digest.1067761677 |
|
|
Sep 18 12:43:11 PM UTC 24 |
Sep 18 12:43:28 PM UTC 24 |
501390762 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_alert_test.2040827317 |
|
|
Sep 18 12:43:26 PM UTC 24 |
Sep 18 12:43:28 PM UTC 24 |
34337412 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_security_escalation.3916590612 |
|
|
Sep 18 12:43:19 PM UTC 24 |
Sep 18 12:43:28 PM UTC 24 |
1113403744 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_errors.2724079023 |
|
|
Sep 18 12:43:18 PM UTC 24 |
Sep 18 12:43:28 PM UTC 24 |
924207654 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_volatile_unlock_smoke.1623681949 |
|
|
Sep 18 12:43:27 PM UTC 24 |
Sep 18 12:43:29 PM UTC 24 |
88140919 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_smoke.4234371998 |
|
|
Sep 18 12:43:26 PM UTC 24 |
Sep 18 12:43:30 PM UTC 24 |
586950663 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_access.3107522518 |
|
|
Sep 18 12:43:23 PM UTC 24 |
Sep 18 12:43:32 PM UTC 24 |
860503586 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_jtag_access.432490631 |
|
|
Sep 18 12:43:30 PM UTC 24 |
Sep 18 12:43:33 PM UTC 24 |
75888521 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all.2996299828 |
|
|
Sep 18 12:43:12 PM UTC 24 |
Sep 18 12:43:38 PM UTC 24 |
1764491556 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_mubi.2140561289 |
|
|
Sep 18 12:43:23 PM UTC 24 |
Sep 18 12:43:38 PM UTC 24 |
354488820 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_prog_failure.1966226943 |
|
|
Sep 18 12:43:21 PM UTC 24 |
Sep 18 12:43:38 PM UTC 24 |
609566823 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_alert_test.2581486338 |
|
|
Sep 18 12:43:36 PM UTC 24 |
Sep 18 12:43:39 PM UTC 24 |
33583477 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_sec_token_digest.3066043774 |
|
|
Sep 18 12:43:24 PM UTC 24 |
Sep 18 12:43:40 PM UTC 24 |
379801013 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_smoke.2985668789 |
|
|
Sep 18 12:43:37 PM UTC 24 |
Sep 18 12:43:40 PM UTC 24 |
40618480 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_state_post_trans.832207894 |
|
|
Sep 18 12:43:19 PM UTC 24 |
Sep 18 12:43:40 PM UTC 24 |
767675576 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_post_trans.1834798842 |
|
|
Sep 18 12:43:29 PM UTC 24 |
Sep 18 12:43:40 PM UTC 24 |
261837664 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_volatile_unlock_smoke.562137004 |
|
|
Sep 18 12:43:39 PM UTC 24 |
Sep 18 12:43:41 PM UTC 24 |
48436904 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_mux.2095309466 |
|
|
Sep 18 12:43:31 PM UTC 24 |
Sep 18 12:43:42 PM UTC 24 |
406045902 ps |
T90 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.3058742790 |
|
|
Sep 18 12:41:14 PM UTC 24 |
Sep 18 12:43:43 PM UTC 24 |
6665713509 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_state_failure.1853358795 |
|
|
Sep 18 12:42:40 PM UTC 24 |
Sep 18 12:43:43 PM UTC 24 |
5926523422 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_prog_failure.2307788368 |
|
|
Sep 18 12:43:39 PM UTC 24 |
Sep 18 12:43:44 PM UTC 24 |
436101511 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.3983872922 |
|
|
Sep 18 12:41:30 PM UTC 24 |
Sep 18 12:43:45 PM UTC 24 |
9803779151 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/16.lc_ctrl_jtag_errors.2657193829 |
|
|
Sep 18 12:42:42 PM UTC 24 |
Sep 18 12:43:46 PM UTC 24 |
10713231590 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_token_digest.1199918161 |
|
|
Sep 18 12:43:33 PM UTC 24 |
Sep 18 12:43:46 PM UTC 24 |
352365489 ps |
T214 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_security_escalation.2709702957 |
|
|
Sep 18 12:43:30 PM UTC 24 |
Sep 18 12:43:46 PM UTC 24 |
6283930107 ps |
T52 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_errors.1540896633 |
|
|
Sep 18 12:43:08 PM UTC 24 |
Sep 18 12:43:46 PM UTC 24 |
1662288812 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_alert_test.3495114167 |
|
|
Sep 18 12:43:44 PM UTC 24 |
Sep 18 12:43:47 PM UTC 24 |
16574096 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_smoke.1626244381 |
|
|
Sep 18 12:43:44 PM UTC 24 |
Sep 18 12:43:47 PM UTC 24 |
43990088 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_volatile_unlock_smoke.3812362658 |
|
|
Sep 18 12:43:45 PM UTC 24 |
Sep 18 12:43:47 PM UTC 24 |
12763310 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_post_trans.601610472 |
|
|
Sep 18 12:43:39 PM UTC 24 |
Sep 18 12:43:48 PM UTC 24 |
192046971 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/12.lc_ctrl_jtag_state_failure.666559282 |
|
|
Sep 18 12:41:40 PM UTC 24 |
Sep 18 12:43:50 PM UTC 24 |
14881964514 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_sec_mubi.363596264 |
|
|
Sep 18 12:43:31 PM UTC 24 |
Sep 18 12:43:50 PM UTC 24 |
1699446811 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_errors.638878406 |
|
|
Sep 18 12:43:29 PM UTC 24 |
Sep 18 12:43:50 PM UTC 24 |
1861773982 ps |
T215 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_security_escalation.2306758557 |
|
|
Sep 18 12:43:40 PM UTC 24 |
Sep 18 12:43:50 PM UTC 24 |
439371444 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_post_trans.306169711 |
|
|
Sep 18 12:43:47 PM UTC 24 |
Sep 18 12:43:51 PM UTC 24 |
90720510 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_errors.3354310795 |
|
|
Sep 18 12:43:40 PM UTC 24 |
Sep 18 12:43:52 PM UTC 24 |
286907968 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_state_failure.2741117989 |
|
|
Sep 18 12:43:17 PM UTC 24 |
Sep 18 12:43:52 PM UTC 24 |
1020209601 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_prog_failure.2056028034 |
|
|
Sep 18 12:43:47 PM UTC 24 |
Sep 18 12:43:52 PM UTC 24 |
248865670 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_digest.1106354249 |
|
|
Sep 18 12:43:42 PM UTC 24 |
Sep 18 12:43:52 PM UTC 24 |
1118969211 ps |
T77 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_alert_test.3715162548 |
|
|
Sep 18 12:43:51 PM UTC 24 |
Sep 18 12:43:54 PM UTC 24 |
65575294 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_jtag_access.3014091749 |
|
|
Sep 18 12:43:48 PM UTC 24 |
Sep 18 12:43:54 PM UTC 24 |
187570203 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3549195189 |
|
|
Sep 18 12:43:52 PM UTC 24 |
Sep 18 12:43:54 PM UTC 24 |
44832919 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_smoke.2630234973 |
|
|
Sep 18 12:43:52 PM UTC 24 |
Sep 18 12:43:55 PM UTC 24 |
182479353 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_token_mux.171163505 |
|
|
Sep 18 12:43:42 PM UTC 24 |
Sep 18 12:43:58 PM UTC 24 |
471696825 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_prog_failure.788091820 |
|
|
Sep 18 12:43:53 PM UTC 24 |
Sep 18 12:43:58 PM UTC 24 |
41931796 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/20.lc_ctrl_state_failure.2147673568 |
|
|
Sep 18 12:43:28 PM UTC 24 |
Sep 18 12:43:58 PM UTC 24 |
1131107916 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_sec_mubi.1881767149 |
|
|
Sep 18 12:43:41 PM UTC 24 |
Sep 18 12:43:58 PM UTC 24 |
349464735 ps |
T106 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/18.lc_ctrl_jtag_state_failure.3221730068 |
|
|
Sep 18 12:43:06 PM UTC 24 |
Sep 18 12:44:00 PM UTC 24 |
1496847332 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_jtag_state_failure.1694280997 |
|
|
Sep 18 12:42:53 PM UTC 24 |
Sep 18 12:44:00 PM UTC 24 |
16493106702 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_jtag_access.724664852 |
|
|
Sep 18 12:43:41 PM UTC 24 |
Sep 18 12:44:01 PM UTC 24 |
2113180268 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_mubi.1120359573 |
|
|
Sep 18 12:43:48 PM UTC 24 |
Sep 18 12:44:01 PM UTC 24 |
265103364 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_digest.4028162963 |
|
|
Sep 18 12:43:49 PM UTC 24 |
Sep 18 12:44:01 PM UTC 24 |
461248037 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_sec_token_mux.70639103 |
|
|
Sep 18 12:43:48 PM UTC 24 |
Sep 18 12:44:02 PM UTC 24 |
256716968 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_alert_test.647374209 |
|
|
Sep 18 12:43:59 PM UTC 24 |
Sep 18 12:44:02 PM UTC 24 |
19544445 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_smoke.4241859437 |
|
|
Sep 18 12:43:59 PM UTC 24 |
Sep 18 12:44:03 PM UTC 24 |
20004949 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_volatile_unlock_smoke.2543572070 |
|
|
Sep 18 12:44:01 PM UTC 24 |
Sep 18 12:44:04 PM UTC 24 |
11663414 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_jtag_access.4285374841 |
|
|
Sep 18 12:43:55 PM UTC 24 |
Sep 18 12:44:05 PM UTC 24 |
1147991211 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_security_escalation.191857716 |
|
|
Sep 18 12:43:55 PM UTC 24 |
Sep 18 12:44:05 PM UTC 24 |
422832727 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_errors.2124801160 |
|
|
Sep 18 12:43:54 PM UTC 24 |
Sep 18 12:44:05 PM UTC 24 |
1161209807 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_errors.4125173849 |
|
|
Sep 18 12:43:47 PM UTC 24 |
Sep 18 12:44:06 PM UTC 24 |
664099229 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_post_trans.3534957168 |
|
|
Sep 18 12:43:53 PM UTC 24 |
Sep 18 12:44:07 PM UTC 24 |
287139800 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_security_escalation.1017073225 |
|
|
Sep 18 12:43:48 PM UTC 24 |
Sep 18 12:44:07 PM UTC 24 |
2132560296 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/21.lc_ctrl_state_failure.2949994371 |
|
|
Sep 18 12:43:39 PM UTC 24 |
Sep 18 12:44:07 PM UTC 24 |
5008462998 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_prog_failure.2979615806 |
|
|
Sep 18 12:44:02 PM UTC 24 |
Sep 18 12:44:07 PM UTC 24 |
45740021 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_mux.3121096034 |
|
|
Sep 18 12:43:56 PM UTC 24 |
Sep 18 12:44:09 PM UTC 24 |
2009138328 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_alert_test.2343556037 |
|
|
Sep 18 12:44:07 PM UTC 24 |
Sep 18 12:44:10 PM UTC 24 |
16638507 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_volatile_unlock_smoke.496208541 |
|
|
Sep 18 12:44:08 PM UTC 24 |
Sep 18 12:44:11 PM UTC 24 |
29026422 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/17.lc_ctrl_stress_all.322869440 |
|
|
Sep 18 12:43:00 PM UTC 24 |
Sep 18 12:44:11 PM UTC 24 |
1473819457 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/19.lc_ctrl_jtag_errors.1889411361 |
|
|
Sep 18 12:43:22 PM UTC 24 |
Sep 18 12:44:11 PM UTC 24 |
6799460525 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_post_trans.2345451907 |
|
|
Sep 18 12:44:02 PM UTC 24 |
Sep 18 12:44:12 PM UTC 24 |
469281728 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_smoke.2456053016 |
|
|
Sep 18 12:44:07 PM UTC 24 |
Sep 18 12:44:12 PM UTC 24 |
344610132 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_state_failure.1613479599 |
|
|
Sep 18 12:43:47 PM UTC 24 |
Sep 18 12:44:13 PM UTC 24 |
1669839654 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_mubi.3596191710 |
|
|
Sep 18 12:43:55 PM UTC 24 |
Sep 18 12:44:14 PM UTC 24 |
456104884 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_jtag_access.2620024261 |
|
|
Sep 18 12:44:03 PM UTC 24 |
Sep 18 12:44:15 PM UTC 24 |
1528715630 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_security_escalation.2091027684 |
|
|
Sep 18 12:44:11 PM UTC 24 |
Sep 18 12:44:26 PM UTC 24 |
1686674700 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_sec_token_digest.1976418149 |
|
|
Sep 18 12:43:56 PM UTC 24 |
Sep 18 12:44:15 PM UTC 24 |
590483566 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_prog_failure.3203331511 |
|
|
Sep 18 12:44:10 PM UTC 24 |
Sep 18 12:44:16 PM UTC 24 |
64078165 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_jtag_access.2355701053 |
|
|
Sep 18 12:44:12 PM UTC 24 |
Sep 18 12:44:16 PM UTC 24 |
164236281 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_alert_test.2551790645 |
|
|
Sep 18 12:44:15 PM UTC 24 |
Sep 18 12:44:17 PM UTC 24 |
15932643 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_mux.799770342 |
|
|
Sep 18 12:44:05 PM UTC 24 |
Sep 18 12:44:18 PM UTC 24 |
366956678 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_volatile_unlock_smoke.3649670520 |
|
|
Sep 18 12:44:16 PM UTC 24 |
Sep 18 12:44:18 PM UTC 24 |
38799499 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_state_post_trans.3417802126 |
|
|
Sep 18 12:44:09 PM UTC 24 |
Sep 18 12:44:19 PM UTC 24 |
228821695 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_errors.4008187981 |
|
|
Sep 18 12:44:02 PM UTC 24 |
Sep 18 12:44:20 PM UTC 24 |
863583054 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_token_digest.4078216396 |
|
|
Sep 18 12:44:06 PM UTC 24 |
Sep 18 12:44:20 PM UTC 24 |
1312702379 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_security_escalation.2111385015 |
|
|
Sep 18 12:44:03 PM UTC 24 |
Sep 18 12:44:20 PM UTC 24 |
813108694 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_smoke.1138591854 |
|
|
Sep 18 12:44:16 PM UTC 24 |
Sep 18 12:44:21 PM UTC 24 |
148727045 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_prog_failure.1955785323 |
|
|
Sep 18 12:44:18 PM UTC 24 |
Sep 18 12:44:23 PM UTC 24 |
67874038 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_state_post_trans.2753227503 |
|
|
Sep 18 12:44:17 PM UTC 24 |
Sep 18 12:44:24 PM UTC 24 |
321667884 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_alert_test.3600189918 |
|
|
Sep 18 12:44:23 PM UTC 24 |
Sep 18 12:44:25 PM UTC 24 |
46413860 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_sec_mubi.2185473524 |
|
|
Sep 18 12:44:03 PM UTC 24 |
Sep 18 12:44:26 PM UTC 24 |
905532871 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.1714409126 |
|
|
Sep 18 12:45:04 PM UTC 24 |
Sep 18 12:45:11 PM UTC 24 |
396847304 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2935247168 |
|
|
Sep 18 12:43:53 PM UTC 24 |
Sep 18 12:44:27 PM UTC 24 |
531553898 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_volatile_unlock_smoke.1949155159 |
|
|
Sep 18 12:44:25 PM UTC 24 |
Sep 18 12:44:27 PM UTC 24 |
26522093 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.2124585560 |
|
|
Sep 18 12:44:12 PM UTC 24 |
Sep 18 12:44:28 PM UTC 24 |
538654049 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_mux.2712740480 |
|
|
Sep 18 12:44:12 PM UTC 24 |
Sep 18 12:44:28 PM UTC 24 |
1181828335 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_errors.1683797611 |
|
|
Sep 18 12:44:11 PM UTC 24 |
Sep 18 12:44:28 PM UTC 24 |
2004681993 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_smoke.2812784233 |
|
|
Sep 18 12:44:24 PM UTC 24 |
Sep 18 12:44:28 PM UTC 24 |
139448138 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.665736853 |
|
|
Sep 18 12:44:46 PM UTC 24 |
Sep 18 12:45:13 PM UTC 24 |
850210972 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_mubi.1098132440 |
|
|
Sep 18 12:44:21 PM UTC 24 |
Sep 18 12:44:31 PM UTC 24 |
527235976 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/25.lc_ctrl_sec_mubi.406233947 |
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|
Sep 18 12:44:12 PM UTC 24 |
Sep 18 12:44:31 PM UTC 24 |
935189841 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_sec_token_mux.931433209 |
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|
Sep 18 12:44:21 PM UTC 24 |
Sep 18 12:44:31 PM UTC 24 |
245183480 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.1600755658 |
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|
Sep 18 12:44:49 PM UTC 24 |
Sep 18 12:45:13 PM UTC 24 |
759391708 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all_with_rand_reset.325834179 |
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|
Sep 18 12:41:31 PM UTC 24 |
Sep 18 12:44:32 PM UTC 24 |
18039828832 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_errors.634576416 |
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|
Sep 18 12:44:18 PM UTC 24 |
Sep 18 12:44:33 PM UTC 24 |
662173340 ps |
T175 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_prog_failure.1633707752 |
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Sep 18 12:44:28 PM UTC 24 |
Sep 18 12:44:33 PM UTC 24 |
306983599 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_security_escalation.1341576769 |
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|
Sep 18 12:44:20 PM UTC 24 |
Sep 18 12:44:34 PM UTC 24 |
356731194 ps |
T177 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/26.lc_ctrl_jtag_access.179809846 |
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|
Sep 18 12:44:21 PM UTC 24 |
Sep 18 12:44:35 PM UTC 24 |
2974121968 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_alert_test.3355317321 |
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|
Sep 18 12:44:33 PM UTC 24 |
Sep 18 12:44:35 PM UTC 24 |
78558616 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all_with_rand_reset.2094375688 |
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|
Sep 18 12:43:51 PM UTC 24 |
Sep 18 12:44:36 PM UTC 24 |
2054851200 ps |
T179 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_volatile_unlock_smoke.2267639931 |
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|
Sep 18 12:44:33 PM UTC 24 |
Sep 18 12:44:36 PM UTC 24 |
36738915 ps |
T180 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_smoke.3446623705 |
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|
Sep 18 12:44:33 PM UTC 24 |
Sep 18 12:44:36 PM UTC 24 |
34123614 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/28.lc_ctrl_prog_failure.2724220683 |
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|
Sep 18 12:44:34 PM UTC 24 |
Sep 18 12:44:38 PM UTC 24 |
40950850 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/27.lc_ctrl_state_post_trans.661509925 |
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|
Sep 18 12:44:28 PM UTC 24 |
Sep 18 12:44:38 PM UTC 24 |
228627718 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/lc_ctrl_volatile_unlock_disabled-sim-vcs/coverage/default/24.lc_ctrl_state_failure.1321384472 |
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|
Sep 18 12:44:02 PM UTC 24 |
Sep 18 12:44:38 PM UTC 24 |
274418802 ps |