Group : alert_esc_agent_pkg::alert_handshake_complete_cg
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Group : alert_esc_agent_pkg::alert_handshake_complete_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_08/lc_ctrl_volatile_unlock_disabled-sim-vcs/default/sim-vcs/../src/lowrisc_dv_alert_esc_agent_0/alert_esc_agent_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
alert_esc_agent_pkg.m_alert_handshake_complete_cg 100.00 1 100 1 64 64
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1) 100.00 1 100 1 64 64
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(2) 100.00 1 100 1 64 64



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0


Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(1)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0


Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(2)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(2)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(2)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(2)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 6055 1 T15 10 T97 23 T40 235


Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 6475 1 T15 10 T97 23 T40 255


Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 6055 1 T15 10 T97 23 T40 235


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 100650 1 T4 192 T5 48 T13 14


Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 102756 1 T4 198 T5 49 T13 14


Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 100650 1 T4 192 T5 48 T13 14


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 643281 1 T12 227 T15 6 T7 1846


Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 650588 1 T12 232 T15 6 T7 1852


Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 643281 1 T12 227 T15 6 T7 1846

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