Unified Coverage Report :: Module :: lc_ctrl_state_decode

Module : lc_ctrl_state_decode

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
98.89	100.00	100.00			96.67

Source File(s) :
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/lc_ctrl_volatile_unlock_enabled-sim-vcs/default/sim-vcs/../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_state_decode.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_lc_ctrl_fsm.u_lc_ctrl_state_decode	98.89	100.00	100.00			96.67

---

Module Instance : tb.dut.u_lc_ctrl_fsm.u_lc_ctrl_state_decode

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
98.89	100.00	100.00			96.67

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
98.89	100.00	100.00			96.67

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
98.10	98.87	93.02		100.00	98.63	100.00	u_lc_ctrl_fsm

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_sec_anchor_buf	100.00	100.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : lc_ctrl_state_decode

	Line No.	Total	Covered	Percent
TOTAL		16	16	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
ALWAYS	52	10	10	100.00

42                        for (genvar k = 0; k < DecLcStateNumRep; k++) begin : gen_enum_casts
43         6/6              assign dec_lc_state_o[k] = dec_lc_state_e'(dec_lc_state_buf[k*DecLcStateWidth +:
           Tests:       T1 T2 T3  | T1 T2 T3  | T1 T2 T3  | T1 T2 T3  | T1 T2 T3  | T1 T2 T3 
44                                                                                      DecLcStateWidth]);
45                        end
46                        // The decoder logic below decodes the life cycle state vector and counter
47                        // into a format that can be exposed in the CSRs. If the state is invalid,
48                        // this will be flagged as well.
49                      
50                        always_comb begin : p_lc_state_decode
51                          // Decoded state defaults
52         1/1              dec_lc_state        = {DecLcStateNumRep{DecLcStInvalid}};
           Tests:       T1 T2 T3 
53         1/1              dec_lc_cnt_o          = {DecLcCountWidth{1'b1}};
           Tests:       T1 T2 T3 
54         1/1              dec_lc_id_state_o     = DecLcIdInvalid;
           Tests:       T1 T2 T3 
55         1/1              state_invalid_error_o = '0;
           Tests:       T1 T2 T3 
56                      
57         1/1              unique case (fsm_state_i)
           Tests:       T1 T2 T3 
58                            // Don't decode anything in ResetSt
59         1/1                ResetSt: ;
           Tests:       T1 T2 T3 
60                            // These are temporary, terminal states that are not encoded
61                            // in the persistent LC state vector from OTP, hence we decode them first.
62         1/1                EscalateSt:  dec_lc_state = {DecLcStateNumRep{DecLcStEscalate}};
           Tests:       T4 T5 T12 
63         1/1                PostTransSt: dec_lc_state = {DecLcStateNumRep{DecLcStPostTrans}};
           Tests:       T1 T2 T4 
64         1/1                InvalidSt:   dec_lc_state = {DecLcStateNumRep{DecLcStInvalid}};
           Tests:       T5 T13 T16 
65         1/1                ScrapSt:     dec_lc_state = {DecLcStateNumRep{DecLcStScrap}};
           Tests:       T12 T48 T17 
66                            // Otherwise check and decode the life cycle state continously.
67                            default: begin
68                              // Note that we require that the valid signal from OTP is
69                              // asserted at all times except when the LC controller is in ResetSt.
70                              // This will trigger an invalid_state_error when the OTP partition
71                              // is corrupt and moved into an error state, where the valid bit is
72                              // deasserted.
73                              state_invalid_error_o[0] = ~lc_state_valid_i;
74                      
75                              unique case (lc_state_i)
76                                LcStRaw:           dec_lc_state = {DecLcStateNumRep{DecLcStRaw}};
77                                LcStTestUnlocked0: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked0}};
78                                LcStTestLocked0:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked0}};
79                                LcStTestUnlocked1: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked1}};
80                                LcStTestLocked1:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked1}};
81                                LcStTestUnlocked2: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked2}};
82                                LcStTestLocked2:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked2}};
83                                LcStTestUnlocked3: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked3}};
84                                LcStTestLocked3:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked3}};
85                                LcStTestUnlocked4: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked4}};
86                                LcStTestLocked4:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked4}};
87                                LcStTestUnlocked5: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked5}};
88                                LcStTestLocked5:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked5}};
89                                LcStTestUnlocked6: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked6}};
90                                LcStTestLocked6:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked6}};
91                                LcStTestUnlocked7: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked7}};
92                                LcStDev:           dec_lc_state = {DecLcStateNumRep{DecLcStDev}};
93                                LcStProd:          dec_lc_state = {DecLcStateNumRep{DecLcStProd}};
94                                LcStProdEnd:       dec_lc_state = {DecLcStateNumRep{DecLcStProdEnd}};
95                                LcStRma:           dec_lc_state = {DecLcStateNumRep{DecLcStRma}};
96                                LcStScrap:         dec_lc_state = {DecLcStateNumRep{DecLcStScrap}};
97                                // SEC_CM: MANUF.STATE.BKGN_CHK
98                                default:           state_invalid_error_o[1] = 1'b1;
99                              endcase // lc_state_i
100                     
101                             unique case (lc_cnt_i)
102                               LcCnt0:   dec_lc_cnt_o = 5'd0;
103                               LcCnt1:   dec_lc_cnt_o = 5'd1;
104                               LcCnt2:   dec_lc_cnt_o = 5'd2;
105                               LcCnt3:   dec_lc_cnt_o = 5'd3;
106                               LcCnt4:   dec_lc_cnt_o = 5'd4;
107                               LcCnt5:   dec_lc_cnt_o = 5'd5;
108                               LcCnt6:   dec_lc_cnt_o = 5'd6;
109                               LcCnt7:   dec_lc_cnt_o = 5'd7;
110                               LcCnt8:   dec_lc_cnt_o = 5'd8;
111                               LcCnt9:   dec_lc_cnt_o = 5'd9;
112                               LcCnt10:  dec_lc_cnt_o = 5'd10;
113                               LcCnt11:  dec_lc_cnt_o = 5'd11;
114                               LcCnt12:  dec_lc_cnt_o = 5'd12;
115                               LcCnt13:  dec_lc_cnt_o = 5'd13;
116                               LcCnt14:  dec_lc_cnt_o = 5'd14;
117                               LcCnt15:  dec_lc_cnt_o = 5'd15;
118                               LcCnt16:  dec_lc_cnt_o = 5'd16;
119                               LcCnt17:  dec_lc_cnt_o = 5'd17;
120                               LcCnt18:  dec_lc_cnt_o = 5'd18;
121                               LcCnt19:  dec_lc_cnt_o = 5'd19;
122                               LcCnt20:  dec_lc_cnt_o = 5'd20;
123                               LcCnt21:  dec_lc_cnt_o = 5'd21;
124                               LcCnt22:  dec_lc_cnt_o = 5'd22;
125                               LcCnt23:  dec_lc_cnt_o = 5'd23;
126                               LcCnt24:  dec_lc_cnt_o = 5'd24;
127                               // SEC_CM: TRANSITION.CTR.BKGN_CHK
128                               default:  state_invalid_error_o[2] = 1'b1;
129                             endcase // lc_cnt_i
130                     
131                             // SEC_CM: MANUF.STATE.BKGN_CHK
132                             unique case (secrets_valid_i)
133                               // If the secrets have not been provisioned, the ID state is "blank".
134                               Off:  dec_lc_id_state_o = DecLcIdBlank;
135                               // If the secrets have been provisioned, the ID state is "personalized".
136                               On:   dec_lc_id_state_o = DecLcIdPersonalized;
137                               default: state_invalid_error_o[3] = 1'b1;
138                             endcase // secrets_valid_i
139                     
140                             // Require that any non-raw state has a valid, nonzero
141                             // transition count.
142                             // SEC_CM: TRANSITION.CTR.BKGN_CHK
143                             if (lc_state_i != LcStRaw && lc_cnt_i == LcCnt0) begin
144                               state_invalid_error_o[4] = 1'b1;
145                             end
                        MISSING_ELSE
146                     
147                             // We can't have a personalized device that is
148                             // still in RAW or any of the test states.
149                             // SEC_CM: MANUF.STATE.BKGN_CHK
150                             if (lc_tx_test_true_strict(secrets_valid_i) &&
151                                 !(lc_state_i inside {LcStDev,
152                                                      LcStProd,
153                                                      LcStProdEnd,
154                                                      LcStRma,
155                                                      LcStScrap})) begin
156                               state_invalid_error_o[5] = 1'b1;
157                             end
                        MISSING_ELSE

---

Cond Coverage for Module : lc_ctrl_state_decode

	Total	Covered	Percent
Conditions	7	7	100.00
Logical	7	7	100.00
Non-Logical	0	0
Event	0	0

 LINE       143
 EXPRESSION ((lc_state_i != LcStRaw) && (lc_cnt_i == LcCnt0))
             -----------1-----------    ----------2---------

-1-	-2-	Status	Tests
0	1	Covered	T16,T73,T74
1	0	Covered	T1,T2,T3
1	1	Covered	T107,T108,T109

 LINE       143
 SUB-EXPRESSION (lc_state_i != LcStRaw)
                -----------1-----------

-1-	Status	Tests
0	Covered	T2,T4,T5
1	Covered	T1,T2,T3

 LINE       143
 SUB-EXPRESSION (lc_cnt_i == LcCnt0)
                ----------1---------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T16,T73,T74

---

Branch Coverage for Module : lc_ctrl_state_decode

	Line No.	Total	Covered	Percent
Branches		60	58	96.67
CASE	57	60	58	96.67

57             unique case (fsm_state_i)
                      -1-  
58               // Don't decode anything in ResetSt
59               ResetSt: ;
                 ==>
60               // These are temporary, terminal states that are not encoded
61               // in the persistent LC state vector from OTP, hence we decode them first.
62               EscalateSt:  dec_lc_state = {DecLcStateNumRep{DecLcStEscalate}};
                 ==>
63               PostTransSt: dec_lc_state = {DecLcStateNumRep{DecLcStPostTrans}};
                 ==>
64               InvalidSt:   dec_lc_state = {DecLcStateNumRep{DecLcStInvalid}};
                 ==>
65               ScrapSt:     dec_lc_state = {DecLcStateNumRep{DecLcStScrap}};
                 ==>
66               // Otherwise check and decode the life cycle state continously.
67               default: begin
68                 // Note that we require that the valid signal from OTP is
69                 // asserted at all times except when the LC controller is in ResetSt.
70                 // This will trigger an invalid_state_error when the OTP partition
71                 // is corrupt and moved into an error state, where the valid bit is
72                 // deasserted.
73                 state_invalid_error_o[0] = ~lc_state_valid_i;
74         
75                 unique case (lc_state_i)
                          -2-  
76                   LcStRaw:           dec_lc_state = {DecLcStateNumRep{DecLcStRaw}};
                     ==>
77                   LcStTestUnlocked0: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked0}};
                     ==>
78                   LcStTestLocked0:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked0}};
                     ==>
79                   LcStTestUnlocked1: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked1}};
                     ==>
80                   LcStTestLocked1:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked1}};
                     ==>
81                   LcStTestUnlocked2: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked2}};
                     ==>
82                   LcStTestLocked2:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked2}};
                     ==>
83                   LcStTestUnlocked3: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked3}};
                     ==>
84                   LcStTestLocked3:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked3}};
                     ==>
85                   LcStTestUnlocked4: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked4}};
                     ==>
86                   LcStTestLocked4:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked4}};
                     ==>
87                   LcStTestUnlocked5: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked5}};
                     ==>
88                   LcStTestLocked5:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked5}};
                     ==>
89                   LcStTestUnlocked6: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked6}};
                     ==>
90                   LcStTestLocked6:   dec_lc_state = {DecLcStateNumRep{DecLcStTestLocked6}};
                     ==>
91                   LcStTestUnlocked7: dec_lc_state = {DecLcStateNumRep{DecLcStTestUnlocked7}};
                     ==>
92                   LcStDev:           dec_lc_state = {DecLcStateNumRep{DecLcStDev}};
                     ==>
93                   LcStProd:          dec_lc_state = {DecLcStateNumRep{DecLcStProd}};
                     ==>
94                   LcStProdEnd:       dec_lc_state = {DecLcStateNumRep{DecLcStProdEnd}};
                     ==>
95                   LcStRma:           dec_lc_state = {DecLcStateNumRep{DecLcStRma}};
                     ==>
96                   LcStScrap:         dec_lc_state = {DecLcStateNumRep{DecLcStScrap}};
                     ==>
97                   // SEC_CM: MANUF.STATE.BKGN_CHK
98                   default:           state_invalid_error_o[1] = 1'b1;
                     ==>
99                 endcase // lc_state_i
100        
101                unique case (lc_cnt_i)
                          -3-  
102                  LcCnt0:   dec_lc_cnt_o = 5'd0;
                     ==>
103                  LcCnt1:   dec_lc_cnt_o = 5'd1;
                     ==>
104                  LcCnt2:   dec_lc_cnt_o = 5'd2;
                     ==>
105                  LcCnt3:   dec_lc_cnt_o = 5'd3;
                     ==>
106                  LcCnt4:   dec_lc_cnt_o = 5'd4;
                     ==>
107                  LcCnt5:   dec_lc_cnt_o = 5'd5;
                     ==>
108                  LcCnt6:   dec_lc_cnt_o = 5'd6;
                     ==>
109                  LcCnt7:   dec_lc_cnt_o = 5'd7;
                     ==>
110                  LcCnt8:   dec_lc_cnt_o = 5'd8;
                     ==>
111                  LcCnt9:   dec_lc_cnt_o = 5'd9;
                     ==>
112                  LcCnt10:  dec_lc_cnt_o = 5'd10;
                     ==>
113                  LcCnt11:  dec_lc_cnt_o = 5'd11;
                     ==>
114                  LcCnt12:  dec_lc_cnt_o = 5'd12;
                     ==>
115                  LcCnt13:  dec_lc_cnt_o = 5'd13;
                     ==>
116                  LcCnt14:  dec_lc_cnt_o = 5'd14;
                     ==>
117                  LcCnt15:  dec_lc_cnt_o = 5'd15;
                     ==>
118                  LcCnt16:  dec_lc_cnt_o = 5'd16;
                     ==>
119                  LcCnt17:  dec_lc_cnt_o = 5'd17;
                     ==>
120                  LcCnt18:  dec_lc_cnt_o = 5'd18;
                     ==>
121                  LcCnt19:  dec_lc_cnt_o = 5'd19;
                     ==>
122                  LcCnt20:  dec_lc_cnt_o = 5'd20;
                     ==>
123                  LcCnt21:  dec_lc_cnt_o = 5'd21;
                     ==>
124                  LcCnt22:  dec_lc_cnt_o = 5'd22;
                     ==>
125                  LcCnt23:  dec_lc_cnt_o = 5'd23;
                     ==>
126                  LcCnt24:  dec_lc_cnt_o = 5'd24;
                     ==>
127                  // SEC_CM: TRANSITION.CTR.BKGN_CHK
128                  default:  state_invalid_error_o[2] = 1'b1;
                     ==>
129                endcase // lc_cnt_i
130        
131                // SEC_CM: MANUF.STATE.BKGN_CHK
132                unique case (secrets_valid_i)
                          -4-  
133                  // If the secrets have not been provisioned, the ID state is "blank".
134                  Off:  dec_lc_id_state_o = DecLcIdBlank;
                     ==>
135                  // If the secrets have been provisioned, the ID state is "personalized".
136                  On:   dec_lc_id_state_o = DecLcIdPersonalized;
                     ==>
137                  default: state_invalid_error_o[3] = 1'b1;
                     ==>
138                endcase // secrets_valid_i
139        
140                // Require that any non-raw state has a valid, nonzero
141                // transition count.
142                // SEC_CM: TRANSITION.CTR.BKGN_CHK
143                if (lc_state_i != LcStRaw && lc_cnt_i == LcCnt0) begin
                   -5-  
144                  state_invalid_error_o[4] = 1'b1;
                     ==>
145                end
                   MISSING_ELSE
                   ==>
146        
147                // We can't have a personalized device that is
148                // still in RAW or any of the test states.
149                // SEC_CM: MANUF.STATE.BKGN_CHK
150                if (lc_tx_test_true_strict(secrets_valid_i) &&
                   -6-  
151                    !(lc_state_i inside {LcStDev,
152                                         LcStProd,
153                                         LcStProdEnd,
154                                         LcStRma,
155                                         LcStScrap})) begin
156                  state_invalid_error_o[5] = 1'b1;
                     ==>
157                end
                   MISSING_ELSE
                   ==>

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	Status	Tests
ResetSt	-	-	-	-	-	Covered	T1,T2,T3
EscalateSt	-	-	-	-	-	Covered	T4,T5,T12
PostTransSt	-	-	-	-	-	Covered	T1,T2,T4
InvalidSt	-	-	-	-	-	Covered	T5,T13,T16
ScrapSt	-	-	-	-	-	Covered	T12,T48,T17
default	LcStRaw	-	-	-	-	Covered	T2,T4,T5
default	LcStTestUnlocked0	-	-	-	-	Covered	T2,T5,T12
default	LcStTestLocked0	-	-	-	-	Covered	T1,T4,T12
default	LcStTestUnlocked1	-	-	-	-	Covered	T3,T4,T12
default	LcStTestLocked1	-	-	-	-	Covered	T4,T12,T13
default	LcStTestUnlocked2	-	-	-	-	Covered	T1,T4,T12
default	LcStTestLocked2	-	-	-	-	Covered	T1,T4,T12
default	LcStTestUnlocked3	-	-	-	-	Covered	T12,T6,T13
default	LcStTestLocked3	-	-	-	-	Covered	T5,T12,T6
default	LcStTestUnlocked4	-	-	-	-	Covered	T4,T12,T13
default	LcStTestLocked4	-	-	-	-	Covered	T4,T12,T6
default	LcStTestUnlocked5	-	-	-	-	Covered	T12,T8,T13
default	LcStTestLocked5	-	-	-	-	Covered	T5,T12,T13
default	LcStTestUnlocked6	-	-	-	-	Covered	T1,T12,T13
default	LcStTestLocked6	-	-	-	-	Covered	T4,T12,T7
default	LcStTestUnlocked7	-	-	-	-	Covered	T1,T5,T12
default	LcStDev	-	-	-	-	Covered	T12,T6,T13
default	LcStProd	-	-	-	-	Covered	T1,T12,T6
default	LcStProdEnd	-	-	-	-	Covered	T1,T12,T6
default	LcStRma	-	-	-	-	Covered	T12,T13,T14
default	LcStScrap	-	-	-	-	Covered	T12,T48,T17
default	default	-	-	-	-	Covered	T5,T13,T11
default	-	LcCnt0	-	-	-	Covered	T16,T73,T74
default	-	LcCnt1	-	-	-	Covered	T2,T4,T13
default	-	LcCnt2	-	-	-	Covered	T4,T12,T7
default	-	LcCnt3	-	-	-	Covered	T4,T12,T6
default	-	LcCnt4	-	-	-	Covered	T1,T4,T12
default	-	LcCnt5	-	-	-	Covered	T13,T14,T15
default	-	LcCnt6	-	-	-	Covered	T4,T5,T12
default	-	LcCnt7	-	-	-	Covered	T12,T6,T13
default	-	LcCnt8	-	-	-	Covered	T4,T5,T12
default	-	LcCnt9	-	-	-	Covered	T5,T12,T6
default	-	LcCnt10	-	-	-	Covered	T4,T5,T12
default	-	LcCnt11	-	-	-	Covered	T1,T4,T12
default	-	LcCnt12	-	-	-	Covered	T1,T12,T6
default	-	LcCnt13	-	-	-	Covered	T12,T6,T13
default	-	LcCnt14	-	-	-	Covered	T1,T4,T5
default	-	LcCnt15	-	-	-	Covered	T4,T12,T7
default	-	LcCnt16	-	-	-	Covered	T12,T13,T14
default	-	LcCnt17	-	-	-	Covered	T12,T14,T16
default	-	LcCnt18	-	-	-	Covered	T4,T12,T7
default	-	LcCnt19	-	-	-	Covered	T1,T12,T6
default	-	LcCnt20	-	-	-	Covered	T1,T3,T4
default	-	LcCnt21	-	-	-	Covered	T4,T12,T6
default	-	LcCnt22	-	-	-	Covered	T12,T6,T13
default	-	LcCnt23	-	-	-	Covered	T1,T5,T12
default	-	LcCnt24	-	-	-	Covered	T12,T14,T48
default	-	default	-	-	-	Covered	T13,T11,T63
default	-	-	Off	-	-	Covered	T1,T2,T3
default	-	-	On	-	-	Not Covered
default	-	-	default	-	-	Covered	T16,T42,T54
default	-	-	-	1	-	Covered	T107,T108,T109
default	-	-	-	0	-	Covered	T1,T2,T3
default	-	-	-	-	1	Not Covered
default	-	-	-	-	0	Covered	T1,T2,T3