| T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_volatile_unlock_smoke.3736941123 |
|
|
Aug 25 10:37:57 AM UTC 24 |
Aug 25 10:37:59 AM UTC 24 |
14851993 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_token_digest.2410344884 |
|
|
Aug 25 10:37:42 AM UTC 24 |
Aug 25 10:38:00 AM UTC 24 |
1552916405 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_alert_test.3815425573 |
|
|
Aug 25 10:37:57 AM UTC 24 |
Aug 25 10:38:00 AM UTC 24 |
29563521 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_smoke.2944847560 |
|
|
Aug 25 10:37:57 AM UTC 24 |
Aug 25 10:38:01 AM UTC 24 |
22285662 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_state_failure.2799594996 |
|
|
Aug 25 10:36:57 AM UTC 24 |
Aug 25 10:38:01 AM UTC 24 |
270529934 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_sec_mubi.2989342344 |
|
|
Aug 25 10:37:40 AM UTC 24 |
Aug 25 10:38:02 AM UTC 24 |
372835743 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_errors.4103470305 |
|
|
Aug 25 10:37:39 AM UTC 24 |
Aug 25 10:38:02 AM UTC 24 |
814766527 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_sec_token_digest.3864218043 |
|
|
Aug 25 10:37:26 AM UTC 24 |
Aug 25 10:38:02 AM UTC 24 |
2457927588 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_security_escalation.2432834341 |
|
|
Aug 25 10:37:50 AM UTC 24 |
Aug 25 10:38:03 AM UTC 24 |
349741220 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_prog_failure.2598523970 |
|
|
Aug 25 10:38:00 AM UTC 24 |
Aug 25 10:38:05 AM UTC 24 |
200319017 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_jtag_access.549813049 |
|
|
Aug 25 10:38:01 AM UTC 24 |
Aug 25 10:38:06 AM UTC 24 |
78166414 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_alert_test.1676322135 |
|
|
Aug 25 10:38:05 AM UTC 24 |
Aug 25 10:38:07 AM UTC 24 |
44245444 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_mux.341465043 |
|
|
Aug 25 10:37:52 AM UTC 24 |
Aug 25 10:38:09 AM UTC 24 |
329522562 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_volatile_unlock_smoke.1460207291 |
|
|
Aug 25 10:38:07 AM UTC 24 |
Aug 25 10:38:09 AM UTC 24 |
46187135 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_token_digest.3789133533 |
|
|
Aug 25 10:37:54 AM UTC 24 |
Aug 25 10:38:09 AM UTC 24 |
1650939258 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_smoke.2284753120 |
|
|
Aug 25 10:38:06 AM UTC 24 |
Aug 25 10:38:11 AM UTC 24 |
363611299 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_errors.2614366870 |
|
|
Aug 25 10:37:49 AM UTC 24 |
Aug 25 10:38:12 AM UTC 24 |
1854844434 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_state_post_trans.1623348242 |
|
|
Aug 25 10:37:58 AM UTC 24 |
Aug 25 10:38:13 AM UTC 24 |
193927138 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_prog_failure.2755890673 |
|
|
Aug 25 10:38:11 AM UTC 24 |
Aug 25 10:38:14 AM UTC 24 |
24702749 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all_with_rand_reset.1915215447 |
|
|
Aug 25 10:36:24 AM UTC 24 |
Aug 25 10:38:15 AM UTC 24 |
7861171026 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_digest.23321412 |
|
|
Aug 25 10:38:03 AM UTC 24 |
Aug 25 10:38:16 AM UTC 24 |
1171428509 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_token_mux.174259739 |
|
|
Aug 25 10:38:03 AM UTC 24 |
Aug 25 10:38:17 AM UTC 24 |
275488822 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_sec_mubi.409831004 |
|
|
Aug 25 10:37:52 AM UTC 24 |
Aug 25 10:38:17 AM UTC 24 |
357479697 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/12.lc_ctrl_stress_all.2668817901 |
|
|
Aug 25 10:33:54 AM UTC 24 |
Aug 25 10:38:17 AM UTC 24 |
16287243530 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_post_trans.567463868 |
|
|
Aug 25 10:38:11 AM UTC 24 |
Aug 25 10:38:18 AM UTC 24 |
277207789 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_security_escalation.1407130651 |
|
|
Aug 25 10:38:01 AM UTC 24 |
Aug 25 10:38:18 AM UTC 24 |
316519350 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_state_failure.3175620123 |
|
|
Aug 25 10:37:37 AM UTC 24 |
Aug 25 10:38:21 AM UTC 24 |
1017265513 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/28.lc_ctrl_state_failure.365388698 |
|
|
Aug 25 10:37:48 AM UTC 24 |
Aug 25 10:38:21 AM UTC 24 |
508990838 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_alert_test.2394055365 |
|
|
Aug 25 10:38:20 AM UTC 24 |
Aug 25 10:38:22 AM UTC 24 |
15046014 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_volatile_unlock_smoke.4289390059 |
|
|
Aug 25 10:38:20 AM UTC 24 |
Aug 25 10:38:22 AM UTC 24 |
13623511 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_errors.545560903 |
|
|
Aug 25 10:38:11 AM UTC 24 |
Aug 25 10:38:25 AM UTC 24 |
1091786778 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_volatile_unlock_smoke.1209011322 |
|
|
Aug 25 10:38:41 AM UTC 24 |
Aug 25 10:38:43 AM UTC 24 |
13398136 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_security_escalation.3709016401 |
|
|
Aug 25 10:38:12 AM UTC 24 |
Aug 25 10:38:25 AM UTC 24 |
224252052 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_smoke.3578599831 |
|
|
Aug 25 10:38:20 AM UTC 24 |
Aug 25 10:38:26 AM UTC 24 |
53876476 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_sec_mubi.1611987431 |
|
|
Aug 25 10:38:03 AM UTC 24 |
Aug 25 10:38:26 AM UTC 24 |
326037820 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_mubi.2589664867 |
|
|
Aug 25 10:38:26 AM UTC 24 |
Aug 25 10:38:44 AM UTC 24 |
499678095 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_jtag_access.792078595 |
|
|
Aug 25 10:38:13 AM UTC 24 |
Aug 25 10:38:26 AM UTC 24 |
5364410707 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/25.lc_ctrl_stress_all_with_rand_reset.168394009 |
|
|
Aug 25 10:37:26 AM UTC 24 |
Aug 25 10:38:28 AM UTC 24 |
5168736876 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_prog_failure.388444495 |
|
|
Aug 25 10:38:23 AM UTC 24 |
Aug 25 10:38:28 AM UTC 24 |
208126185 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_mubi.3945789248 |
|
|
Aug 25 10:38:14 AM UTC 24 |
Aug 25 10:38:29 AM UTC 24 |
267242409 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_mux.1678364104 |
|
|
Aug 25 10:38:16 AM UTC 24 |
Aug 25 10:38:29 AM UTC 24 |
281003941 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_alert_test.2554063427 |
|
|
Aug 25 10:38:28 AM UTC 24 |
Aug 25 10:38:31 AM UTC 24 |
105042337 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/29.lc_ctrl_errors.257778955 |
|
|
Aug 25 10:38:01 AM UTC 24 |
Aug 25 10:38:32 AM UTC 24 |
1061283138 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_volatile_unlock_smoke.690544251 |
|
|
Aug 25 10:38:30 AM UTC 24 |
Aug 25 10:38:32 AM UTC 24 |
45496574 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_sec_token_digest.872129419 |
|
|
Aug 25 10:38:16 AM UTC 24 |
Aug 25 10:38:32 AM UTC 24 |
757044313 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_smoke.125854134 |
|
|
Aug 25 10:38:30 AM UTC 24 |
Aug 25 10:38:34 AM UTC 24 |
27054708 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.2490843091 |
|
|
Aug 25 10:34:35 AM UTC 24 |
Aug 25 10:38:35 AM UTC 24 |
49661303808 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_post_trans.1984654171 |
|
|
Aug 25 10:38:31 AM UTC 24 |
Aug 25 10:38:36 AM UTC 24 |
57275545 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_prog_failure.1605840362 |
|
|
Aug 25 10:38:33 AM UTC 24 |
Aug 25 10:38:38 AM UTC 24 |
95237667 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_jtag_access.3907838369 |
|
|
Aug 25 10:38:34 AM UTC 24 |
Aug 25 10:38:38 AM UTC 24 |
872190512 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_state_failure.3664585237 |
|
|
Aug 25 10:37:30 AM UTC 24 |
Aug 25 10:38:39 AM UTC 24 |
1217581400 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_mux.3628600377 |
|
|
Aug 25 10:38:27 AM UTC 24 |
Aug 25 10:38:39 AM UTC 24 |
1070907176 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_errors.664007140 |
|
|
Aug 25 10:38:23 AM UTC 24 |
Aug 25 10:38:41 AM UTC 24 |
328485545 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_security_escalation.3343017415 |
|
|
Aug 25 10:38:23 AM UTC 24 |
Aug 25 10:38:42 AM UTC 24 |
862379889 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_alert_test.325754279 |
|
|
Aug 25 10:38:40 AM UTC 24 |
Aug 25 10:38:43 AM UTC 24 |
78606045 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_sec_token_digest.1945803874 |
|
|
Aug 25 10:38:27 AM UTC 24 |
Aug 25 10:38:43 AM UTC 24 |
268837146 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_post_trans.2374526156 |
|
|
Aug 25 10:38:23 AM UTC 24 |
Aug 25 10:38:45 AM UTC 24 |
107893375 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_jtag_access.1421603940 |
|
|
Aug 25 10:38:26 AM UTC 24 |
Aug 25 10:38:45 AM UTC 24 |
3435854879 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_prog_failure.3548378247 |
|
|
Aug 25 10:38:44 AM UTC 24 |
Aug 25 10:38:47 AM UTC 24 |
54345387 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_smoke.2517470726 |
|
|
Aug 25 10:38:40 AM UTC 24 |
Aug 25 10:38:49 AM UTC 24 |
801311317 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_security_escalation.1884539368 |
|
|
Aug 25 10:38:33 AM UTC 24 |
Aug 25 10:38:50 AM UTC 24 |
1408706752 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_digest.3442596467 |
|
|
Aug 25 10:38:37 AM UTC 24 |
Aug 25 10:38:50 AM UTC 24 |
485377237 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_jtag_access.1050842185 |
|
|
Aug 25 10:39:40 AM UTC 24 |
Aug 25 10:39:45 AM UTC 24 |
628437057 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_post_trans.1531841529 |
|
|
Aug 25 10:38:44 AM UTC 24 |
Aug 25 10:38:51 AM UTC 24 |
308415301 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_alert_test.1565997541 |
|
|
Aug 25 10:38:50 AM UTC 24 |
Aug 25 10:38:53 AM UTC 24 |
83782917 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_errors.744923950 |
|
|
Aug 25 10:38:33 AM UTC 24 |
Aug 25 10:38:53 AM UTC 24 |
1421471139 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all_with_rand_reset.2745270507 |
|
|
Aug 25 10:37:34 AM UTC 24 |
Aug 25 10:38:53 AM UTC 24 |
3561327575 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_volatile_unlock_smoke.1802422899 |
|
|
Aug 25 10:38:52 AM UTC 24 |
Aug 25 10:38:55 AM UTC 24 |
10983101 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_jtag_access.3118077474 |
|
|
Aug 25 10:38:45 AM UTC 24 |
Aug 25 10:38:55 AM UTC 24 |
232727874 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_prog_failure.3584188243 |
|
|
Aug 25 10:38:53 AM UTC 24 |
Aug 25 10:38:57 AM UTC 24 |
124498572 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_mubi.742264971 |
|
|
Aug 25 10:38:35 AM UTC 24 |
Aug 25 10:38:57 AM UTC 24 |
380881190 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_smoke.2152802577 |
|
|
Aug 25 10:38:52 AM UTC 24 |
Aug 25 10:38:58 AM UTC 24 |
336632804 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_post_trans.1591843370 |
|
|
Aug 25 10:38:52 AM UTC 24 |
Aug 25 10:38:59 AM UTC 24 |
97487181 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_errors.2872317545 |
|
|
Aug 25 10:38:45 AM UTC 24 |
Aug 25 10:39:00 AM UTC 24 |
333839478 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_digest.1716714393 |
|
|
Aug 25 10:38:47 AM UTC 24 |
Aug 25 10:39:01 AM UTC 24 |
197561125 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_alert_test.385956903 |
|
|
Aug 25 10:39:00 AM UTC 24 |
Aug 25 10:39:02 AM UTC 24 |
92871136 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/22.lc_ctrl_stress_all.3181254757 |
|
|
Aug 25 10:36:54 AM UTC 24 |
Aug 25 10:39:03 AM UTC 24 |
3989938637 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_sec_token_mux.1311974927 |
|
|
Aug 25 10:38:35 AM UTC 24 |
Aug 25 10:39:04 AM UTC 24 |
976374287 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/21.lc_ctrl_stress_all.1136398639 |
|
|
Aug 25 10:36:39 AM UTC 24 |
Aug 25 10:39:04 AM UTC 24 |
2842514627 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_volatile_unlock_smoke.1365917131 |
|
|
Aug 25 10:39:02 AM UTC 24 |
Aug 25 10:39:05 AM UTC 24 |
18908463 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_smoke.2085393391 |
|
|
Aug 25 10:39:01 AM UTC 24 |
Aug 25 10:39:05 AM UTC 24 |
422467578 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_prog_failure.268604515 |
|
|
Aug 25 10:40:53 AM UTC 24 |
Aug 25 10:40:58 AM UTC 24 |
215100029 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_jtag_access.779356850 |
|
|
Aug 25 10:38:54 AM UTC 24 |
Aug 25 10:39:05 AM UTC 24 |
452570939 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_state_failure.3540746586 |
|
|
Aug 25 10:38:20 AM UTC 24 |
Aug 25 10:39:05 AM UTC 24 |
819519020 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_security_escalation.2235978747 |
|
|
Aug 25 10:38:45 AM UTC 24 |
Aug 25 10:39:06 AM UTC 24 |
1631599603 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_token_mux.4189814941 |
|
|
Aug 25 10:38:47 AM UTC 24 |
Aug 25 10:39:09 AM UTC 24 |
383907591 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_prog_failure.3098724384 |
|
|
Aug 25 10:39:06 AM UTC 24 |
Aug 25 10:39:11 AM UTC 24 |
68215356 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_security_escalation.18093857 |
|
|
Aug 25 10:38:54 AM UTC 24 |
Aug 25 10:39:12 AM UTC 24 |
1422070065 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_jtag_access.2701874964 |
|
|
Aug 25 10:39:06 AM UTC 24 |
Aug 25 10:39:16 AM UTC 24 |
248810099 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_alert_test.1862773249 |
|
|
Aug 25 10:39:13 AM UTC 24 |
Aug 25 10:39:16 AM UTC 24 |
17107829 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_post_trans.478679826 |
|
|
Aug 25 10:39:05 AM UTC 24 |
Aug 25 10:39:17 AM UTC 24 |
248013730 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_sec_mubi.1243039801 |
|
|
Aug 25 10:38:47 AM UTC 24 |
Aug 25 10:39:17 AM UTC 24 |
646306439 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/30.lc_ctrl_state_failure.2660889580 |
|
|
Aug 25 10:38:08 AM UTC 24 |
Aug 25 10:39:19 AM UTC 24 |
2120043172 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_state_failure.3583394780 |
|
|
Aug 25 10:38:52 AM UTC 24 |
Aug 25 10:39:19 AM UTC 24 |
625972148 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_digest.1117547768 |
|
|
Aug 25 10:38:58 AM UTC 24 |
Aug 25 10:39:19 AM UTC 24 |
476603218 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_mubi.2965260849 |
|
|
Aug 25 10:38:56 AM UTC 24 |
Aug 25 10:39:20 AM UTC 24 |
400313827 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_volatile_unlock_smoke.2292626621 |
|
|
Aug 25 10:39:18 AM UTC 24 |
Aug 25 10:39:20 AM UTC 24 |
17145732 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_security_escalation.4193087901 |
|
|
Aug 25 10:39:06 AM UTC 24 |
Aug 25 10:39:20 AM UTC 24 |
203465028 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_errors.1655316173 |
|
|
Aug 25 10:39:06 AM UTC 24 |
Aug 25 10:39:21 AM UTC 24 |
917614809 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_errors.3999100949 |
|
|
Aug 25 10:38:54 AM UTC 24 |
Aug 25 10:39:21 AM UTC 24 |
429333744 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_smoke.2604532816 |
|
|
Aug 25 10:39:18 AM UTC 24 |
Aug 25 10:39:22 AM UTC 24 |
52777602 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_volatile_unlock_smoke.3708571675 |
|
|
Aug 25 10:39:45 AM UTC 24 |
Aug 25 10:39:47 AM UTC 24 |
13719673 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/34.lc_ctrl_sec_token_mux.1319880908 |
|
|
Aug 25 10:38:57 AM UTC 24 |
Aug 25 10:39:22 AM UTC 24 |
536282128 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_mux.3822937514 |
|
|
Aug 25 10:39:07 AM UTC 24 |
Aug 25 10:39:24 AM UTC 24 |
363300026 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_jtag_access.666783801 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:25 AM UTC 24 |
70696274 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_alert_test.698131638 |
|
|
Aug 25 10:39:25 AM UTC 24 |
Aug 25 10:39:27 AM UTC 24 |
67945462 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/20.lc_ctrl_stress_all.1586901649 |
|
|
Aug 25 10:36:24 AM UTC 24 |
Aug 25 10:39:28 AM UTC 24 |
12761689870 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_volatile_unlock_smoke.301843257 |
|
|
Aug 25 10:39:25 AM UTC 24 |
Aug 25 10:39:28 AM UTC 24 |
39612944 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_prog_failure.1292893132 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:28 AM UTC 24 |
430017895 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_token_digest.3171110906 |
|
|
Aug 25 10:39:07 AM UTC 24 |
Aug 25 10:39:29 AM UTC 24 |
311954713 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_smoke.3254594459 |
|
|
Aug 25 10:39:25 AM UTC 24 |
Aug 25 10:39:30 AM UTC 24 |
150870932 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_post_trans.3383498497 |
|
|
Aug 25 10:39:19 AM UTC 24 |
Aug 25 10:39:30 AM UTC 24 |
121032039 ps |
| T166 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.4042895367 |
|
|
Aug 25 10:38:39 AM UTC 24 |
Aug 25 10:39:31 AM UTC 24 |
6293411200 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/15.lc_ctrl_stress_all.1127882811 |
|
|
Aug 25 10:34:53 AM UTC 24 |
Aug 25 10:39:32 AM UTC 24 |
19989361122 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_state_failure.3935167655 |
|
|
Aug 25 10:38:30 AM UTC 24 |
Aug 25 10:39:32 AM UTC 24 |
221919602 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_sec_mubi.1036553808 |
|
|
Aug 25 10:39:07 AM UTC 24 |
Aug 25 10:39:33 AM UTC 24 |
487851264 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/33.lc_ctrl_state_failure.272458300 |
|
|
Aug 25 10:38:42 AM UTC 24 |
Aug 25 10:39:34 AM UTC 24 |
3247452792 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_prog_failure.1519982852 |
|
|
Aug 25 10:39:29 AM UTC 24 |
Aug 25 10:39:34 AM UTC 24 |
222564214 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_digest.1314536199 |
|
|
Aug 25 10:39:23 AM UTC 24 |
Aug 25 10:39:35 AM UTC 24 |
933207720 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_post_trans.3025810668 |
|
|
Aug 25 10:39:29 AM UTC 24 |
Aug 25 10:39:37 AM UTC 24 |
209457305 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_alert_test.3805738518 |
|
|
Aug 25 10:39:34 AM UTC 24 |
Aug 25 10:39:37 AM UTC 24 |
120405104 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_security_escalation.2324267846 |
|
|
Aug 25 10:39:29 AM UTC 24 |
Aug 25 10:39:38 AM UTC 24 |
892246531 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_volatile_unlock_smoke.4262580932 |
|
|
Aug 25 10:39:35 AM UTC 24 |
Aug 25 10:39:38 AM UTC 24 |
138069603 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/24.lc_ctrl_stress_all_with_rand_reset.3044066793 |
|
|
Aug 25 10:37:14 AM UTC 24 |
Aug 25 10:39:38 AM UTC 24 |
6789090425 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_errors.1025549560 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:39 AM UTC 24 |
1136931242 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_smoke.2869476444 |
|
|
Aug 25 10:39:35 AM UTC 24 |
Aug 25 10:39:40 AM UTC 24 |
48496770 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_token_mux.3080418053 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:41 AM UTC 24 |
2238401433 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_jtag_access.4052304484 |
|
|
Aug 25 10:39:31 AM UTC 24 |
Aug 25 10:39:41 AM UTC 24 |
227661425 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/23.lc_ctrl_stress_all.1323320331 |
|
|
Aug 25 10:37:03 AM UTC 24 |
Aug 25 10:39:42 AM UTC 24 |
3189937808 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_security_escalation.1185659054 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:43 AM UTC 24 |
498836407 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_mux.31172181 |
|
|
Aug 25 10:39:32 AM UTC 24 |
Aug 25 10:39:43 AM UTC 24 |
412265325 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_prog_failure.900774897 |
|
|
Aug 25 10:39:38 AM UTC 24 |
Aug 25 10:39:44 AM UTC 24 |
56729625 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_errors.3886234306 |
|
|
Aug 25 10:39:29 AM UTC 24 |
Aug 25 10:39:48 AM UTC 24 |
1960907065 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/11.lc_ctrl_stress_all.3654643191 |
|
|
Aug 25 10:33:32 AM UTC 24 |
Aug 25 10:39:44 AM UTC 24 |
15137991801 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_mubi.261473288 |
|
|
Aug 25 10:39:31 AM UTC 24 |
Aug 25 10:39:44 AM UTC 24 |
219959211 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_alert_test.2572322963 |
|
|
Aug 25 10:39:45 AM UTC 24 |
Aug 25 10:39:48 AM UTC 24 |
13555086 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_sec_token_digest.1883860738 |
|
|
Aug 25 10:39:34 AM UTC 24 |
Aug 25 10:39:50 AM UTC 24 |
355784577 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_smoke.915962873 |
|
|
Aug 25 10:39:45 AM UTC 24 |
Aug 25 10:39:50 AM UTC 24 |
246716602 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_sec_mubi.446761928 |
|
|
Aug 25 10:39:21 AM UTC 24 |
Aug 25 10:39:51 AM UTC 24 |
617226589 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_prog_failure.2652057571 |
|
|
Aug 25 10:39:47 AM UTC 24 |
Aug 25 10:39:52 AM UTC 24 |
47884305 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_jtag_access.928989801 |
|
|
Aug 25 10:39:49 AM UTC 24 |
Aug 25 10:39:54 AM UTC 24 |
144386715 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_post_trans.2440066566 |
|
|
Aug 25 10:40:39 AM UTC 24 |
Aug 25 10:40:57 AM UTC 24 |
60830460 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/10.lc_ctrl_stress_all.2108130296 |
|
|
Aug 25 10:33:18 AM UTC 24 |
Aug 25 10:39:54 AM UTC 24 |
31106943022 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_alert_test.1083898449 |
|
|
Aug 25 10:39:53 AM UTC 24 |
Aug 25 10:39:56 AM UTC 24 |
22103073 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_mux.2257458223 |
|
|
Aug 25 10:39:42 AM UTC 24 |
Aug 25 10:39:56 AM UTC 24 |
1349038910 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_token_digest.3308384038 |
|
|
Aug 25 10:39:42 AM UTC 24 |
Aug 25 10:39:57 AM UTC 24 |
2602861788 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_volatile_unlock_smoke.2253021386 |
|
|
Aug 25 10:39:55 AM UTC 24 |
Aug 25 10:39:57 AM UTC 24 |
19239838 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_post_trans.175585658 |
|
|
Aug 25 10:39:38 AM UTC 24 |
Aug 25 10:39:58 AM UTC 24 |
431547738 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_post_trans.637617516 |
|
|
Aug 25 10:39:47 AM UTC 24 |
Aug 25 10:39:58 AM UTC 24 |
234521762 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_mubi.2297797205 |
|
|
Aug 25 10:40:21 AM UTC 24 |
Aug 25 10:40:55 AM UTC 24 |
3770048132 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_errors.593694285 |
|
|
Aug 25 10:39:40 AM UTC 24 |
Aug 25 10:40:00 AM UTC 24 |
4887563960 ps |
| T81 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_smoke.2954498786 |
|
|
Aug 25 10:39:55 AM UTC 24 |
Aug 25 10:40:00 AM UTC 24 |
58251580 ps |
| T91 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_stress_all.2794091346 |
|
|
Aug 25 10:39:10 AM UTC 24 |
Aug 25 10:40:01 AM UTC 24 |
834301320 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_security_escalation.3078784858 |
|
|
Aug 25 10:39:40 AM UTC 24 |
Aug 25 10:40:01 AM UTC 24 |
549231099 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_mux.695520863 |
|
|
Aug 25 10:39:51 AM UTC 24 |
Aug 25 10:40:03 AM UTC 24 |
503178004 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_errors.4157875132 |
|
|
Aug 25 10:39:48 AM UTC 24 |
Aug 25 10:40:04 AM UTC 24 |
1156657975 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_security_escalation.1690944333 |
|
|
Aug 25 10:39:49 AM UTC 24 |
Aug 25 10:40:05 AM UTC 24 |
302199933 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_sec_mubi.590012536 |
|
|
Aug 25 10:39:40 AM UTC 24 |
Aug 25 10:40:06 AM UTC 24 |
915550299 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_alert_test.4145561601 |
|
|
Aug 25 10:40:04 AM UTC 24 |
Aug 25 10:40:07 AM UTC 24 |
26377959 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_prog_failure.169804515 |
|
|
Aug 25 10:39:58 AM UTC 24 |
Aug 25 10:40:07 AM UTC 24 |
318902316 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_smoke.1076924209 |
|
|
Aug 25 10:40:05 AM UTC 24 |
Aug 25 10:40:08 AM UTC 24 |
17885761 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/35.lc_ctrl_state_failure.94538966 |
|
|
Aug 25 10:39:03 AM UTC 24 |
Aug 25 10:40:09 AM UTC 24 |
1438534834 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_volatile_unlock_smoke.1505094359 |
|
|
Aug 25 10:40:07 AM UTC 24 |
Aug 25 10:40:10 AM UTC 24 |
17894363 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_post_trans.5772896 |
|
|
Aug 25 10:39:58 AM UTC 24 |
Aug 25 10:40:10 AM UTC 24 |
271497554 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_prog_failure.2156252348 |
|
|
Aug 25 10:40:08 AM UTC 24 |
Aug 25 10:40:13 AM UTC 24 |
81363167 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_jtag_access.2120017718 |
|
|
Aug 25 10:39:59 AM UTC 24 |
Aug 25 10:40:14 AM UTC 24 |
375065935 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_token_digest.51609025 |
|
|
Aug 25 10:39:51 AM UTC 24 |
Aug 25 10:40:14 AM UTC 24 |
1945966931 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_digest.123171065 |
|
|
Aug 25 10:40:01 AM UTC 24 |
Aug 25 10:40:15 AM UTC 24 |
342736890 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_security_escalation.1810564418 |
|
|
Aug 25 10:39:59 AM UTC 24 |
Aug 25 10:40:16 AM UTC 24 |
504342310 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/36.lc_ctrl_state_failure.1593020057 |
|
|
Aug 25 10:39:18 AM UTC 24 |
Aug 25 10:40:16 AM UTC 24 |
605702470 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_token_mux.2057342299 |
|
|
Aug 25 10:40:01 AM UTC 24 |
Aug 25 10:40:17 AM UTC 24 |
300720526 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_sec_mubi.4166459906 |
|
|
Aug 25 10:39:51 AM UTC 24 |
Aug 25 10:40:17 AM UTC 24 |
691047435 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_state_failure.2959142645 |
|
|
Aug 25 10:39:26 AM UTC 24 |
Aug 25 10:40:17 AM UTC 24 |
957850112 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_jtag_access.2054543455 |
|
|
Aug 25 10:40:11 AM UTC 24 |
Aug 25 10:40:17 AM UTC 24 |
106142517 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/27.lc_ctrl_stress_all_with_rand_reset.3539525549 |
|
|
Aug 25 10:37:44 AM UTC 24 |
Aug 25 10:40:18 AM UTC 24 |
12050081226 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_alert_test.2394035852 |
|
|
Aug 25 10:40:17 AM UTC 24 |
Aug 25 10:40:19 AM UTC 24 |
30338947 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_errors.990091961 |
|
|
Aug 25 10:39:58 AM UTC 24 |
Aug 25 10:40:20 AM UTC 24 |
599336865 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_post_trans.2455100601 |
|
|
Aug 25 10:40:08 AM UTC 24 |
Aug 25 10:40:21 AM UTC 24 |
200589175 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_volatile_unlock_smoke.2036850302 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:40:21 AM UTC 24 |
12887005 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_smoke.2902728894 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:40:23 AM UTC 24 |
70820827 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_prog_failure.2884765042 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:40:24 AM UTC 24 |
42146300 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_security_escalation.294324176 |
|
|
Aug 25 10:40:10 AM UTC 24 |
Aug 25 10:40:25 AM UTC 24 |
1037624045 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_errors.2578095338 |
|
|
Aug 25 10:40:10 AM UTC 24 |
Aug 25 10:40:27 AM UTC 24 |
294343358 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_digest.3201925128 |
|
|
Aug 25 10:40:14 AM UTC 24 |
Aug 25 10:40:27 AM UTC 24 |
415464492 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_sec_mubi.1584871607 |
|
|
Aug 25 10:40:01 AM UTC 24 |
Aug 25 10:40:27 AM UTC 24 |
413797559 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_alert_test.2002499447 |
|
|
Aug 25 10:40:26 AM UTC 24 |
Aug 25 10:40:29 AM UTC 24 |
62348753 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.2904466813 |
|
|
Aug 25 10:35:53 AM UTC 24 |
Aug 25 10:40:29 AM UTC 24 |
23939639418 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_mubi.3282801480 |
|
|
Aug 25 10:40:11 AM UTC 24 |
Aug 25 10:40:29 AM UTC 24 |
1129751188 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/38.lc_ctrl_state_failure.1840686022 |
|
|
Aug 25 10:39:37 AM UTC 24 |
Aug 25 10:40:29 AM UTC 24 |
529649732 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_volatile_unlock_smoke.742195341 |
|
|
Aug 25 10:40:27 AM UTC 24 |
Aug 25 10:40:30 AM UTC 24 |
101893458 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_smoke.4509444 |
|
|
Aug 25 10:40:27 AM UTC 24 |
Aug 25 10:40:33 AM UTC 24 |
257359922 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_prog_failure.3822723393 |
|
|
Aug 25 10:40:29 AM UTC 24 |
Aug 25 10:40:34 AM UTC 24 |
59852772 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_post_trans.1955661179 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:40:34 AM UTC 24 |
135177965 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_sec_token_mux.1744547263 |
|
|
Aug 25 10:40:13 AM UTC 24 |
Aug 25 10:40:35 AM UTC 24 |
1771350086 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_post_trans.767450428 |
|
|
Aug 25 10:40:29 AM UTC 24 |
Aug 25 10:40:35 AM UTC 24 |
100809971 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_alert_test.3111785173 |
|
|
Aug 25 10:40:34 AM UTC 24 |
Aug 25 10:40:37 AM UTC 24 |
62889722 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/39.lc_ctrl_state_failure.3850738658 |
|
|
Aug 25 10:39:45 AM UTC 24 |
Aug 25 10:40:38 AM UTC 24 |
680718648 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_volatile_unlock_smoke.3980166931 |
|
|
Aug 25 10:40:36 AM UTC 24 |
Aug 25 10:40:39 AM UTC 24 |
23914707 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_digest.830446149 |
|
|
Aug 25 10:40:23 AM UTC 24 |
Aug 25 10:40:39 AM UTC 24 |
996055670 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_security_escalation.523160211 |
|
|
Aug 25 10:40:21 AM UTC 24 |
Aug 25 10:40:40 AM UTC 24 |
1787802037 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_sec_token_mux.2639264842 |
|
|
Aug 25 10:40:23 AM UTC 24 |
Aug 25 10:40:41 AM UTC 24 |
290016545 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_smoke.4011702583 |
|
|
Aug 25 10:40:36 AM UTC 24 |
Aug 25 10:40:41 AM UTC 24 |
74414765 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_prog_failure.2752614465 |
|
|
Aug 25 10:40:39 AM UTC 24 |
Aug 25 10:40:43 AM UTC 24 |
60122027 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_digest.415211911 |
|
|
Aug 25 10:40:32 AM UTC 24 |
Aug 25 10:40:45 AM UTC 24 |
630795591 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_errors.2414130951 |
|
|
Aug 25 10:40:29 AM UTC 24 |
Aug 25 10:40:46 AM UTC 24 |
986140780 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/40.lc_ctrl_state_failure.2017824625 |
|
|
Aug 25 10:39:58 AM UTC 24 |
Aug 25 10:40:47 AM UTC 24 |
475043925 ps |
| T187 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all_with_rand_reset.1863335355 |
|
|
Aug 25 10:38:28 AM UTC 24 |
Aug 25 10:40:47 AM UTC 24 |
5078330058 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_jtag_access.551132481 |
|
|
Aug 25 10:40:21 AM UTC 24 |
Aug 25 10:40:50 AM UTC 24 |
5577435100 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_token_mux.768958850 |
|
|
Aug 25 10:40:32 AM UTC 24 |
Aug 25 10:40:50 AM UTC 24 |
1273569750 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_alert_test.3368892369 |
|
|
Aug 25 10:40:49 AM UTC 24 |
Aug 25 10:40:51 AM UTC 24 |
15712826 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_jtag_access.1583770766 |
|
|
Aug 25 10:40:42 AM UTC 24 |
Aug 25 10:40:52 AM UTC 24 |
228086940 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_security_escalation.1207669132 |
|
|
Aug 25 10:40:31 AM UTC 24 |
Aug 25 10:40:52 AM UTC 24 |
988635465 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_sec_mubi.396188112 |
|
|
Aug 25 10:40:32 AM UTC 24 |
Aug 25 10:40:53 AM UTC 24 |
806737008 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_smoke.3517976112 |
|
|
Aug 25 10:40:49 AM UTC 24 |
Aug 25 10:40:54 AM UTC 24 |
46899964 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_volatile_unlock_smoke.540522943 |
|
|
Aug 25 10:40:51 AM UTC 24 |
Aug 25 10:40:54 AM UTC 24 |
11485676 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_security_escalation.788589658 |
|
|
Aug 25 10:40:40 AM UTC 24 |
Aug 25 10:40:54 AM UTC 24 |
772220323 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_mux.40942109 |
|
|
Aug 25 10:40:42 AM UTC 24 |
Aug 25 10:40:58 AM UTC 24 |
376077371 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_jtag_access.1825624681 |
|
|
Aug 25 10:40:55 AM UTC 24 |
Aug 25 10:40:58 AM UTC 24 |
640440608 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/37.lc_ctrl_stress_all_with_rand_reset.3327252327 |
|
|
Aug 25 10:39:34 AM UTC 24 |
Aug 25 10:40:58 AM UTC 24 |
6823652459 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_errors.2104624965 |
|
|
Aug 25 10:40:40 AM UTC 24 |
Aug 25 10:40:59 AM UTC 24 |
2270210927 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_alert_test.3559715375 |
|
|
Aug 25 10:40:57 AM UTC 24 |
Aug 25 10:41:00 AM UTC 24 |
43195031 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_token_digest.2312283036 |
|
|
Aug 25 10:40:44 AM UTC 24 |
Aug 25 10:41:02 AM UTC 24 |
421193433 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_volatile_unlock_smoke.393637999 |
|
|
Aug 25 10:41:00 AM UTC 24 |
Aug 25 10:41:03 AM UTC 24 |
14890747 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_errors.1294093195 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:41:04 AM UTC 24 |
1079146761 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_sec_mubi.3940802861 |
|
|
Aug 25 10:40:42 AM UTC 24 |
Aug 25 10:41:04 AM UTC 24 |
649880404 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_jtag_access.626580470 |
|
|
Aug 25 10:40:31 AM UTC 24 |
Aug 25 10:41:04 AM UTC 24 |
3834689558 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_state_post_trans.2708083761 |
|
|
Aug 25 10:40:52 AM UTC 24 |
Aug 25 10:41:05 AM UTC 24 |
336847641 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_prog_failure.344649119 |
|
|
Aug 25 10:41:00 AM UTC 24 |
Aug 25 10:41:06 AM UTC 24 |
475133582 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/32.lc_ctrl_stress_all.48640401 |
|
|
Aug 25 10:38:37 AM UTC 24 |
Aug 25 10:41:07 AM UTC 24 |
8889035045 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_token_mux.1320666813 |
|
|
Aug 25 10:40:55 AM UTC 24 |
Aug 25 10:41:08 AM UTC 24 |
4097130028 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_alert_test.2890351954 |
|
|
Aug 25 10:41:07 AM UTC 24 |
Aug 25 10:41:09 AM UTC 24 |
19398310 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_state_post_trans.3167866657 |
|
|
Aug 25 10:41:00 AM UTC 24 |
Aug 25 10:41:11 AM UTC 24 |
55553029 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_smoke.1026837914 |
|
|
Aug 25 10:41:08 AM UTC 24 |
Aug 25 10:41:12 AM UTC 24 |
13106031 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/41.lc_ctrl_state_failure.2416236101 |
|
|
Aug 25 10:40:07 AM UTC 24 |
Aug 25 10:41:12 AM UTC 24 |
1056095540 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/42.lc_ctrl_state_failure.3317467605 |
|
|
Aug 25 10:40:19 AM UTC 24 |
Aug 25 10:41:12 AM UTC 24 |
210838870 ps |
| T55 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_volatile_unlock_smoke.3039230149 |
|
|
Aug 25 10:41:10 AM UTC 24 |
Aug 25 10:41:12 AM UTC 24 |
10919133 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/43.lc_ctrl_state_failure.2875853973 |
|
|
Aug 25 10:40:27 AM UTC 24 |
Aug 25 10:41:13 AM UTC 24 |
535883307 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_smoke.2581329170 |
|
|
Aug 25 10:40:58 AM UTC 24 |
Aug 25 10:41:13 AM UTC 24 |
158585872 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_security_escalation.1553307253 |
|
|
Aug 25 10:40:55 AM UTC 24 |
Aug 25 10:41:13 AM UTC 24 |
442310164 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/44.lc_ctrl_state_failure.1997543233 |
|
|
Aug 25 10:40:36 AM UTC 24 |
Aug 25 10:41:14 AM UTC 24 |
406107433 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_errors.1545681985 |
|
|
Aug 25 10:40:55 AM UTC 24 |
Aug 25 10:41:14 AM UTC 24 |
1972116566 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/26.lc_ctrl_stress_all.1943418934 |
|
|
Aug 25 10:37:34 AM UTC 24 |
Aug 25 10:41:15 AM UTC 24 |
4387588781 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/45.lc_ctrl_sec_mubi.2295287937 |
|
|
Aug 25 10:40:55 AM UTC 24 |
Aug 25 10:41:15 AM UTC 24 |
1204404156 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_prog_failure.129557132 |
|
|
Aug 25 10:41:12 AM UTC 24 |
Aug 25 10:41:16 AM UTC 24 |
24320347 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_state_post_trans.1755142817 |
|
|
Aug 25 10:41:12 AM UTC 24 |
Aug 25 10:41:18 AM UTC 24 |
187151986 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/31.lc_ctrl_stress_all.727088311 |
|
|
Aug 25 10:38:28 AM UTC 24 |
Aug 25 10:41:18 AM UTC 24 |
3811478885 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_mux.2407598811 |
|
|
Aug 25 10:41:05 AM UTC 24 |
Aug 25 10:41:19 AM UTC 24 |
475406284 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/47.lc_ctrl_alert_test.1028232457 |
|
|
Aug 25 10:41:18 AM UTC 24 |
Aug 25 10:41:20 AM UTC 24 |
48784097 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/46.lc_ctrl_sec_token_digest.4233713893 |
|
|
Aug 25 10:41:07 AM UTC 24 |
Aug 25 10:41:20 AM UTC 24 |
3445640683 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_24/lc_ctrl_volatile_unlock_enabled-sim-vcs/coverage/default/48.lc_ctrl_volatile_unlock_smoke.1610567888 |
|
|
Aug 25 10:41:18 AM UTC 24 |
Aug 25 10:41:20 AM UTC 24 |
18536921 ps |