3df77bec1| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | otbn_smoke | 11.000s | 31.271us | 1 | 1 | 100.00 |
| V1 | single_binary | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V1 | csr_hw_reset | otbn_csr_hw_reset | 7.000s | 157.635us | 5 | 5 | 100.00 |
| V1 | csr_rw | otbn_csr_rw | 5.000s | 66.487us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | otbn_csr_bit_bash | 11.000s | 95.541us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | otbn_csr_aliasing | 8.000s | 33.475us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 10.000s | 38.824us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 5.000s | 66.487us | 20 | 20 | 100.00 |
| otbn_csr_aliasing | 8.000s | 33.475us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | otbn_mem_walk | 47.000s | 18.953ms | 5 | 5 | 100.00 |
| V1 | mem_partial_access | otbn_mem_partial_access | 15.000s | 83.922us | 5 | 5 | 100.00 |
| V1 | TOTAL | 155 | 166 | 93.37 | |||
| V2 | reset_recovery | otbn_reset | 40.000s | 379.280us | 9 | 10 | 90.00 |
| V2 | multi_error | otbn_multi_err | 44.000s | 940.682us | 1 | 1 | 100.00 |
| V2 | back_to_back | otbn_multi | 5.067m | 1.375ms | 8 | 10 | 80.00 |
| V2 | stress_all | otbn_stress_all | 1.350m | 984.017us | 9 | 10 | 90.00 |
| V2 | lc_escalation | otbn_escalate | 17.000s | 163.300us | 45 | 60 | 75.00 |
| V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 7.000s | 135.923us | 5 | 5 | 100.00 |
| V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 19.000s | 71.265us | 9 | 10 | 90.00 |
| V2 | alert_test | otbn_alert_test | 7.000s | 27.983us | 50 | 50 | 100.00 |
| V2 | intr_test | otbn_intr_test | 9.000s | 36.656us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | otbn_tl_errors | 11.000s | 58.190us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | otbn_tl_errors | 11.000s | 58.190us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 7.000s | 157.635us | 5 | 5 | 100.00 |
| otbn_csr_rw | 5.000s | 66.487us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 8.000s | 33.475us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 6.000s | 24.675us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | otbn_csr_hw_reset | 7.000s | 157.635us | 5 | 5 | 100.00 |
| otbn_csr_rw | 5.000s | 66.487us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 8.000s | 33.475us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 6.000s | 24.675us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 226 | 246 | 91.87 | |||
| V2S | mem_integrity | otbn_imem_err | 13.000s | 36.600us | 10 | 10 | 100.00 |
| otbn_dmem_err | 12.000s | 69.582us | 15 | 15 | 100.00 | ||
| V2S | internal_integrity | otbn_alu_bignum_mod_err | 8.000s | 111.010us | 5 | 5 | 100.00 |
| otbn_controller_ispr_rdata_err | 9.000s | 114.576us | 5 | 5 | 100.00 | ||
| otbn_mac_bignum_acc_err | 9.000s | 21.144us | 4 | 5 | 80.00 | ||
| otbn_urnd_err | 5.000s | 41.898us | 2 | 2 | 100.00 | ||
| V2S | illegal_bus_access | otbn_illegal_mem_acc | 8.000s | 14.566us | 5 | 5 | 100.00 |
| V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 6.000s | 18.163us | 2 | 2 | 100.00 |
| V2S | tl_intg_err | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| otbn_tl_intg_err | 25.000s | 273.446us | 20 | 20 | 100.00 | ||
| V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 36.000s | 230.614us | 20 | 20 | 100.00 |
| V2S | prim_fsm_check | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | prim_count_check | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_mem_scramble | otbn_smoke | 11.000s | 31.271us | 1 | 1 | 100.00 |
| V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 12.000s | 69.582us | 15 | 15 | 100.00 |
| V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 13.000s | 36.600us | 10 | 10 | 100.00 |
| V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 25.000s | 273.446us | 20 | 20 | 100.00 |
| V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 17.000s | 163.300us | 45 | 60 | 75.00 |
| V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 13.000s | 36.600us | 10 | 10 | 100.00 |
| otbn_dmem_err | 12.000s | 69.582us | 15 | 15 | 100.00 | ||
| otbn_zero_state_err_urnd | 7.000s | 135.923us | 5 | 5 | 100.00 | ||
| otbn_illegal_mem_acc | 8.000s | 14.566us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_scramble_key_sideload | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 13.000s | 36.600us | 10 | 10 | 100.00 |
| otbn_dmem_err | 12.000s | 69.582us | 15 | 15 | 100.00 | ||
| otbn_zero_state_err_urnd | 7.000s | 135.923us | 5 | 5 | 100.00 | ||
| otbn_illegal_mem_acc | 8.000s | 14.566us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 17.000s | 163.300us | 45 | 60 | 75.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 13.000s | 36.600us | 10 | 10 | 100.00 |
| otbn_dmem_err | 12.000s | 69.582us | 15 | 15 | 100.00 | ||
| otbn_zero_state_err_urnd | 7.000s | 135.923us | 5 | 5 | 100.00 | ||
| otbn_illegal_mem_acc | 8.000s | 14.566us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_data_reg_sw_sca | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 9.000s | 25.727us | 11 | 12 | 91.67 |
| V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 8.000s | 27.174us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 58.000s | 330.130us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 58.000s | 330.130us | 5 | 5 | 100.00 |
| V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 10.000s | 45.860us | 6 | 10 | 60.00 |
| V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 11.000s | 37.287us | 9 | 10 | 90.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 40.000s | 10.004ms | 4 | 5 | 80.00 |
| V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 40.000s | 10.004ms | 4 | 5 | 80.00 |
| V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 10.000s | 16.000us | 7 | 7 | 100.00 |
| V2S | sec_cm_data_mem_sec_wipe | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_write_mem_integrity | otbn_multi | 5.067m | 1.375ms | 8 | 10 | 80.00 |
| V2S | sec_cm_ctrl_flow_count | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_ctrl_flow_sca | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 10.000s | 220.114us | 5 | 5 | 100.00 |
| V2S | sec_cm_key_sideload | otbn_single | 1.950m | 499.881us | 89 | 100 | 89.00 |
| V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 4.633m | 1.316ms | 4 | 5 | 80.00 |
| V2S | TOTAL | 144 | 153 | 94.12 | |||
| V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 12.067m | 58.075ms | 7 | 10 | 70.00 |
| V3 | TOTAL | 7 | 10 | 70.00 | |||
| TOTAL | 532 | 575 | 92.52 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 9 | 9 | 8 | 88.89 |
| V2 | 11 | 11 | 6 | 54.55 |
| V2S | 19 | 19 | 13 | 68.42 |
| V3 | 1 | 1 | 0 | 0.00 |
| Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
|---|---|---|---|---|---|---|---|---|
| 98.76 | 99.50 | 94.11 | 99.62 | 91.05 | 93.39 | 97.44 | 91.28 | 99.16 |
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed has 9 failures:
6.otbn_rf_base_intg_err.4158153326
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 174482956 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 174482956 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 174482956 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 174482956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
7.otbn_rf_base_intg_err.3139935964
Line 244, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_rf_base_intg_err/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 52424284 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 52424284 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 52424284 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 52424284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
25.otbn_escalate.2404534694
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/25.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 3257971 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 3257971 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 3257971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
50.otbn_escalate.1989918666
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/50.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 15205063 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 15205063 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 15205063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 6 failures:
6.otbn_single.4012224334
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_single/latest/run.log
UVM_FATAL @ 44171390 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 44171390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
15.otbn_single.1041121501
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/15.otbn_single/latest/run.log
UVM_FATAL @ 18681264 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 18681264 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
8.otbn_stress_all.3576454581
Line 278, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all/latest/run.log
UVM_FATAL @ 31873457 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 31873457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. has 4 failures:
14.otbn_escalate.3975522989
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/14.otbn_escalate/latest/run.log
UVM_FATAL @ 23454233 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 23454233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
17.otbn_escalate.3432179946
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/17.otbn_escalate/latest/run.log
UVM_FATAL @ 11477372 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 11477372 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 4 failures:
16.otbn_single.160649266
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/16.otbn_single/latest/run.log
UVM_FATAL @ 14960918 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 14960918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
54.otbn_single.1252300054
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/54.otbn_single/latest/run.log
UVM_FATAL @ 22359501 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 22359501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:
Test otbn_stress_all_with_rand_reset has 1 failures.
8.otbn_stress_all_with_rand_reset.1558920924
Line 411, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 862105756 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 862105756 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 2 failures.
28.otbn_single.1233065990
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/28.otbn_single/latest/run.log
UVM_FATAL @ 19666323 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 19666323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
60.otbn_single.2262705516
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/60.otbn_single/latest/run.log
UVM_FATAL @ 163592701 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 163592701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 2 failures:
0.otbn_multi.1224301755
Line 280, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_multi/latest/run.log
UVM_FATAL @ 59058273 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 59058273 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.otbn_multi.3672919993
Line 277, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_multi/latest/run.log
UVM_FATAL @ 235053668 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 235053668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 2 failures:
Test otbn_sw_errs_fatal_chk has 1 failures.
1.otbn_sw_errs_fatal_chk.2627038499
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_sw_errs_fatal_chk/latest/run.log
UVM_FATAL @ 71264930 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 71264930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_sec_cm has 1 failures.
3.otbn_sec_cm.1870442451
Line 224, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_sec_cm/latest/run.log
UVM_FATAL @ 8316061 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 8316061 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 2 failures:
38.otbn_escalate.2680351852
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/38.otbn_escalate/latest/run.log
UVM_FATAL @ 27748373 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 27748373 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
41.otbn_escalate.2114476200
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/41.otbn_escalate/latest/run.log
UVM_FATAL @ 24631652 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 24631652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_mac_bignum_acc_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
0.otbn_mac_bignum_acc_err.3946133615
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_mac_bignum_acc_err/latest/run.log
UVM_FATAL @ 20957800 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_mac_bignum_acc_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 20957800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_stack_addr_integ_chk_vseq.sv:58) [otbn_stack_addr_integ_chk_vseq] timeout occurred! has 1 failures:
1.otbn_stack_addr_integ_chk.3750313102
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stack_addr_integ_chk/latest/run.log
UVM_FATAL @ 10004066493 ps: (otbn_stack_addr_integ_chk_vseq.sv:58) [uvm_test_top.env.virtual_sequencer.otbn_stack_addr_integ_chk_vseq] timeout occurred!
UVM_INFO @ 10004066493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
2.otbn_stress_all_with_rand_reset.3268728261
Line 284, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 79294945 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 79294945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_reset_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
3.otbn_reset.1427064727
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_reset/latest/run.log
UVM_FATAL @ 10027460 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_reset_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 10027460 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_rf_bignum_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
3.otbn_rf_bignum_intg_err.3948500480
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_rf_bignum_intg_err/latest/run.log
UVM_FATAL @ 16475958 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_rf_bignum_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 16475958 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
6.otbn_stress_all_with_rand_reset.3246059433
Line 354, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 3505705893 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 3505705893 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_*/rtl/otbn_core.sv,943): Assertion OnlyWriteLoadDataBignumWhenDMemValid_A has failed has 1 failures:
9.otbn_ctrl_redun.2705128978
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_ctrl_redun/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,943): (time 14699631 PS) Assertion tb.dut.u_otbn_core.OnlyWriteLoadDataBignumWhenDMemValid_A has failed
UVM_ERROR @ 14699631 ps: (otbn_core.sv:943) [ASSERT FAILED] OnlyWriteLoadDataBignumWhenDMemValid_A
UVM_INFO @ 14699631 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
24.otbn_escalate.297812238
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/24.otbn_escalate/latest/run.log
UVM_FATAL @ 15606533 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 15606533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == *) Failed to update CRC has 1 failures:
34.otbn_escalate.3823507261
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/34.otbn_escalate/latest/run.log
UVM_FATAL @ 4146814 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
UVM_INFO @ 4146814 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed has 1 failures:
42.otbn_escalate.2742308858
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/42.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 31212331 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 31212331 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 31212331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed has 1 failures:
55.otbn_escalate.3912884920
Line 263, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/55.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 2639425 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 2639425 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 2639425 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---