f8b3c19a2| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | otbn_smoke | 9.000s | 252.909us | 1 | 1 | 100.00 |
| V1 | single_binary | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V1 | csr_hw_reset | otbn_csr_hw_reset | 5.000s | 44.243us | 5 | 5 | 100.00 |
| V1 | csr_rw | otbn_csr_rw | 6.000s | 10.331us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | otbn_csr_bit_bash | 9.000s | 359.794us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | otbn_csr_aliasing | 6.000s | 17.991us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 10.000s | 96.339us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 6.000s | 10.331us | 20 | 20 | 100.00 |
| otbn_csr_aliasing | 6.000s | 17.991us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | otbn_mem_walk | 37.000s | 14.152ms | 5 | 5 | 100.00 |
| V1 | mem_partial_access | otbn_mem_partial_access | 14.000s | 163.907us | 5 | 5 | 100.00 |
| V1 | TOTAL | 159 | 166 | 95.78 | |||
| V2 | reset_recovery | otbn_reset | 51.000s | 257.852us | 10 | 10 | 100.00 |
| V2 | multi_error | otbn_multi_err | 1.250m | 218.532us | 1 | 1 | 100.00 |
| V2 | back_to_back | otbn_multi | 1.117m | 207.066us | 7 | 10 | 70.00 |
| V2 | stress_all | otbn_stress_all | 1.133m | 172.737us | 5 | 10 | 50.00 |
| V2 | lc_escalation | otbn_escalate | 15.000s | 44.694us | 51 | 60 | 85.00 |
| V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 8.000s | 29.930us | 4 | 5 | 80.00 |
| V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 15.000s | 702.928us | 9 | 10 | 90.00 |
| V2 | alert_test | otbn_alert_test | 8.000s | 28.289us | 50 | 50 | 100.00 |
| V2 | intr_test | otbn_intr_test | 8.000s | 19.371us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | otbn_tl_errors | 10.000s | 126.766us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | otbn_tl_errors | 10.000s | 126.766us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 5.000s | 44.243us | 5 | 5 | 100.00 |
| otbn_csr_rw | 6.000s | 10.331us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 6.000s | 17.991us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 8.000s | 14.123us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | otbn_csr_hw_reset | 5.000s | 44.243us | 5 | 5 | 100.00 |
| otbn_csr_rw | 6.000s | 10.331us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 6.000s | 17.991us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 8.000s | 14.123us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 227 | 246 | 92.28 | |||
| V2S | mem_integrity | otbn_imem_err | 10.000s | 23.701us | 9 | 10 | 90.00 |
| otbn_dmem_err | 11.000s | 31.210us | 14 | 15 | 93.33 | ||
| V2S | internal_integrity | otbn_alu_bignum_mod_err | 11.000s | 66.851us | 5 | 5 | 100.00 |
| otbn_controller_ispr_rdata_err | 8.000s | 22.284us | 4 | 5 | 80.00 | ||
| otbn_mac_bignum_acc_err | 19.000s | 314.473us | 5 | 5 | 100.00 | ||
| otbn_urnd_err | 6.000s | 16.758us | 2 | 2 | 100.00 | ||
| V2S | illegal_bus_access | otbn_illegal_mem_acc | 8.000s | 20.413us | 5 | 5 | 100.00 |
| V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 7.000s | 14.657us | 2 | 2 | 100.00 |
| V2S | tl_intg_err | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| otbn_tl_intg_err | 24.000s | 202.706us | 20 | 20 | 100.00 | ||
| V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 40.000s | 271.667us | 20 | 20 | 100.00 |
| V2S | prim_fsm_check | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | prim_count_check | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_mem_scramble | otbn_smoke | 9.000s | 252.909us | 1 | 1 | 100.00 |
| V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 11.000s | 31.210us | 14 | 15 | 93.33 |
| V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 10.000s | 23.701us | 9 | 10 | 90.00 |
| V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 24.000s | 202.706us | 20 | 20 | 100.00 |
| V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 15.000s | 44.694us | 51 | 60 | 85.00 |
| V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 10.000s | 23.701us | 9 | 10 | 90.00 |
| otbn_dmem_err | 11.000s | 31.210us | 14 | 15 | 93.33 | ||
| otbn_zero_state_err_urnd | 8.000s | 29.930us | 4 | 5 | 80.00 | ||
| otbn_illegal_mem_acc | 8.000s | 20.413us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 | ||
| V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_scramble_key_sideload | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 10.000s | 23.701us | 9 | 10 | 90.00 |
| otbn_dmem_err | 11.000s | 31.210us | 14 | 15 | 93.33 | ||
| otbn_zero_state_err_urnd | 8.000s | 29.930us | 4 | 5 | 80.00 | ||
| otbn_illegal_mem_acc | 8.000s | 20.413us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 | ||
| V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 15.000s | 44.694us | 51 | 60 | 85.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 10.000s | 23.701us | 9 | 10 | 90.00 |
| otbn_dmem_err | 11.000s | 31.210us | 14 | 15 | 93.33 | ||
| otbn_zero_state_err_urnd | 8.000s | 29.930us | 4 | 5 | 80.00 | ||
| otbn_illegal_mem_acc | 8.000s | 20.413us | 5 | 5 | 100.00 | ||
| otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 | ||
| V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_data_reg_sw_sca | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 9.000s | 103.263us | 12 | 12 | 100.00 |
| V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 7.000s | 12.128us | 4 | 5 | 80.00 |
| V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 58.000s | 251.006us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 58.000s | 251.006us | 5 | 5 | 100.00 |
| V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 16.000s | 46.234us | 8 | 10 | 80.00 |
| V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 9.000s | 61.232us | 9 | 10 | 90.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 36.000s | 10.003ms | 3 | 5 | 60.00 |
| V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 36.000s | 10.003ms | 3 | 5 | 60.00 |
| V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 9.000s | 56.816us | 7 | 7 | 100.00 |
| V2S | sec_cm_data_mem_sec_wipe | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_write_mem_integrity | otbn_multi | 1.117m | 207.066us | 7 | 10 | 70.00 |
| V2S | sec_cm_ctrl_flow_count | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_ctrl_flow_sca | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 19.000s | 251.943us | 5 | 5 | 100.00 |
| V2S | sec_cm_key_sideload | otbn_single | 30.000s | 140.275us | 93 | 100 | 93.00 |
| V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 4.800m | 4.592ms | 3 | 5 | 60.00 |
| V2S | TOTAL | 142 | 153 | 92.81 | |||
| V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 21.933m | 279.671ms | 5 | 10 | 50.00 |
| V3 | TOTAL | 5 | 10 | 50.00 | |||
| TOTAL | 533 | 575 | 92.70 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 9 | 9 | 8 | 88.89 |
| V2 | 11 | 11 | 6 | 54.55 |
| V2S | 19 | 19 | 11 | 57.89 |
| V3 | 1 | 1 | 0 | 0.00 |
| Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
|---|---|---|---|---|---|---|---|---|
| 98.74 | 99.52 | 94.33 | 99.62 | 90.99 | 93.07 | 94.87 | 91.17 | 99.16 |
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 7 failures:
Test otbn_stress_all has 1 failures.
3.otbn_stress_all.474236630
Line 288, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all/latest/run.log
UVM_FATAL @ 111982031 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 111982031 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stress_all_with_rand_reset has 1 failures.
8.otbn_stress_all_with_rand_reset.3516989167
Line 321, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 1052108599 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 1052108599 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 5 failures.
11.otbn_single.3238071942
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/11.otbn_single/latest/run.log
UVM_FATAL @ 147208659 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 147208659 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
21.otbn_single.3597901442
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/21.otbn_single/latest/run.log
UVM_FATAL @ 18725045 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 18725045 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed has 5 failures:
Test otbn_zero_state_err_urnd has 1 failures.
3.otbn_zero_state_err_urnd.1003044685
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_zero_state_err_urnd/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 15498062 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 15498062 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 15498062 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stack_addr_integ_chk has 1 failures.
3.otbn_stack_addr_integ_chk.780842411
Line 247, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stack_addr_integ_chk/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 25961871 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 25961871 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 25961871 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 25961871 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 3 failures.
16.otbn_escalate.3054975160
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/16.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 37061435 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 37061435 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 37061435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
18.otbn_escalate.3921551363
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/18.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 62324611 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 62324611 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 62324611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 4 failures:
Test otbn_stress_all_with_rand_reset has 2 failures.
0.otbn_stress_all_with_rand_reset.4275912750
Line 281, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 19171414 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 19171414 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.otbn_stress_all_with_rand_reset.4161595499
Line 279, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 11017089 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11017089 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stress_all has 1 failures.
1.otbn_stress_all.59663256
Line 279, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stress_all/latest/run.log
UVM_FATAL @ 11913617 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11913617 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_dmem_err has 1 failures.
6.otbn_dmem_err.2636572905
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_dmem_err/latest/run.log
UVM_FATAL @ 16030650 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 16030650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed has 4 failures:
10.otbn_escalate.2850777421
Line 262, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/10.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 1458110 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 1458110 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 1458110 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
14.otbn_escalate.3416841086
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/14.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 790132 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 790132 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 790132 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:
0.otbn_multi.3937213073
Line 286, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_multi/latest/run.log
UVM_FATAL @ 1197057827 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 1197057827 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.otbn_multi.3774630965
Line 277, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_multi/latest/run.log
UVM_FATAL @ 17619769 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 17619769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:
Test otbn_stress_all_with_rand_reset has 1 failures.
3.otbn_stress_all_with_rand_reset.3286286488
Line 335, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 693885584 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 693885584 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_single has 2 failures.
26.otbn_single.1846814135
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/26.otbn_single/latest/run.log
UVM_FATAL @ 22156435 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 22156435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
98.otbn_single.3840078138
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/98.otbn_single/latest/run.log
UVM_FATAL @ 114091409 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 114091409 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed has 3 failures:
Test otbn_stress_all has 1 failures.
4.otbn_stress_all.3599574953
Line 278, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_stress_all/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 22164466 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 22164466 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 22164466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 2 failures.
48.otbn_escalate.2137002591
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/48.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 16693311 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 16693311 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 16693311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
56.otbn_escalate.2073947977
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/56.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 7365591 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 7365591 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 7365591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 2 failures:
1.otbn_sec_cm.2944967630
Line 232, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_sec_cm/latest/run.log
UVM_FATAL @ 21640107 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 21640107 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.otbn_sec_cm.4281200881
Line 219, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_sec_cm/latest/run.log
UVM_FATAL @ 7178322 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 7178322 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 2 failures:
8.otbn_rf_base_intg_err.3813176685
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 21813323 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 21813323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
9.otbn_rf_base_intg_err.4132581188
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 14511151 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 14511151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_stack_addr_integ_chk_vseq.sv:58) [otbn_stack_addr_integ_chk_vseq] timeout occurred! has 1 failures:
0.otbn_stack_addr_integ_chk.2421676639
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_stack_addr_integ_chk/latest/run.log
UVM_FATAL @ 10003468034 ps: (otbn_stack_addr_integ_chk_vseq.sv:58) [uvm_test_top.env.virtual_sequencer.otbn_stack_addr_integ_chk_vseq] timeout occurred!
UVM_INFO @ 10003468034 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
1.otbn_controller_ispr_rdata_err.1515728042
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_controller_ispr_rdata_err/latest/run.log
UVM_FATAL @ 8183546 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 8183546 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_pc_ctrl_flow_redun_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
4.otbn_pc_ctrl_flow_redun.1383572360
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_pc_ctrl_flow_redun/latest/run.log
UVM_FATAL @ 19141037 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_pc_ctrl_flow_redun_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 19141037 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
5.otbn_stress_all.2517261315
Line 282, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_stress_all/latest/run.log
UVM_FATAL @ 71985325 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 71985325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
6.otbn_imem_err.27546299
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_imem_err/latest/run.log
UVM_FATAL @ 15334882 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 15334882 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
7.otbn_stress_all_with_rand_reset.2088793755
Line 371, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 34123511652 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 34123511652 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
8.otbn_stress_all.955944320
Line 287, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all/latest/run.log
UVM_FATAL @ 69734810 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 69734810 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_rf_bignum_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
9.otbn_rf_bignum_intg_err.1280026687
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_rf_bignum_intg_err/latest/run.log
UVM_FATAL @ 4631358 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_rf_bignum_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 4631358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
9.otbn_sw_errs_fatal_chk.3962243534
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_sw_errs_fatal_chk/latest/run.log
UVM_FATAL @ 56148358 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 56148358 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---