Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_core_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_otp_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7392353	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

7232931

1

T1

715

T2

1666

T3

1579

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8536755	1			T1	4047		T2	3320		T3	9163
values[0x0]	2311532	1			T1	99		T2	174		T3	455
values[0x1]	3776997	1			T1	93		T2	186		T3	480

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4790001	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9835283

1

T1

1819

T2

2099

T3

4181

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	51333	1			T8	6		T9	8		T11	26
valid_sources[0x01]	53678	1			T8	4		T9	10		T11	16
valid_sources[0x02]	53963	1			T8	5		T11	25		T12	21
valid_sources[0x03]	50819	1			T8	4		T9	2		T11	15
valid_sources[0x04]	72824	1			T4	69		T8	2		T11	23
valid_sources[0x05]	55606	1			T4	234		T8	1		T11	18
valid_sources[0x06]	54442	1			T4	29		T8	10		T9	1
valid_sources[0x07]	52905	1			T8	1		T11	25		T12	12
valid_sources[0x08]	52080	1			T8	5		T9	3		T11	19
valid_sources[0x09]	76468	1			T8	5		T11	10		T12	13
valid_sources[0x0a]	51744	1			T8	3		T11	24		T12	12
valid_sources[0x0b]	52762	1			T8	4		T11	19		T12	20
valid_sources[0x0c]	51016	1			T4	45		T9	3		T11	28
valid_sources[0x0d]	50293	1			T8	10		T9	3		T11	19
valid_sources[0x0e]	54242	1			T4	58		T8	1		T11	21
valid_sources[0x0f]	52783	1			T9	7		T11	17		T12	20
valid_sources[0x10]	57623	1			T4	98		T8	2		T9	5
valid_sources[0x11]	48357	1			T8	2		T11	29		T12	9
valid_sources[0x12]	64654	1			T8	6		T9	6		T11	26
valid_sources[0x13]	51466	1			T8	5		T11	18		T12	15
valid_sources[0x14]	53204	1			T8	4		T11	24		T12	19
valid_sources[0x15]	49429	1			T4	139		T8	5		T11	16
valid_sources[0x16]	50174	1			T8	6		T11	27		T12	16
valid_sources[0x17]	53344	1			T8	8		T9	4		T11	24
valid_sources[0x18]	53047	1			T11	19		T12	18		T44	9
valid_sources[0x19]	55577	1			T8	3		T11	17		T12	11
valid_sources[0x1a]	49495	1			T8	14		T9	2		T11	21
valid_sources[0x1b]	51960	1			T4	116		T8	2		T11	23
valid_sources[0x1c]	52405	1			T8	1		T9	6		T11	18
valid_sources[0x1d]	64731	1			T9	5		T10	11006		T11	23
valid_sources[0x1e]	53628	1			T8	4		T9	2		T11	16
valid_sources[0x1f]	75401	1			T8	3		T9	3		T11	14
valid_sources[0x20]	57532	1			T4	31		T8	6		T9	6
valid_sources[0x21]	49979	1			T8	7		T9	3		T11	25
valid_sources[0x22]	54951	1			T4	256		T8	4		T9	3
valid_sources[0x23]	60392	1			T8	8		T9	6		T11	18
valid_sources[0x24]	51532	1			T8	2		T11	24		T12	16
valid_sources[0x25]	55594	1			T8	2		T11	26		T12	20
valid_sources[0x26]	54238	1			T4	137		T8	6		T11	30
valid_sources[0x27]	49967	1			T4	196		T9	9		T11	15
valid_sources[0x28]	61097	1			T8	5		T11	21		T12	16
valid_sources[0x29]	52213	1			T8	3		T11	22		T12	13
valid_sources[0x2a]	88441	1			T4	84		T8	1		T9	1
valid_sources[0x2b]	77623	1			T8	3		T9	1		T11	24
valid_sources[0x2c]	67464	1			T8	1		T9	7		T11	21
valid_sources[0x2d]	51353	1			T8	5		T11	29		T12	9
valid_sources[0x2e]	54217	1			T8	10		T9	1		T11	19
valid_sources[0x2f]	54117	1			T8	5		T9	3		T11	21
valid_sources[0x30]	59765	1			T8	3		T9	1		T11	23
valid_sources[0x31]	57483	1			T4	65		T8	4		T9	4
valid_sources[0x32]	56205	1			T8	1		T11	17		T12	17
valid_sources[0x33]	57055	1			T4	45		T11	29		T12	11
valid_sources[0x34]	69117	1			T8	7		T11	18		T12	21
valid_sources[0x35]	54219	1			T4	107		T11	19		T12	19
valid_sources[0x36]	53476	1			T8	5		T11	18		T12	14
valid_sources[0x37]	51610	1			T8	4		T11	24		T12	16
valid_sources[0x38]	67505	1			T4	107		T8	9		T11	28
valid_sources[0x39]	54491	1			T4	26		T8	12		T9	9
valid_sources[0x3a]	52217	1			T8	9		T9	2		T11	20
valid_sources[0x3b]	121555	1			T1	4239		T8	4		T9	8
valid_sources[0x3c]	53134	1			T8	9		T9	7		T11	17
valid_sources[0x3d]	51780	1			T11	17		T12	15		T13	9
valid_sources[0x3e]	54626	1			T9	9		T11	24		T12	21
valid_sources[0x3f]	52569	1			T9	9		T11	12		T12	13
valid_sources[0x40]	55860	1			T4	70		T8	3		T11	16
valid_sources[0x41]	50178	1			T4	115		T8	3		T9	3
valid_sources[0x42]	52582	1			T8	1		T9	4		T11	18
valid_sources[0x43]	56816	1			T4	86		T8	2		T11	20
valid_sources[0x44]	56585	1			T8	2		T11	15		T12	10
valid_sources[0x45]	71036	1			T8	9		T9	2		T11	17
valid_sources[0x46]	54569	1			T8	3		T11	18		T12	20
valid_sources[0x47]	56243	1			T4	7		T8	1		T9	3
valid_sources[0x48]	60592	1			T8	7		T9	1		T11	21
valid_sources[0x49]	55003	1			T8	4		T11	16		T12	11
valid_sources[0x4a]	53350	1			T8	8		T11	17		T12	16
valid_sources[0x4b]	50749	1			T4	406		T8	6		T9	4
valid_sources[0x4c]	58752	1			T8	1		T9	1		T11	22
valid_sources[0x4d]	51439	1			T8	2		T9	1		T11	21
valid_sources[0x4e]	55751	1			T8	3		T9	1		T11	14
valid_sources[0x4f]	68731	1			T3	10098		T4	12		T8	5
valid_sources[0x50]	65963	1			T8	5		T11	16		T12	16
valid_sources[0x51]	52674	1			T8	10		T9	5		T11	14
valid_sources[0x52]	51770	1			T11	21		T12	11		T13	14
valid_sources[0x53]	57423	1			T4	108		T8	2		T9	3
valid_sources[0x54]	53756	1			T4	8		T8	1		T9	11
valid_sources[0x55]	55252	1			T11	22		T12	25		T44	14
valid_sources[0x56]	63734	1			T8	6		T11	18		T12	17
valid_sources[0x57]	53473	1			T8	4		T11	12		T12	14
valid_sources[0x58]	53548	1			T4	189		T8	5		T9	2
valid_sources[0x59]	51056	1			T4	24		T8	10		T11	19
valid_sources[0x5a]	60625	1			T4	217		T8	1		T9	5
valid_sources[0x5b]	65692	1			T8	5		T9	6		T11	26
valid_sources[0x5c]	50365	1			T8	5		T11	21		T12	18
valid_sources[0x5d]	62398	1			T4	44		T8	4		T9	7
valid_sources[0x5e]	57408	1			T4	112		T8	3		T11	17
valid_sources[0x5f]	61688	1			T8	1		T11	18		T12	13
valid_sources[0x60]	52129	1			T8	3		T9	5		T11	23
valid_sources[0x61]	52518	1			T4	155		T11	13		T12	16
valid_sources[0x62]	50705	1			T8	9		T9	5		T11	21
valid_sources[0x63]	53402	1			T8	5		T11	13		T12	14
valid_sources[0x64]	60144	1			T4	567		T8	7		T11	18
valid_sources[0x65]	61761	1			T8	1		T9	3		T11	23
valid_sources[0x66]	55432	1			T8	1		T9	5		T11	17
valid_sources[0x67]	50774	1			T8	5		T9	1		T11	26
valid_sources[0x68]	58902	1			T8	7		T9	9		T11	23
valid_sources[0x69]	56775	1			T4	129		T8	1		T11	22
valid_sources[0x6a]	54270	1			T4	49		T8	1		T11	16
valid_sources[0x6b]	50686	1			T8	8		T9	4		T11	19
valid_sources[0x6c]	62658	1			T8	10		T9	1		T11	29
valid_sources[0x6d]	54094	1			T8	2		T9	2		T11	16
valid_sources[0x6e]	53558	1			T8	3		T9	4		T11	21
valid_sources[0x6f]	55611	1			T8	7		T11	17		T12	15
valid_sources[0x70]	52191	1			T8	1		T9	9		T11	16
valid_sources[0x71]	50348	1			T8	1		T11	27		T12	9
valid_sources[0x72]	54372	1			T9	1		T11	13		T12	8
valid_sources[0x73]	57140	1			T4	203		T9	8		T11	23
valid_sources[0x74]	54802	1			T4	346		T8	5		T9	2
valid_sources[0x75]	61374	1			T8	4		T11	23		T12	13
valid_sources[0x76]	51387	1			T8	7		T11	22		T12	34
valid_sources[0x77]	56428	1			T4	142		T8	2		T9	3
valid_sources[0x78]	56210	1			T8	9		T11	22		T12	19
valid_sources[0x79]	51142	1			T11	18		T12	9		T44	12
valid_sources[0x7a]	57525	1			T8	2		T11	21		T12	17
valid_sources[0x7b]	71521	1			T4	53		T8	3		T11	24
valid_sources[0x7c]	50900	1			T8	3		T11	11		T12	22
valid_sources[0x7d]	51825	1			T11	22		T12	13		T13	10
valid_sources[0x7e]	74018	1			T4	237		T8	5		T9	2
valid_sources[0x7f]	50625	1			T9	2		T11	25		T12	17
valid_sources[0x80]	107792	1			T9	1		T11	21		T12	24

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3467869

1

T1

629

T2

1507

T3

1201

values[0x0]

all_enables

biggest_size

1919713

1

T1

54

T2

91

T3

208

values[0x1]

all_enables

biggest_size

1845349

1

T1

32

T2

68

T3

170

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	251522	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

9071116

1

T1

40

T2

60

T3

180

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	2319339	1			T1	20		T2	30		T3	90
values[0x0]	3399854	1			T1	10		T2	12		T3	43
values[0x1]	3603445	1			T1	10		T2	18		T3	47

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	91549	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

9231089

1

T1

40

T2

60

T3

180

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	36217	1			T3	2		T11	1		T5	670
valid_sources[0x01]	35555	1			T11	2		T12	2		T5	651
valid_sources[0x02]	36729	1			T12	1		T5	653		T6	1119
valid_sources[0x03]	35958	1			T11	2		T44	1		T5	696
valid_sources[0x04]	36862	1			T11	1		T5	645		T110	40
valid_sources[0x05]	35971	1			T3	4		T11	3		T5	647
valid_sources[0x06]	36536	1			T5	633		T6	1148		T7	514
valid_sources[0x07]	35664	1			T3	3		T12	3		T44	1
valid_sources[0x08]	35372	1			T44	1		T5	648		T26	10
valid_sources[0x09]	37026	1			T11	3		T5	627		T6	1181
valid_sources[0x0a]	36711	1			T1	1		T3	2		T9	1
valid_sources[0x0b]	36745	1			T3	1		T5	674		T6	1113
valid_sources[0x0c]	35956	1			T3	1		T11	2		T5	690
valid_sources[0x0d]	36167	1			T1	1		T11	1		T5	639
valid_sources[0x0e]	37093	1			T5	634		T6	1130		T7	482
valid_sources[0x0f]	37318	1			T5	659		T6	1144		T7	477
valid_sources[0x10]	36296	1			T1	1		T5	659		T6	1097
valid_sources[0x11]	37469	1			T3	2		T11	2		T5	724
valid_sources[0x12]	36857	1			T11	1		T5	688		T6	1130
valid_sources[0x13]	37502	1			T1	1		T5	652		T38	2
valid_sources[0x14]	36236	1			T11	1		T5	646		T26	8
valid_sources[0x15]	35442	1			T9	3		T5	640		T6	1113
valid_sources[0x16]	36610	1			T9	2		T5	689		T113	8
valid_sources[0x17]	37561	1			T11	1		T12	3		T5	692
valid_sources[0x18]	36218	1			T3	1		T12	1		T5	645
valid_sources[0x19]	35233	1			T3	4		T5	674		T6	1048
valid_sources[0x1a]	35019	1			T3	1		T11	2		T5	649
valid_sources[0x1b]	37235	1			T5	654		T6	1094		T7	470
valid_sources[0x1c]	35579	1			T1	1		T5	630		T6	1062
valid_sources[0x1d]	36682	1			T11	1		T12	3		T44	1
valid_sources[0x1e]	36871	1			T9	1		T11	2		T5	643
valid_sources[0x1f]	35891	1			T12	1		T5	660		T6	1131
valid_sources[0x20]	37698	1			T11	1		T12	1		T5	663
valid_sources[0x21]	34564	1			T5	692		T6	999		T7	481
valid_sources[0x22]	35969	1			T9	2		T11	1		T5	621
valid_sources[0x23]	36714	1			T3	2		T11	1		T5	611
valid_sources[0x24]	35947	1			T3	1		T44	1		T5	666
valid_sources[0x25]	36241	1			T11	1		T44	1		T5	654
valid_sources[0x26]	36152	1			T11	3		T44	1		T5	661
valid_sources[0x27]	34981	1			T11	2		T44	2		T5	657
valid_sources[0x28]	37169	1			T1	3		T3	1		T5	692
valid_sources[0x29]	36644	1			T11	2		T5	639		T6	1097
valid_sources[0x2a]	37084	1			T11	1		T44	1		T5	679
valid_sources[0x2b]	38914	1			T5	655		T6	1180		T7	484
valid_sources[0x2c]	36473	1			T3	1		T5	598		T6	1139
valid_sources[0x2d]	35743	1			T1	1		T3	2		T12	1
valid_sources[0x2e]	36378	1			T3	1		T5	659		T6	1119
valid_sources[0x2f]	36413	1			T3	2		T5	664		T113	2
valid_sources[0x30]	35967	1			T3	3		T11	1		T5	662
valid_sources[0x31]	36467	1			T5	683		T6	1143		T7	491
valid_sources[0x32]	36932	1			T11	4		T5	660		T6	1198
valid_sources[0x33]	37296	1			T11	1		T5	655		T113	2
valid_sources[0x34]	38321	1			T11	1		T5	611		T6	999
valid_sources[0x35]	34429	1			T1	2		T11	1		T12	2
valid_sources[0x36]	36147	1			T3	2		T9	1		T11	1
valid_sources[0x37]	35646	1			T5	650		T6	1068		T7	497
valid_sources[0x38]	36767	1			T3	1		T5	635		T6	1152
valid_sources[0x39]	37318	1			T3	3		T44	1		T5	665
valid_sources[0x3a]	35264	1			T5	683		T6	1106		T7	549
valid_sources[0x3b]	36216	1			T11	2		T12	3		T5	640
valid_sources[0x3c]	36632	1			T3	1		T11	2		T5	651
valid_sources[0x3d]	36677	1			T5	644		T6	1073		T114	1
valid_sources[0x3e]	37475	1			T3	1		T5	638		T6	1072
valid_sources[0x3f]	36571	1			T11	1		T5	705		T6	1120
valid_sources[0x40]	38913	1			T11	4		T12	1		T5	635
valid_sources[0x41]	35879	1			T5	645		T38	9		T6	1141
valid_sources[0x42]	35664	1			T3	2		T44	1		T5	617
valid_sources[0x43]	34658	1			T11	2		T5	631		T6	1098
valid_sources[0x44]	36030	1			T5	646		T6	1146		T7	479
valid_sources[0x45]	35301	1			T44	1		T5	623		T6	1139
valid_sources[0x46]	36843	1			T3	2		T11	1		T5	650
valid_sources[0x47]	37508	1			T3	1		T5	629		T6	1116
valid_sources[0x48]	36348	1			T11	1		T5	646		T6	1094
valid_sources[0x49]	34879	1			T3	2		T11	1		T12	4
valid_sources[0x4a]	35187	1			T3	1		T11	3		T5	633
valid_sources[0x4b]	36568	1			T11	1		T12	1		T5	670
valid_sources[0x4c]	35560	1			T1	1		T11	2		T12	1
valid_sources[0x4d]	36488	1			T11	1		T44	1		T5	616
valid_sources[0x4e]	35885	1			T44	1		T5	703		T6	1139
valid_sources[0x4f]	35687	1			T5	678		T6	1100		T7	447
valid_sources[0x50]	35099	1			T3	1		T9	1		T5	624
valid_sources[0x51]	36470	1			T3	1		T11	1		T5	634
valid_sources[0x52]	36135	1			T1	1		T3	1		T5	632
valid_sources[0x53]	37061	1			T1	1		T5	629		T6	1097
valid_sources[0x54]	36842	1			T12	1		T5	598		T113	6
valid_sources[0x55]	35896	1			T3	1		T5	683		T6	1095
valid_sources[0x56]	36210	1			T11	2		T12	1		T5	707
valid_sources[0x57]	36676	1			T3	2		T9	4		T12	1
valid_sources[0x58]	35474	1			T11	1		T5	645		T38	1
valid_sources[0x59]	36591	1			T11	2		T5	691		T6	1119
valid_sources[0x5a]	36893	1			T3	1		T11	3		T5	645
valid_sources[0x5b]	37022	1			T11	1		T5	654		T6	1072
valid_sources[0x5c]	36065	1			T3	2		T11	1		T5	696
valid_sources[0x5d]	35848	1			T11	1		T5	649		T6	1038
valid_sources[0x5e]	35296	1			T10	200		T11	3		T12	1
valid_sources[0x5f]	36444	1			T1	2		T5	657		T26	5
valid_sources[0x60]	38074	1			T9	2		T11	1		T5	660
valid_sources[0x61]	35799	1			T3	3		T12	2		T5	623
valid_sources[0x62]	35098	1			T9	5		T11	1		T44	1
valid_sources[0x63]	35529	1			T5	647		T6	1140		T114	1
valid_sources[0x64]	36705	1			T3	1		T12	1		T5	642
valid_sources[0x65]	35555	1			T9	3		T44	1		T5	663
valid_sources[0x66]	36247	1			T3	5		T12	1		T44	2
valid_sources[0x67]	34692	1			T9	1		T5	664		T6	1113
valid_sources[0x68]	36369	1			T5	643		T6	1096		T7	481
valid_sources[0x69]	35385	1			T1	1		T3	3		T11	1
valid_sources[0x6a]	36855	1			T11	4		T5	634		T113	2
valid_sources[0x6b]	36026	1			T3	1		T11	1		T5	638
valid_sources[0x6c]	37444	1			T11	1		T44	2		T5	685
valid_sources[0x6d]	36947	1			T5	652		T6	1047		T7	494
valid_sources[0x6e]	37152	1			T3	1		T11	1		T5	652
valid_sources[0x6f]	36754	1			T3	2		T11	1		T5	623
valid_sources[0x70]	35964	1			T5	626		T6	1157		T7	479
valid_sources[0x71]	37235	1			T9	3		T11	1		T13	220
valid_sources[0x72]	37234	1			T11	2		T5	613		T6	1077
valid_sources[0x73]	36551	1			T1	1		T5	656		T6	1059
valid_sources[0x74]	36526	1			T5	727		T38	4		T6	1096
valid_sources[0x75]	37389	1			T11	1		T5	634		T38	1
valid_sources[0x76]	36539	1			T3	1		T11	4		T5	623
valid_sources[0x77]	36403	1			T5	670		T6	1186		T7	515
valid_sources[0x78]	35942	1			T5	588		T38	2		T113	8
valid_sources[0x79]	37984	1			T1	1		T11	2		T12	1
valid_sources[0x7a]	36496	1			T3	1		T5	634		T6	1149
valid_sources[0x7b]	36946	1			T11	1		T5	650		T6	1187
valid_sources[0x7c]	34881	1			T9	1		T12	3		T5	678
valid_sources[0x7d]	38801	1			T11	1		T5	673		T6	1010
valid_sources[0x7e]	36006	1			T12	1		T5	663		T6	1109
valid_sources[0x7f]	36879	1			T3	3		T11	1		T5	662
valid_sources[0x80]	35746	1			T3	1		T11	1		T5	609

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

2305201

1

T1

20

T2

30

T3

90

values[0x0]

all_enables

biggest_size

3382544

1

T1

10

T2

12

T3

43

values[0x1]

all_enables

biggest_size

3383371

1

T1

10

T2

18

T3

47