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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.96 93.79 96.72 95.91 91.65 97.19 96.34 93.14


Total test records in report: 1323
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T1056 /workspace/coverage/default/39.otp_ctrl_stress_all.3743237586 Aug 03 06:42:58 PM PDT 24 Aug 03 06:43:58 PM PDT 24 2641684312 ps
T1057 /workspace/coverage/default/34.otp_ctrl_stress_all.671225378 Aug 03 06:41:25 PM PDT 24 Aug 03 06:42:56 PM PDT 24 19587026042 ps
T1058 /workspace/coverage/default/96.otp_ctrl_parallel_lc_esc.2364368620 Aug 03 06:51:46 PM PDT 24 Aug 03 06:51:59 PM PDT 24 476547307 ps
T1059 /workspace/coverage/default/292.otp_ctrl_init_fail.3046758808 Aug 03 06:59:20 PM PDT 24 Aug 03 06:59:25 PM PDT 24 356952651 ps
T1060 /workspace/coverage/default/5.otp_ctrl_parallel_lc_req.3282441506 Aug 03 06:35:22 PM PDT 24 Aug 03 06:35:41 PM PDT 24 762766895 ps
T1061 /workspace/coverage/default/10.otp_ctrl_parallel_key_req.3092322403 Aug 03 06:36:21 PM PDT 24 Aug 03 06:36:41 PM PDT 24 852983871 ps
T1062 /workspace/coverage/default/41.otp_ctrl_init_fail.3884898216 Aug 03 06:43:15 PM PDT 24 Aug 03 06:43:19 PM PDT 24 407629873 ps
T1063 /workspace/coverage/default/135.otp_ctrl_parallel_lc_esc.1161415074 Aug 03 06:56:13 PM PDT 24 Aug 03 06:56:22 PM PDT 24 403088370 ps
T1064 /workspace/coverage/default/221.otp_ctrl_init_fail.563056783 Aug 03 06:58:39 PM PDT 24 Aug 03 06:58:44 PM PDT 24 234270984 ps
T1065 /workspace/coverage/default/91.otp_ctrl_init_fail.3559557800 Aug 03 06:51:06 PM PDT 24 Aug 03 06:51:09 PM PDT 24 418865715 ps
T1066 /workspace/coverage/default/28.otp_ctrl_macro_errs.1418807791 Aug 03 06:39:50 PM PDT 24 Aug 03 06:40:18 PM PDT 24 1371529626 ps
T1067 /workspace/coverage/default/94.otp_ctrl_parallel_lc_esc.2287253298 Aug 03 06:51:28 PM PDT 24 Aug 03 06:51:33 PM PDT 24 447780870 ps
T1068 /workspace/coverage/default/127.otp_ctrl_parallel_lc_esc.2084526977 Aug 03 06:55:35 PM PDT 24 Aug 03 06:55:39 PM PDT 24 514308262 ps
T1069 /workspace/coverage/default/195.otp_ctrl_init_fail.861162621 Aug 03 06:58:20 PM PDT 24 Aug 03 06:58:25 PM PDT 24 1642319453 ps
T1070 /workspace/coverage/default/13.otp_ctrl_smoke.1422251476 Aug 03 06:36:42 PM PDT 24 Aug 03 06:36:46 PM PDT 24 1612174317 ps
T1071 /workspace/coverage/default/56.otp_ctrl_parallel_lc_esc.3220445536 Aug 03 06:47:12 PM PDT 24 Aug 03 06:47:20 PM PDT 24 297518613 ps
T1072 /workspace/coverage/default/22.otp_ctrl_test_access.208006638 Aug 03 06:38:39 PM PDT 24 Aug 03 06:39:02 PM PDT 24 1324428832 ps
T1073 /workspace/coverage/default/31.otp_ctrl_smoke.3354637914 Aug 03 06:40:32 PM PDT 24 Aug 03 06:40:39 PM PDT 24 411156751 ps
T1074 /workspace/coverage/default/69.otp_ctrl_stress_all_with_rand_reset.1403274249 Aug 03 06:48:20 PM PDT 24 Aug 03 06:55:38 PM PDT 24 65109519253 ps
T1075 /workspace/coverage/default/15.otp_ctrl_check_fail.4236084710 Aug 03 06:37:07 PM PDT 24 Aug 03 06:37:24 PM PDT 24 2491730563 ps
T1076 /workspace/coverage/default/39.otp_ctrl_alert_test.340799841 Aug 03 06:42:57 PM PDT 24 Aug 03 06:42:58 PM PDT 24 100233181 ps
T1077 /workspace/coverage/default/164.otp_ctrl_parallel_lc_esc.1806460747 Aug 03 06:57:26 PM PDT 24 Aug 03 06:57:36 PM PDT 24 906591453 ps
T1078 /workspace/coverage/default/285.otp_ctrl_init_fail.3096831899 Aug 03 06:59:15 PM PDT 24 Aug 03 06:59:18 PM PDT 24 158370767 ps
T1079 /workspace/coverage/default/21.otp_ctrl_check_fail.3621563625 Aug 03 06:38:23 PM PDT 24 Aug 03 06:38:36 PM PDT 24 789385710 ps
T1080 /workspace/coverage/default/197.otp_ctrl_init_fail.1776008937 Aug 03 06:58:18 PM PDT 24 Aug 03 06:58:22 PM PDT 24 526223779 ps
T55 /workspace/coverage/default/28.otp_ctrl_check_fail.597853581 Aug 03 06:39:51 PM PDT 24 Aug 03 06:40:05 PM PDT 24 1634965324 ps
T1081 /workspace/coverage/default/18.otp_ctrl_parallel_lc_req.4123962500 Aug 03 06:37:41 PM PDT 24 Aug 03 06:38:01 PM PDT 24 2037967359 ps
T1082 /workspace/coverage/default/42.otp_ctrl_test_access.2788479767 Aug 03 06:43:59 PM PDT 24 Aug 03 06:44:10 PM PDT 24 1764003368 ps
T1083 /workspace/coverage/default/24.otp_ctrl_dai_errs.4208823284 Aug 03 06:38:59 PM PDT 24 Aug 03 06:39:18 PM PDT 24 1143762843 ps
T1084 /workspace/coverage/default/32.otp_ctrl_dai_lock.4035374778 Aug 03 06:40:48 PM PDT 24 Aug 03 06:41:00 PM PDT 24 5488864746 ps
T1085 /workspace/coverage/default/5.otp_ctrl_regwen.107821972 Aug 03 06:35:31 PM PDT 24 Aug 03 06:35:36 PM PDT 24 413196355 ps
T1086 /workspace/coverage/default/41.otp_ctrl_parallel_key_req.3969708617 Aug 03 06:43:26 PM PDT 24 Aug 03 06:43:51 PM PDT 24 943352575 ps
T1087 /workspace/coverage/default/28.otp_ctrl_parallel_lc_req.3001921390 Aug 03 06:39:48 PM PDT 24 Aug 03 06:40:10 PM PDT 24 1015473481 ps
T1088 /workspace/coverage/default/266.otp_ctrl_init_fail.1300407225 Aug 03 06:59:04 PM PDT 24 Aug 03 06:59:08 PM PDT 24 144077465 ps
T1089 /workspace/coverage/default/209.otp_ctrl_init_fail.2627118861 Aug 03 06:58:29 PM PDT 24 Aug 03 06:58:33 PM PDT 24 263236912 ps
T1090 /workspace/coverage/default/12.otp_ctrl_regwen.3494716238 Aug 03 06:36:41 PM PDT 24 Aug 03 06:36:49 PM PDT 24 2755841230 ps
T1091 /workspace/coverage/default/1.otp_ctrl_parallel_lc_esc.629764705 Aug 03 06:34:32 PM PDT 24 Aug 03 06:34:43 PM PDT 24 2862127935 ps
T1092 /workspace/coverage/default/116.otp_ctrl_parallel_lc_esc.443771311 Aug 03 06:54:34 PM PDT 24 Aug 03 06:54:40 PM PDT 24 280455979 ps
T1093 /workspace/coverage/default/68.otp_ctrl_parallel_lc_esc.1807356194 Aug 03 06:48:12 PM PDT 24 Aug 03 06:48:26 PM PDT 24 642250300 ps
T1094 /workspace/coverage/default/44.otp_ctrl_regwen.1545681602 Aug 03 06:44:30 PM PDT 24 Aug 03 06:44:37 PM PDT 24 205504686 ps
T1095 /workspace/coverage/default/30.otp_ctrl_parallel_key_req.1652016259 Aug 03 06:40:18 PM PDT 24 Aug 03 06:40:57 PM PDT 24 1712773783 ps
T1096 /workspace/coverage/default/49.otp_ctrl_dai_errs.2128544623 Aug 03 06:46:13 PM PDT 24 Aug 03 06:46:56 PM PDT 24 4531879831 ps
T1097 /workspace/coverage/default/14.otp_ctrl_stress_all.773652391 Aug 03 06:37:04 PM PDT 24 Aug 03 06:40:55 PM PDT 24 33044685493 ps
T1098 /workspace/coverage/default/227.otp_ctrl_init_fail.3677201651 Aug 03 06:58:39 PM PDT 24 Aug 03 06:58:44 PM PDT 24 752315556 ps
T1099 /workspace/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.3573003442 Aug 03 06:35:40 PM PDT 24 Aug 03 06:45:48 PM PDT 24 44536452500 ps
T1100 /workspace/coverage/default/8.otp_ctrl_alert_test.3836891457 Aug 03 06:36:05 PM PDT 24 Aug 03 06:36:08 PM PDT 24 205064763 ps
T1101 /workspace/coverage/default/32.otp_ctrl_macro_errs.513660893 Aug 03 06:40:49 PM PDT 24 Aug 03 06:41:04 PM PDT 24 1085760350 ps
T1102 /workspace/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.3165268453 Aug 03 06:48:15 PM PDT 24 Aug 03 07:32:30 PM PDT 24 226738886386 ps
T1103 /workspace/coverage/default/37.otp_ctrl_init_fail.2491485034 Aug 03 06:42:01 PM PDT 24 Aug 03 06:42:05 PM PDT 24 116931690 ps
T1104 /workspace/coverage/default/13.otp_ctrl_macro_errs.1672439199 Aug 03 06:36:47 PM PDT 24 Aug 03 06:37:03 PM PDT 24 1213009411 ps
T1105 /workspace/coverage/default/12.otp_ctrl_init_fail.98458851 Aug 03 06:36:36 PM PDT 24 Aug 03 06:36:39 PM PDT 24 177812788 ps
T1106 /workspace/coverage/default/38.otp_ctrl_smoke.3012927258 Aug 03 06:42:22 PM PDT 24 Aug 03 06:42:32 PM PDT 24 913210051 ps
T1107 /workspace/coverage/default/20.otp_ctrl_parallel_lc_req.3804492737 Aug 03 06:38:04 PM PDT 24 Aug 03 06:38:21 PM PDT 24 6653606941 ps
T1108 /workspace/coverage/default/31.otp_ctrl_stress_all.2893667871 Aug 03 06:40:42 PM PDT 24 Aug 03 06:43:38 PM PDT 24 5043721286 ps
T1109 /workspace/coverage/default/37.otp_ctrl_parallel_lc_req.142504265 Aug 03 06:42:01 PM PDT 24 Aug 03 06:42:37 PM PDT 24 10713111707 ps
T1110 /workspace/coverage/default/60.otp_ctrl_stress_all_with_rand_reset.85651384 Aug 03 06:47:33 PM PDT 24 Aug 03 06:52:43 PM PDT 24 25919243605 ps
T41 /workspace/coverage/default/45.otp_ctrl_check_fail.590152507 Aug 03 06:44:45 PM PDT 24 Aug 03 06:44:56 PM PDT 24 520535909 ps
T1111 /workspace/coverage/default/10.otp_ctrl_dai_lock.3676220291 Aug 03 06:36:16 PM PDT 24 Aug 03 06:36:42 PM PDT 24 13751192227 ps
T1112 /workspace/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.3646577408 Aug 03 06:48:54 PM PDT 24 Aug 03 07:56:52 PM PDT 24 1887435560381 ps
T1113 /workspace/coverage/default/0.otp_ctrl_alert_test.852770446 Aug 03 06:34:24 PM PDT 24 Aug 03 06:34:26 PM PDT 24 110403121 ps
T1114 /workspace/coverage/default/30.otp_ctrl_smoke.1683313553 Aug 03 06:40:13 PM PDT 24 Aug 03 06:40:17 PM PDT 24 120327655 ps
T170 /workspace/coverage/default/51.otp_ctrl_init_fail.4264833561 Aug 03 06:46:33 PM PDT 24 Aug 03 06:46:37 PM PDT 24 108595476 ps
T1115 /workspace/coverage/default/100.otp_ctrl_init_fail.72859796 Aug 03 06:52:32 PM PDT 24 Aug 03 06:52:36 PM PDT 24 598415971 ps
T1116 /workspace/coverage/default/45.otp_ctrl_dai_lock.1800219561 Aug 03 06:44:46 PM PDT 24 Aug 03 06:44:57 PM PDT 24 1167276365 ps
T246 /workspace/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.176123590 Aug 03 06:35:18 PM PDT 24 Aug 03 06:46:46 PM PDT 24 301959701727 ps
T1117 /workspace/coverage/default/32.otp_ctrl_stress_all.3756936851 Aug 03 06:40:53 PM PDT 24 Aug 03 06:47:05 PM PDT 24 26428067336 ps
T1118 /workspace/coverage/default/89.otp_ctrl_init_fail.1245922915 Aug 03 06:50:49 PM PDT 24 Aug 03 06:50:54 PM PDT 24 2581327103 ps
T1119 /workspace/coverage/default/39.otp_ctrl_parallel_key_req.2287679450 Aug 03 06:42:52 PM PDT 24 Aug 03 06:43:26 PM PDT 24 1764096706 ps
T1120 /workspace/coverage/default/237.otp_ctrl_init_fail.1905147556 Aug 03 06:58:49 PM PDT 24 Aug 03 06:58:53 PM PDT 24 231774874 ps
T1121 /workspace/coverage/default/120.otp_ctrl_init_fail.3160315217 Aug 03 06:54:54 PM PDT 24 Aug 03 06:54:58 PM PDT 24 195643734 ps
T1122 /workspace/coverage/default/29.otp_ctrl_dai_lock.2660316034 Aug 03 06:40:04 PM PDT 24 Aug 03 06:40:23 PM PDT 24 6887087600 ps
T1123 /workspace/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.2379573667 Aug 03 06:52:27 PM PDT 24 Aug 03 07:16:01 PM PDT 24 207773356092 ps
T1124 /workspace/coverage/default/71.otp_ctrl_parallel_lc_esc.2631018324 Aug 03 06:48:26 PM PDT 24 Aug 03 06:48:37 PM PDT 24 434436893 ps
T300 /workspace/coverage/default/8.otp_ctrl_stress_all.3567659741 Aug 03 06:36:05 PM PDT 24 Aug 03 06:39:41 PM PDT 24 102121649587 ps
T1125 /workspace/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.2738636787 Aug 03 06:51:05 PM PDT 24 Aug 03 07:12:07 PM PDT 24 549556007073 ps
T258 /workspace/coverage/default/295.otp_ctrl_init_fail.782137471 Aug 03 06:59:21 PM PDT 24 Aug 03 06:59:26 PM PDT 24 135001515 ps
T1126 /workspace/coverage/default/10.otp_ctrl_check_fail.3953526128 Aug 03 06:36:21 PM PDT 24 Aug 03 06:36:39 PM PDT 24 1957426352 ps
T1127 /workspace/coverage/default/59.otp_ctrl_parallel_lc_esc.458920785 Aug 03 06:47:22 PM PDT 24 Aug 03 06:47:30 PM PDT 24 302259113 ps
T1128 /workspace/coverage/default/10.otp_ctrl_alert_test.2691012936 Aug 03 06:36:21 PM PDT 24 Aug 03 06:36:23 PM PDT 24 194696236 ps
T1129 /workspace/coverage/default/21.otp_ctrl_dai_lock.1738039090 Aug 03 06:38:23 PM PDT 24 Aug 03 06:39:09 PM PDT 24 21726403810 ps
T1130 /workspace/coverage/default/47.otp_ctrl_init_fail.2997641372 Aug 03 06:45:26 PM PDT 24 Aug 03 06:45:31 PM PDT 24 255612347 ps
T301 /workspace/coverage/default/12.otp_ctrl_stress_all.38692388 Aug 03 06:36:44 PM PDT 24 Aug 03 06:37:48 PM PDT 24 32773617142 ps
T1131 /workspace/coverage/default/69.otp_ctrl_init_fail.3351387881 Aug 03 06:48:17 PM PDT 24 Aug 03 06:48:21 PM PDT 24 168122443 ps
T1132 /workspace/coverage/default/274.otp_ctrl_init_fail.3901087057 Aug 03 06:59:12 PM PDT 24 Aug 03 06:59:15 PM PDT 24 488522353 ps
T1133 /workspace/coverage/default/0.otp_ctrl_smoke.354589026 Aug 03 06:34:15 PM PDT 24 Aug 03 06:34:24 PM PDT 24 4719189547 ps
T1134 /workspace/coverage/default/129.otp_ctrl_parallel_lc_esc.2552102735 Aug 03 06:55:40 PM PDT 24 Aug 03 06:55:46 PM PDT 24 360413281 ps
T1135 /workspace/coverage/default/298.otp_ctrl_init_fail.1214664459 Aug 03 06:59:19 PM PDT 24 Aug 03 06:59:24 PM PDT 24 268846847 ps
T1136 /workspace/coverage/default/43.otp_ctrl_regwen.2041914587 Aug 03 06:44:09 PM PDT 24 Aug 03 06:44:18 PM PDT 24 275506065 ps
T1137 /workspace/coverage/default/62.otp_ctrl_init_fail.2370784133 Aug 03 06:47:37 PM PDT 24 Aug 03 06:47:44 PM PDT 24 1752995510 ps
T1138 /workspace/coverage/default/31.otp_ctrl_parallel_lc_req.913696213 Aug 03 06:40:31 PM PDT 24 Aug 03 06:40:50 PM PDT 24 497635988 ps
T1139 /workspace/coverage/default/25.otp_ctrl_regwen.24029829 Aug 03 06:39:19 PM PDT 24 Aug 03 06:39:28 PM PDT 24 987402510 ps
T1140 /workspace/coverage/default/3.otp_ctrl_stress_all.3969011924 Aug 03 06:35:12 PM PDT 24 Aug 03 06:37:49 PM PDT 24 69159216886 ps
T205 /workspace/coverage/default/11.otp_ctrl_macro_errs.3517295523 Aug 03 06:36:26 PM PDT 24 Aug 03 06:36:43 PM PDT 24 1556339263 ps
T1141 /workspace/coverage/default/3.otp_ctrl_parallel_lc_req.1767873884 Aug 03 06:35:01 PM PDT 24 Aug 03 06:35:17 PM PDT 24 846968703 ps
T1142 /workspace/coverage/default/67.otp_ctrl_init_fail.1511041585 Aug 03 06:48:01 PM PDT 24 Aug 03 06:48:05 PM PDT 24 160430372 ps
T1143 /workspace/coverage/default/45.otp_ctrl_regwen.843962319 Aug 03 06:44:50 PM PDT 24 Aug 03 06:44:55 PM PDT 24 206322398 ps
T1144 /workspace/coverage/default/38.otp_ctrl_stress_all.794358151 Aug 03 06:42:38 PM PDT 24 Aug 03 06:43:25 PM PDT 24 7987644820 ps
T1145 /workspace/coverage/default/279.otp_ctrl_init_fail.1044915853 Aug 03 06:59:10 PM PDT 24 Aug 03 06:59:14 PM PDT 24 227396431 ps
T1146 /workspace/coverage/default/44.otp_ctrl_parallel_lc_req.3590749139 Aug 03 06:44:21 PM PDT 24 Aug 03 06:44:40 PM PDT 24 1016512509 ps
T1147 /workspace/coverage/default/46.otp_ctrl_parallel_lc_esc.2430473095 Aug 03 06:45:01 PM PDT 24 Aug 03 06:45:07 PM PDT 24 398434094 ps
T1148 /workspace/coverage/default/38.otp_ctrl_dai_lock.2825269255 Aug 03 06:42:22 PM PDT 24 Aug 03 06:42:31 PM PDT 24 2413496694 ps
T1149 /workspace/coverage/default/83.otp_ctrl_parallel_lc_esc.528153387 Aug 03 06:50:01 PM PDT 24 Aug 03 06:50:17 PM PDT 24 2048291931 ps
T1150 /workspace/coverage/default/5.otp_ctrl_macro_errs.736868599 Aug 03 06:35:29 PM PDT 24 Aug 03 06:35:40 PM PDT 24 579375700 ps
T1151 /workspace/coverage/default/159.otp_ctrl_parallel_lc_esc.1668770921 Aug 03 06:57:15 PM PDT 24 Aug 03 06:57:21 PM PDT 24 231739352 ps
T1152 /workspace/coverage/default/282.otp_ctrl_init_fail.3216203435 Aug 03 06:59:14 PM PDT 24 Aug 03 06:59:18 PM PDT 24 458388231 ps
T1153 /workspace/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.2109106761 Aug 03 06:51:31 PM PDT 24 Aug 03 07:07:41 PM PDT 24 364485800392 ps
T151 /workspace/coverage/default/22.otp_ctrl_stress_all_with_rand_reset.452957480 Aug 03 06:38:38 PM PDT 24 Aug 03 06:51:37 PM PDT 24 106841053781 ps
T1154 /workspace/coverage/default/26.otp_ctrl_regwen.3057943682 Aug 03 06:39:27 PM PDT 24 Aug 03 06:39:33 PM PDT 24 672176260 ps
T1155 /workspace/coverage/default/91.otp_ctrl_parallel_lc_esc.1648381238 Aug 03 06:51:05 PM PDT 24 Aug 03 06:51:13 PM PDT 24 3492775064 ps
T1156 /workspace/coverage/default/208.otp_ctrl_init_fail.2045027681 Aug 03 06:58:30 PM PDT 24 Aug 03 06:58:34 PM PDT 24 213521826 ps
T1157 /workspace/coverage/default/226.otp_ctrl_init_fail.2263570165 Aug 03 06:58:40 PM PDT 24 Aug 03 06:58:43 PM PDT 24 127513787 ps
T156 /workspace/coverage/default/0.otp_ctrl_wake_up.145963822 Aug 03 06:34:14 PM PDT 24 Aug 03 06:34:16 PM PDT 24 131411232 ps
T1158 /workspace/coverage/default/260.otp_ctrl_init_fail.2964501862 Aug 03 06:59:05 PM PDT 24 Aug 03 06:59:10 PM PDT 24 292448074 ps
T1159 /workspace/coverage/default/47.otp_ctrl_parallel_lc_esc.2498559044 Aug 03 06:45:27 PM PDT 24 Aug 03 06:45:33 PM PDT 24 355986565 ps
T1160 /workspace/coverage/default/37.otp_ctrl_test_access.4070291036 Aug 03 06:42:15 PM PDT 24 Aug 03 06:42:25 PM PDT 24 610994028 ps
T1161 /workspace/coverage/default/25.otp_ctrl_test_access.4192680396 Aug 03 06:39:20 PM PDT 24 Aug 03 06:39:42 PM PDT 24 1303405160 ps
T1162 /workspace/coverage/default/1.otp_ctrl_regwen.3535176107 Aug 03 06:34:36 PM PDT 24 Aug 03 06:34:40 PM PDT 24 135874833 ps
T1163 /workspace/coverage/default/297.otp_ctrl_init_fail.4202643864 Aug 03 06:59:20 PM PDT 24 Aug 03 06:59:24 PM PDT 24 122424743 ps
T1164 /workspace/coverage/default/0.otp_ctrl_parallel_lc_req.422434118 Aug 03 06:34:19 PM PDT 24 Aug 03 06:34:41 PM PDT 24 741088010 ps
T233 /workspace/coverage/default/1.otp_ctrl_sec_cm.1844710259 Aug 03 06:34:34 PM PDT 24 Aug 03 06:40:00 PM PDT 24 169812911898 ps
T1165 /workspace/coverage/default/3.otp_ctrl_check_fail.2441264953 Aug 03 06:35:06 PM PDT 24 Aug 03 06:35:27 PM PDT 24 9762867274 ps
T1166 /workspace/coverage/default/18.otp_ctrl_alert_test.1164067270 Aug 03 06:37:53 PM PDT 24 Aug 03 06:37:55 PM PDT 24 213215560 ps
T1167 /workspace/coverage/default/146.otp_ctrl_parallel_lc_esc.1333158124 Aug 03 06:56:56 PM PDT 24 Aug 03 06:57:03 PM PDT 24 293626169 ps
T1168 /workspace/coverage/default/59.otp_ctrl_stress_all_with_rand_reset.2714156488 Aug 03 06:47:22 PM PDT 24 Aug 03 07:12:33 PM PDT 24 55877045812 ps
T1169 /workspace/coverage/default/45.otp_ctrl_parallel_key_req.2654083943 Aug 03 06:44:53 PM PDT 24 Aug 03 06:44:57 PM PDT 24 162016018 ps
T1170 /workspace/coverage/default/48.otp_ctrl_parallel_lc_esc.1428797477 Aug 03 06:45:41 PM PDT 24 Aug 03 06:45:47 PM PDT 24 168318062 ps
T1171 /workspace/coverage/default/0.otp_ctrl_low_freq_read.3847487963 Aug 03 06:34:21 PM PDT 24 Aug 03 06:34:36 PM PDT 24 7272935031 ps
T1172 /workspace/coverage/default/179.otp_ctrl_init_fail.479881142 Aug 03 06:57:49 PM PDT 24 Aug 03 06:57:53 PM PDT 24 131863159 ps
T1173 /workspace/coverage/default/46.otp_ctrl_dai_lock.616182754 Aug 03 06:45:06 PM PDT 24 Aug 03 06:45:27 PM PDT 24 10900927683 ps
T1174 /workspace/coverage/default/13.otp_ctrl_stress_all.3262421369 Aug 03 06:36:54 PM PDT 24 Aug 03 06:40:55 PM PDT 24 52304012081 ps
T302 /workspace/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.3553999548 Aug 03 06:50:28 PM PDT 24 Aug 03 07:14:34 PM PDT 24 80975224228 ps
T1175 /workspace/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.1382903340 Aug 03 06:47:15 PM PDT 24 Aug 03 07:08:48 PM PDT 24 112229546271 ps
T1176 /workspace/coverage/default/192.otp_ctrl_init_fail.1356250223 Aug 03 06:58:10 PM PDT 24 Aug 03 06:58:15 PM PDT 24 561405829 ps
T1177 /workspace/coverage/default/163.otp_ctrl_init_fail.873852750 Aug 03 06:57:20 PM PDT 24 Aug 03 06:57:25 PM PDT 24 340154877 ps
T1178 /workspace/coverage/default/12.otp_ctrl_alert_test.1978870140 Aug 03 06:36:45 PM PDT 24 Aug 03 06:36:47 PM PDT 24 843050840 ps
T1179 /workspace/coverage/default/82.otp_ctrl_stress_all_with_rand_reset.3476681104 Aug 03 06:49:59 PM PDT 24 Aug 03 07:27:56 PM PDT 24 1110829276439 ps
T1180 /workspace/coverage/default/37.otp_ctrl_dai_errs.936211683 Aug 03 06:42:08 PM PDT 24 Aug 03 06:42:49 PM PDT 24 15799350899 ps
T1181 /workspace/coverage/default/248.otp_ctrl_init_fail.698912134 Aug 03 06:58:58 PM PDT 24 Aug 03 06:59:02 PM PDT 24 113556513 ps
T154 /workspace/coverage/default/18.otp_ctrl_macro_errs.2343164968 Aug 03 06:37:47 PM PDT 24 Aug 03 06:37:58 PM PDT 24 798679752 ps
T1182 /workspace/coverage/default/70.otp_ctrl_stress_all_with_rand_reset.2178171495 Aug 03 06:48:28 PM PDT 24 Aug 03 07:23:55 PM PDT 24 150703767939 ps
T1183 /workspace/coverage/default/12.otp_ctrl_macro_errs.4143996957 Aug 03 06:36:38 PM PDT 24 Aug 03 06:36:48 PM PDT 24 427854692 ps
T1184 /workspace/coverage/default/14.otp_ctrl_parallel_lc_esc.1894134065 Aug 03 06:36:57 PM PDT 24 Aug 03 06:37:13 PM PDT 24 683920338 ps
T1185 /workspace/coverage/default/130.otp_ctrl_parallel_lc_esc.3630302240 Aug 03 06:55:46 PM PDT 24 Aug 03 06:55:51 PM PDT 24 1885103794 ps
T70 /workspace/coverage/default/268.otp_ctrl_init_fail.778310980 Aug 03 06:59:14 PM PDT 24 Aug 03 06:59:18 PM PDT 24 137229337 ps
T1186 /workspace/coverage/default/4.otp_ctrl_check_fail.3941030441 Aug 03 06:35:19 PM PDT 24 Aug 03 06:35:56 PM PDT 24 6692485476 ps
T1187 /workspace/coverage/default/112.otp_ctrl_parallel_lc_esc.124111778 Aug 03 06:54:10 PM PDT 24 Aug 03 06:54:24 PM PDT 24 1172551281 ps
T1188 /workspace/coverage/default/193.otp_ctrl_parallel_lc_esc.671132573 Aug 03 06:58:13 PM PDT 24 Aug 03 06:58:34 PM PDT 24 1471904234 ps
T1189 /workspace/coverage/default/9.otp_ctrl_regwen.2355348930 Aug 03 06:36:12 PM PDT 24 Aug 03 06:36:21 PM PDT 24 1186988303 ps
T1190 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.3697483063 Aug 03 04:41:16 PM PDT 24 Aug 03 04:41:17 PM PDT 24 41864021 ps
T280 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1467388839 Aug 03 04:40:37 PM PDT 24 Aug 03 04:40:42 PM PDT 24 1688953876 ps
T1191 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.492311263 Aug 03 04:40:27 PM PDT 24 Aug 03 04:40:29 PM PDT 24 612991445 ps
T1192 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.2251988443 Aug 03 04:40:29 PM PDT 24 Aug 03 04:40:35 PM PDT 24 1290873667 ps
T278 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.1307844324 Aug 03 04:41:07 PM PDT 24 Aug 03 04:41:10 PM PDT 24 71104342 ps
T279 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.184624792 Aug 03 04:40:33 PM PDT 24 Aug 03 04:40:34 PM PDT 24 614079948 ps
T1193 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.506855339 Aug 03 04:41:05 PM PDT 24 Aug 03 04:41:06 PM PDT 24 40030732 ps
T374 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.2165599320 Aug 03 04:40:58 PM PDT 24 Aug 03 04:41:01 PM PDT 24 144275965 ps
T275 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.3248861089 Aug 03 04:41:00 PM PDT 24 Aug 03 04:41:20 PM PDT 24 21765358228 ps
T1194 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.828893223 Aug 03 04:40:36 PM PDT 24 Aug 03 04:40:41 PM PDT 24 1701458676 ps
T276 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.3913792947 Aug 03 04:40:46 PM PDT 24 Aug 03 04:41:05 PM PDT 24 1376306026 ps
T303 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.2183275605 Aug 03 04:40:28 PM PDT 24 Aug 03 04:40:30 PM PDT 24 71729159 ps
T1195 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.532873885 Aug 03 04:41:01 PM PDT 24 Aug 03 04:41:03 PM PDT 24 537242914 ps
T277 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.1762948218 Aug 03 04:41:03 PM PDT 24 Aug 03 04:41:14 PM PDT 24 1604287547 ps
T325 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.3204529102 Aug 03 04:40:31 PM PDT 24 Aug 03 04:40:33 PM PDT 24 56517624 ps
T326 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.654057983 Aug 03 04:40:50 PM PDT 24 Aug 03 04:40:52 PM PDT 24 74641134 ps
T1196 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.1952569051 Aug 03 04:41:10 PM PDT 24 Aug 03 04:41:12 PM PDT 24 76494106 ps
T1197 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.2849677964 Aug 03 04:41:04 PM PDT 24 Aug 03 04:41:05 PM PDT 24 47316778 ps
T1198 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.3085161579 Aug 03 04:41:03 PM PDT 24 Aug 03 04:41:05 PM PDT 24 79072253 ps
T358 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2197700301 Aug 03 04:40:28 PM PDT 24 Aug 03 04:40:38 PM PDT 24 2404022367 ps
T327 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.3127022665 Aug 03 04:40:44 PM PDT 24 Aug 03 04:40:46 PM PDT 24 82973225 ps
T1199 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.132799299 Aug 03 04:40:46 PM PDT 24 Aug 03 04:40:49 PM PDT 24 212633232 ps
T304 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1346887051 Aug 03 04:40:33 PM PDT 24 Aug 03 04:40:41 PM PDT 24 3148842426 ps
T1200 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.1683069352 Aug 03 04:40:51 PM PDT 24 Aug 03 04:40:53 PM PDT 24 140269574 ps
T1201 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.402638195 Aug 03 04:41:09 PM PDT 24 Aug 03 04:41:11 PM PDT 24 94116450 ps
T1202 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.1311055326 Aug 03 04:40:48 PM PDT 24 Aug 03 04:40:54 PM PDT 24 1256923303 ps
T1203 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.278557140 Aug 03 04:40:45 PM PDT 24 Aug 03 04:40:50 PM PDT 24 1238676447 ps
T1204 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.3542592284 Aug 03 04:41:09 PM PDT 24 Aug 03 04:41:11 PM PDT 24 36895074 ps
T1205 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.867454428 Aug 03 04:40:29 PM PDT 24 Aug 03 04:40:30 PM PDT 24 51896061 ps
T1206 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.2154361589 Aug 03 04:40:54 PM PDT 24 Aug 03 04:40:58 PM PDT 24 106377239 ps
T282 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.3755591525 Aug 03 04:40:33 PM PDT 24 Aug 03 04:40:51 PM PDT 24 4902589935 ps
T328 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.432500670 Aug 03 04:40:37 PM PDT 24 Aug 03 04:40:39 PM PDT 24 540068050 ps
T360 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.2885350824 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:58 PM PDT 24 1412787359 ps
T305 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.2116614177 Aug 03 04:40:50 PM PDT 24 Aug 03 04:40:54 PM PDT 24 191688806 ps
T1207 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.1460364460 Aug 03 04:40:55 PM PDT 24 Aug 03 04:40:56 PM PDT 24 40100483 ps
T1208 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1711658469 Aug 03 04:40:24 PM PDT 24 Aug 03 04:40:27 PM PDT 24 265066062 ps
T1209 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.651753465 Aug 03 04:41:13 PM PDT 24 Aug 03 04:41:15 PM PDT 24 139263982 ps
T1210 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.600917239 Aug 03 04:40:49 PM PDT 24 Aug 03 04:40:52 PM PDT 24 213046851 ps
T329 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.4135041514 Aug 03 04:40:23 PM PDT 24 Aug 03 04:40:25 PM PDT 24 813751482 ps
T361 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.854924652 Aug 03 04:40:38 PM PDT 24 Aug 03 04:41:20 PM PDT 24 19975161935 ps
T306 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.1258382654 Aug 03 04:40:35 PM PDT 24 Aug 03 04:40:37 PM PDT 24 38970021 ps
T307 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3263313199 Aug 03 04:40:37 PM PDT 24 Aug 03 04:40:39 PM PDT 24 75066855 ps
T1211 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.3306461133 Aug 03 04:40:59 PM PDT 24 Aug 03 04:41:05 PM PDT 24 614958192 ps
T324 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2934624376 Aug 03 04:40:28 PM PDT 24 Aug 03 04:40:30 PM PDT 24 131703659 ps
T330 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2675304303 Aug 03 04:40:35 PM PDT 24 Aug 03 04:40:37 PM PDT 24 263617402 ps
T1212 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.412503990 Aug 03 04:40:54 PM PDT 24 Aug 03 04:40:59 PM PDT 24 290657961 ps
T1213 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.1740153914 Aug 03 04:40:34 PM PDT 24 Aug 03 04:40:37 PM PDT 24 108269157 ps
T1214 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.2773528286 Aug 03 04:40:29 PM PDT 24 Aug 03 04:40:38 PM PDT 24 2012238520 ps
T331 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.4256796538 Aug 03 04:40:32 PM PDT 24 Aug 03 04:40:34 PM PDT 24 59238242 ps
T309 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3765955710 Aug 03 04:40:22 PM PDT 24 Aug 03 04:40:25 PM PDT 24 180879839 ps
T1215 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.1819921796 Aug 03 04:40:33 PM PDT 24 Aug 03 04:40:34 PM PDT 24 133197960 ps
T1216 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.2737860568 Aug 03 04:40:52 PM PDT 24 Aug 03 04:41:06 PM PDT 24 10334451286 ps
T1217 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.4050470170 Aug 03 04:40:43 PM PDT 24 Aug 03 04:40:48 PM PDT 24 1549988407 ps
T1218 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1109967488 Aug 03 04:40:50 PM PDT 24 Aug 03 04:41:05 PM PDT 24 1678121003 ps
T1219 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.4258064521 Aug 03 04:40:37 PM PDT 24 Aug 03 04:40:39 PM PDT 24 74575949 ps
T332 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.681486154 Aug 03 04:40:35 PM PDT 24 Aug 03 04:40:38 PM PDT 24 82715918 ps
T281 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.2624151289 Aug 03 04:40:45 PM PDT 24 Aug 03 04:40:55 PM PDT 24 2373848267 ps
T1220 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1723281754 Aug 03 04:40:34 PM PDT 24 Aug 03 04:40:38 PM PDT 24 139497330 ps
T1221 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.4161695017 Aug 03 04:41:12 PM PDT 24 Aug 03 04:41:13 PM PDT 24 74998832 ps
T1222 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.118077599 Aug 03 04:40:36 PM PDT 24 Aug 03 04:40:47 PM PDT 24 1320782100 ps
T1223 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.3762546088 Aug 03 04:40:48 PM PDT 24 Aug 03 04:40:59 PM PDT 24 895739359 ps
T1224 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.351938190 Aug 03 04:40:54 PM PDT 24 Aug 03 04:41:06 PM PDT 24 9857304782 ps
T1225 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.2072369605 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:40 PM PDT 24 78624104 ps
T310 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.4047344274 Aug 03 04:40:32 PM PDT 24 Aug 03 04:40:34 PM PDT 24 70355194 ps
T1226 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.2225364853 Aug 03 04:40:39 PM PDT 24 Aug 03 04:40:41 PM PDT 24 89773481 ps
T1227 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3401819116 Aug 03 04:40:51 PM PDT 24 Aug 03 04:40:57 PM PDT 24 371398842 ps
T1228 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.3316597377 Aug 03 04:41:10 PM PDT 24 Aug 03 04:41:12 PM PDT 24 608853176 ps
T1229 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.1978485409 Aug 03 04:40:43 PM PDT 24 Aug 03 04:40:45 PM PDT 24 77110948 ps
T311 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.981310684 Aug 03 04:40:29 PM PDT 24 Aug 03 04:40:33 PM PDT 24 172821011 ps
T333 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1720795050 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:40 PM PDT 24 135626482 ps
T1230 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3816047819 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:39 PM PDT 24 43546884 ps
T1231 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.2412091250 Aug 03 04:40:34 PM PDT 24 Aug 03 04:40:42 PM PDT 24 147659563 ps
T1232 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.3264068858 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:40 PM PDT 24 146893913 ps
T312 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.1235832453 Aug 03 04:40:51 PM PDT 24 Aug 03 04:40:53 PM PDT 24 45036056 ps
T1233 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.1200301711 Aug 03 04:41:11 PM PDT 24 Aug 03 04:41:18 PM PDT 24 41847663 ps
T1234 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.218667026 Aug 03 04:40:31 PM PDT 24 Aug 03 04:40:37 PM PDT 24 175827879 ps
T313 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.532472682 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:39 PM PDT 24 79765529 ps
T1235 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.2666077465 Aug 03 04:40:56 PM PDT 24 Aug 03 04:40:58 PM PDT 24 73629829 ps
T1236 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.3285384213 Aug 03 04:40:58 PM PDT 24 Aug 03 04:41:01 PM PDT 24 316348183 ps
T1237 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.1898493791 Aug 03 04:40:34 PM PDT 24 Aug 03 04:40:40 PM PDT 24 128931313 ps
T1238 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3206417130 Aug 03 04:40:36 PM PDT 24 Aug 03 04:40:58 PM PDT 24 1977140962 ps
T314 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.428262518 Aug 03 04:40:36 PM PDT 24 Aug 03 04:40:45 PM PDT 24 1614584344 ps
T1239 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.551913 Aug 03 04:40:31 PM PDT 24 Aug 03 04:40:33 PM PDT 24 151201594 ps
T323 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.369547226 Aug 03 04:40:36 PM PDT 24 Aug 03 04:40:38 PM PDT 24 74367549 ps
T1240 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.2134036580 Aug 03 04:41:19 PM PDT 24 Aug 03 04:41:21 PM PDT 24 592472006 ps
T1241 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.1542561234 Aug 03 04:40:54 PM PDT 24 Aug 03 04:41:01 PM PDT 24 299956889 ps
T1242 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.458007821 Aug 03 04:40:47 PM PDT 24 Aug 03 04:40:49 PM PDT 24 502990641 ps
T1243 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.4223726654 Aug 03 04:40:56 PM PDT 24 Aug 03 04:40:58 PM PDT 24 48092099 ps
T1244 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.800647362 Aug 03 04:40:51 PM PDT 24 Aug 03 04:40:55 PM PDT 24 110281530 ps
T1245 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.3565384565 Aug 03 04:40:37 PM PDT 24 Aug 03 04:40:40 PM PDT 24 323602989 ps
T1246 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.31098076 Aug 03 04:40:32 PM PDT 24 Aug 03 04:40:49 PM PDT 24 1220837151 ps
T1247 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.1426768573 Aug 03 04:40:38 PM PDT 24 Aug 03 04:40:40 PM PDT 24 79982526 ps
T1248 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3403746388 Aug 03 04:40:34 PM PDT 24 Aug 03 04:40:41 PM PDT 24 1502268980 ps
T1249 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.1524350182 Aug 03 04:40:55 PM PDT 24 Aug 03 04:40:56 PM PDT 24 46847301 ps
T1250 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.3371037990 Aug 03 04:40:47 PM PDT 24 Aug 03 04:40:48 PM PDT 24 40015191 ps
T1251 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.3672049329 Aug 03 04:41:00 PM PDT 24 Aug 03 04:41:02 PM PDT 24 996619664 ps
T1252 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.737493559 Aug 03 04:40:35 PM PDT 24 Aug 03 04:40:41 PM PDT 24 68746575 ps
T1253 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.73584566 Aug 03 04:41:00 PM PDT 24 Aug 03 04:41:06 PM PDT 24 38548046 ps
T1254 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.1594982132 Aug 03 04:40:39 PM PDT 24 Aug 03 04:40:42 PM PDT 24 105046165 ps
T1255 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.1861840836 Aug 03 04:41:05 PM PDT 24 Aug 03 04:41:07 PM PDT 24 77168309 ps
T1256 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.4126387418 Aug 03 04:40:50 PM PDT 24 Aug 03 04:41:00 PM PDT 24 3381677064 ps
T308 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.3751634493 Aug 03 04:40:40 PM PDT 24 Aug 03 04:40:43 PM PDT 24 519152272 ps
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