T1059 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.3052418277 |
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|
Aug 29 09:39:13 AM UTC 24 |
Aug 29 09:39:26 AM UTC 24 |
540993813 ps |
T1060 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.1548907450 |
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|
Aug 29 09:39:13 AM UTC 24 |
Aug 29 09:39:26 AM UTC 24 |
208940330 ps |
T1061 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.3569305742 |
|
|
Aug 29 09:39:11 AM UTC 24 |
Aug 29 09:39:27 AM UTC 24 |
587439026 ps |
T1062 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/164.otp_ctrl_parallel_lc_esc.2581591936 |
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|
Aug 29 09:38:58 AM UTC 24 |
Aug 29 09:39:27 AM UTC 24 |
1954402820 ps |
T1063 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.3282891547 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:28 AM UTC 24 |
192093274 ps |
T1064 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.548685867 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:28 AM UTC 24 |
404257125 ps |
T1065 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_parallel_lc_esc.3230161908 |
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Aug 29 09:39:17 AM UTC 24 |
Aug 29 09:39:28 AM UTC 24 |
3595642109 ps |
T1066 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.1015915061 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:28 AM UTC 24 |
137708650 ps |
T1067 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.801505014 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:28 AM UTC 24 |
109658750 ps |
T1068 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.1425256660 |
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|
Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
86553091 ps |
T1069 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.2890858188 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
96955062 ps |
T136 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.3967039943 |
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|
Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
310152770 ps |
T1070 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.2590903622 |
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|
Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
172445745 ps |
T1071 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.2333644414 |
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Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
494649153 ps |
T1072 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.1544248625 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
1179326384 ps |
T28 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.4180217764 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
280294927 ps |
T1073 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.2453977384 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
154271405 ps |
T1074 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.856227550 |
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Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
2045256246 ps |
T1075 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.4035468061 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
542604845 ps |
T1076 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.2991668856 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:29 AM UTC 24 |
568953880 ps |
T1077 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.1558994030 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
183202557 ps |
T1078 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.3723710213 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
164190998 ps |
T1079 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.1673382114 |
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|
Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
280419840 ps |
T1080 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.3460254524 |
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|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
196229411 ps |
T57 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.4082921122 |
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Aug 29 09:39:26 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
106286131 ps |
T1081 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.616357929 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
115342382 ps |
T1082 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.526290534 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
155715139 ps |
T1083 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.3404859882 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:30 AM UTC 24 |
582300718 ps |
T1084 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.220179666 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:31 AM UTC 24 |
2014834701 ps |
T1085 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.3339941550 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:31 AM UTC 24 |
584434839 ps |
T1086 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.3834640941 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:31 AM UTC 24 |
1796916251 ps |
T1087 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.2792248122 |
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Aug 29 09:39:17 AM UTC 24 |
Aug 29 09:39:31 AM UTC 24 |
3467892551 ps |
T1088 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.123757939 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:32 AM UTC 24 |
2401002107 ps |
T1089 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.3572308013 |
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Aug 29 09:39:26 AM UTC 24 |
Aug 29 09:39:32 AM UTC 24 |
148803571 ps |
T1090 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.1892576959 |
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Aug 29 09:39:27 AM UTC 24 |
Aug 29 09:39:32 AM UTC 24 |
404812853 ps |
T1091 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.661968500 |
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Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
142742397 ps |
T1092 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_parallel_lc_esc.746482969 |
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Aug 29 09:39:07 AM UTC 24 |
Aug 29 09:39:32 AM UTC 24 |
2967381408 ps |
T1093 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.1410170406 |
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Aug 29 09:39:24 AM UTC 24 |
Aug 29 09:39:32 AM UTC 24 |
2194421093 ps |
T1094 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.4284733513 |
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Aug 29 09:39:27 AM UTC 24 |
Aug 29 09:39:33 AM UTC 24 |
307061356 ps |
T1095 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.2222760518 |
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Aug 29 09:39:17 AM UTC 24 |
Aug 29 09:39:33 AM UTC 24 |
2064826872 ps |
T1096 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.314366633 |
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Aug 29 09:39:27 AM UTC 24 |
Aug 29 09:39:33 AM UTC 24 |
440975529 ps |
T1097 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.1446528984 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:35 AM UTC 24 |
113383407 ps |
T1098 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.3378607213 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:35 AM UTC 24 |
2061931771 ps |
T394 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_stress_all_with_rand_reset.1845649954 |
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Aug 29 09:36:50 AM UTC 24 |
Aug 29 09:39:35 AM UTC 24 |
3672623809 ps |
T1099 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.1879870465 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:35 AM UTC 24 |
702834745 ps |
T1100 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.556228745 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
440005855 ps |
T1101 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.1244294389 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
159583329 ps |
T1102 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.606169923 |
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Aug 29 09:39:31 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
217420312 ps |
T1103 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.638578477 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
355711695 ps |
T1104 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.2115717604 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
127866396 ps |
T1105 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.1563958490 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
387311034 ps |
T1106 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.4097523527 |
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Aug 29 09:39:31 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
90255350 ps |
T154 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.1253649914 |
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Aug 29 09:39:31 AM UTC 24 |
Aug 29 09:39:36 AM UTC 24 |
226190185 ps |
T1107 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.1715559420 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:37 AM UTC 24 |
200777251 ps |
T1108 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.3179394492 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:37 AM UTC 24 |
501331492 ps |
T1109 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.1297634996 |
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Aug 29 09:39:31 AM UTC 24 |
Aug 29 09:39:37 AM UTC 24 |
2139300343 ps |
T1110 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.3630602824 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:37 AM UTC 24 |
2171819381 ps |
T1111 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.2468105895 |
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Aug 29 09:39:32 AM UTC 24 |
Aug 29 09:39:37 AM UTC 24 |
572734640 ps |
T1112 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.691610575 |
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Aug 29 09:39:17 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
8398138171 ps |
T1113 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.772948529 |
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Aug 29 09:39:32 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
414142702 ps |
T1114 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.2560081236 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
152023585 ps |
T1115 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.1150164261 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
1906789327 ps |
T58 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.3706964116 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
148990196 ps |
T1116 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.934893104 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
117465860 ps |
T1117 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.2685527014 |
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Aug 29 09:39:32 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
584191795 ps |
T1118 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.3997073298 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:38 AM UTC 24 |
134423095 ps |
T1119 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.3012417237 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
410871133 ps |
T1120 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.1934720461 |
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Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
157537748 ps |
T1121 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.3839183679 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
200873952 ps |
T1122 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.3191795441 |
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Aug 29 09:39:31 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
2014931703 ps |
T1123 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.2747109586 |
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Aug 29 09:39:32 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
303540941 ps |
T1124 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.284282697 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
116583378 ps |
T1125 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.1698449118 |
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Aug 29 09:39:30 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
1981756473 ps |
T1126 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.3752519354 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
529548224 ps |
T1127 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.3485727877 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:39 AM UTC 24 |
526515125 ps |
T1128 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.3496661144 |
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Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
417806505 ps |
T1129 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_stress_all_with_rand_reset.4104950792 |
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Aug 29 09:36:17 AM UTC 24 |
Aug 29 09:39:40 AM UTC 24 |
11373591513 ps |
T1130 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.1639417525 |
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Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:41 AM UTC 24 |
478451054 ps |
T1131 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.1967987708 |
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Aug 29 09:39:35 AM UTC 24 |
Aug 29 09:39:41 AM UTC 24 |
168888887 ps |
T1132 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.437542918 |
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Aug 29 09:39:35 AM UTC 24 |
Aug 29 09:39:41 AM UTC 24 |
464948631 ps |
T1133 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.1519121085 |
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Aug 29 09:39:35 AM UTC 24 |
Aug 29 09:39:41 AM UTC 24 |
1752689753 ps |
T1134 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.730077441 |
|
|
Aug 29 09:39:33 AM UTC 24 |
Aug 29 09:39:42 AM UTC 24 |
1911911308 ps |
T1135 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.1231584261 |
|
|
Aug 29 09:39:35 AM UTC 24 |
Aug 29 09:39:42 AM UTC 24 |
151214883 ps |
T1136 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.4142554075 |
|
|
Aug 29 09:39:37 AM UTC 24 |
Aug 29 09:39:42 AM UTC 24 |
351734318 ps |
T1137 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.1159016884 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:42 AM UTC 24 |
210970164 ps |
T1138 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.1235799219 |
|
|
Aug 29 09:39:35 AM UTC 24 |
Aug 29 09:39:42 AM UTC 24 |
1813993953 ps |
T1139 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.3408527586 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
146815904 ps |
T1140 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.3796872737 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
310516850 ps |
T1141 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.2841228761 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
125316708 ps |
T1142 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.1503520113 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
111688683 ps |
T1143 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.2168222330 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
571099218 ps |
T1144 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.4070928732 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
1419586287 ps |
T1145 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.3792398828 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
323641123 ps |
T1146 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.3585549192 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
117751958 ps |
T78 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.3486322265 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:43 AM UTC 24 |
120231338 ps |
T1147 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.2978616400 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:44 AM UTC 24 |
368911271 ps |
T1148 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.2535624136 |
|
|
Aug 29 09:39:23 AM UTC 24 |
Aug 29 09:39:44 AM UTC 24 |
5179019414 ps |
T1149 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.3206175872 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:45 AM UTC 24 |
228182615 ps |
T101 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.833329341 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:45 AM UTC 24 |
2195228963 ps |
T1150 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.3710934941 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:45 AM UTC 24 |
2617738342 ps |
T1151 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.544020262 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:45 AM UTC 24 |
180203615 ps |
T1152 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.1790598231 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:45 AM UTC 24 |
2042733523 ps |
T1153 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.3361422975 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
155175688 ps |
T155 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.273071751 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
378673292 ps |
T1154 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.198759607 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
208541518 ps |
T1155 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.862284929 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
155960888 ps |
T1156 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.4201813201 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
206634883 ps |
T1157 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.2454301816 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
298045107 ps |
T1158 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.3944037668 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
137761210 ps |
T1159 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.4062614136 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
146540081 ps |
T1160 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.2585825959 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
174662185 ps |
T1161 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.3924850093 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
1880798360 ps |
T1162 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.2655434378 |
|
|
Aug 29 09:39:38 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
2996828277 ps |
T1163 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.4218738579 |
|
|
Aug 29 09:39:40 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
1871697447 ps |
T1164 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.2133992287 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
2300028208 ps |
T1165 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/165.otp_ctrl_parallel_lc_esc.2224950366 |
|
|
Aug 29 09:38:58 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
17040477164 ps |
T140 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_stress_all_with_rand_reset.805884261 |
|
|
Aug 29 09:37:16 AM UTC 24 |
Aug 29 09:40:20 AM UTC 24 |
10911308712 ps |
T1166 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_stress_all_with_rand_reset.621833201 |
|
|
Aug 29 09:36:35 AM UTC 24 |
Aug 29 09:40:21 AM UTC 24 |
73576168167 ps |
T1167 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_stress_all.2581682473 |
|
|
Aug 29 09:35:12 AM UTC 24 |
Aug 29 09:40:55 AM UTC 24 |
65413024818 ps |
T1168 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_stress_all.293823567 |
|
|
Aug 29 09:31:42 AM UTC 24 |
Aug 29 09:45:20 AM UTC 24 |
66552015311 ps |
T1169 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3323494984 |
|
|
Aug 29 09:39:41 AM UTC 24 |
Aug 29 09:39:46 AM UTC 24 |
59271729 ps |
T1170 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.808488382 |
|
|
Aug 29 09:39:44 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
74880380 ps |
T1171 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1576620345 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:47 AM UTC 24 |
67765592 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3440544280 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
98187879 ps |
T1172 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2204191390 |
|
|
Aug 29 09:39:44 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
140971068 ps |
T264 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.854837765 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
68683538 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1123802809 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
75670883 ps |
T1173 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2095579298 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
36372227 ps |
T1174 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.833356488 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
508091360 ps |
T1175 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.858808867 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:48 AM UTC 24 |
575266169 ps |
T282 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.2661801606 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:49 AM UTC 24 |
251557308 ps |
T365 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1865204970 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:49 AM UTC 24 |
282641156 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.3427732520 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:49 AM UTC 24 |
282799596 ps |
T1176 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2452397235 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:50 AM UTC 24 |
86748613 ps |
T1177 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.227431433 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:50 AM UTC 24 |
41024983 ps |
T288 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.1569131560 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:50 AM UTC 24 |
41582256 ps |
T1178 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.2111037631 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:50 AM UTC 24 |
76144007 ps |
T1179 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.1830572781 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:50 AM UTC 24 |
72781710 ps |
T265 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.3097349650 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
134776354 ps |
T367 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1116621516 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
75010653 ps |
T1180 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.687128526 |
|
|
Aug 29 09:39:48 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
73478901 ps |
T1181 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.2341866193 |
|
|
Aug 29 09:39:48 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
35977095 ps |
T262 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.587456480 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
166442521 ps |
T263 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.970129995 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
156046486 ps |
T1182 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.921474278 |
|
|
Aug 29 09:39:48 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
100611709 ps |
T283 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2643878107 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:51 AM UTC 24 |
177020683 ps |
T284 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2251823804 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:52 AM UTC 24 |
41988364 ps |
T285 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3569824604 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:52 AM UTC 24 |
70849744 ps |
T366 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1028589592 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:52 AM UTC 24 |
281778395 ps |
T289 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.2451368558 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
42307077 ps |
T304 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.315146951 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
3032256838 ps |
T286 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.36742082 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
94875084 ps |
T1183 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.2768668994 |
|
|
Aug 29 09:39:48 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
64444130 ps |
T1184 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.3423722360 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
146251110 ps |
T1185 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.2303857946 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
131338329 ps |
T1186 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.242936541 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
37048117 ps |
T1187 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.1321653686 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
140626212 ps |
T290 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3061438171 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
158572316 ps |
T1188 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.4080676130 |
|
|
Aug 29 09:39:51 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
139063220 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.259138542 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:53 AM UTC 24 |
469623156 ps |
T1189 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.1891740364 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
65759445 ps |
T1190 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.2271342985 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
1761287548 ps |
T1191 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.4207673996 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
75482683 ps |
T1192 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2486000668 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
1672199589 ps |
T1193 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3374179687 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:40:00 AM UTC 24 |
303610300 ps |
T1194 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.1431700621 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
2984607339 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.3130308798 |
|
|
Aug 29 09:39:51 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
92635057 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.1754742324 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:54 AM UTC 24 |
433698014 ps |
T302 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3725831697 |
|
|
Aug 29 09:39:51 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
54921666 ps |
T1195 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.713149164 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
100107802 ps |
T1196 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.108432479 |
|
|
Aug 29 09:39:51 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
212713655 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.2084955701 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
1557035083 ps |
T1197 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.1914626150 |
|
|
Aug 29 09:39:51 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
55091078 ps |
T294 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.74407852 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
42522679 ps |
T1198 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.2177990623 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:39:55 AM UTC 24 |
158046642 ps |
T1199 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.2039865423 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
43520353 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1607582259 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
69875452 ps |
T1200 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.2403905375 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:39:56 AM UTC 24 |
324719158 ps |
T1201 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.2074492118 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
133814789 ps |
T1202 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.3918264393 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:56 AM UTC 24 |
128564690 ps |
T1203 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1399596947 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:39:56 AM UTC 24 |
1629339650 ps |
T1204 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.2813499615 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:57 AM UTC 24 |
36703318 ps |
T295 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.1069108788 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:57 AM UTC 24 |
84050552 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.1543546374 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:57 AM UTC 24 |
146318921 ps |
T1205 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3011890764 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
59864236 ps |
T1206 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.3882716499 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:39:57 AM UTC 24 |
458451422 ps |
T1207 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.2359821955 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:58 AM UTC 24 |
113893109 ps |
T1208 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.2920822203 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
378932804 ps |
T258 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1612531828 |
|
|
Aug 29 09:39:47 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
675119060 ps |
T1209 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.3887492191 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
195577296 ps |
T297 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2293357861 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
842201879 ps |
T1210 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.4165950996 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
836066535 ps |
T1211 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.2861513692 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
122863710 ps |
T1212 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.1946886287 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:39:59 AM UTC 24 |
282728641 ps |
T1213 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.3847179879 |
|
|
Aug 29 09:39:54 AM UTC 24 |
Aug 29 09:40:00 AM UTC 24 |
183656129 ps |
T1214 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2370203550 |
|
|
Aug 29 09:39:56 AM UTC 24 |
Aug 29 09:40:00 AM UTC 24 |
189199605 ps |
T1215 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.217779379 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:00 AM UTC 24 |
68547983 ps |
T1216 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.3990338339 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:01 AM UTC 24 |
42560202 ps |
T1217 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.4245218456 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:01 AM UTC 24 |
181259758 ps |
T1218 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.507109208 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:01 AM UTC 24 |
417772751 ps |
T1219 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3353010216 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
193966791 ps |
T1220 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2751315568 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
181871085 ps |
T1221 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3158380852 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
501113832 ps |
T1222 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2745751903 |
|
|
Aug 29 09:39:57 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
304393672 ps |
T1223 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1335578333 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
68905291 ps |
T1224 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.3031973887 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
43088827 ps |
T298 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.359794626 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:02 AM UTC 24 |
61623816 ps |
T1225 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.4288862017 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:03 AM UTC 24 |
66799098 ps |
T1226 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.2184886417 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:03 AM UTC 24 |
79855553 ps |
T1227 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.4208152386 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:03 AM UTC 24 |
130324391 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2393895181 |
|
|
Aug 29 09:39:52 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
636917283 ps |
T1228 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.82285130 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
117762332 ps |
T1229 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.670078520 |
|
|
Aug 29 09:39:49 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
6864315149 ps |
T1230 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2247988794 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
42048279 ps |
T1231 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1004325462 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
242443733 ps |
T299 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.163928546 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
49034257 ps |
T1232 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.31525939 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
42880559 ps |
T1233 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.83313627 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
169515239 ps |
T1234 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.1920831584 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:04 AM UTC 24 |
1666846954 ps |
T1235 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.1375225059 |
|
|
Aug 29 09:40:02 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
69247269 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.166690762 |
|
|
Aug 29 09:39:45 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
1249004041 ps |
T1236 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.4213238681 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
58740037 ps |
T1237 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.2134570108 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
168300968 ps |
T300 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3892768698 |
|
|
Aug 29 09:40:02 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
44410974 ps |
T1238 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2792258148 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:05 AM UTC 24 |
223315124 ps |
T1239 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1394109784 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
75129066 ps |
T270 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.261924641 |
|
|
Aug 29 09:39:44 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
1795939174 ps |
T1240 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.744044879 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
165220659 ps |
T1241 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2977278141 |
|
|
Aug 29 09:39:59 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
266099561 ps |
T1242 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.4273702821 |
|
|
Aug 29 09:40:02 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
407902797 ps |
T1243 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3205128930 |
|
|
Aug 29 09:40:01 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
114525704 ps |
T271 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1097859043 |
|
|
Aug 29 09:39:55 AM UTC 24 |
Aug 29 09:40:06 AM UTC 24 |
1226093851 ps |
T1244 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1689024825 |
|
|
Aug 29 09:40:04 AM UTC 24 |
Aug 29 09:40:07 AM UTC 24 |
144938526 ps |
T1245 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.3983533979 |
|
|
Aug 29 09:40:04 AM UTC 24 |
Aug 29 09:40:07 AM UTC 24 |
41921936 ps |
T1246 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.3189069925 |
|
|
Aug 29 09:40:04 AM UTC 24 |
Aug 29 09:40:07 AM UTC 24 |
40312770 ps |
T1247 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.574185905 |
|
|
Aug 29 09:40:02 AM UTC 24 |
Aug 29 09:40:07 AM UTC 24 |
132134782 ps |
T1248 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.1262824447 |
|
|
Aug 29 09:40:04 AM UTC 24 |
Aug 29 09:40:07 AM UTC 24 |
253748934 ps |
T1249 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.1852601521 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:08 AM UTC 24 |
38663158 ps |
T1250 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1795248212 |
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Aug 29 09:40:04 AM UTC 24 |
Aug 29 09:40:08 AM UTC 24 |
108244523 ps |
T1251 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.1658284182 |
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Aug 29 09:40:03 AM UTC 24 |
Aug 29 09:40:08 AM UTC 24 |
56849816 ps |
T1252 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.1531513860 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
38317562 ps |
T1253 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.561662198 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
90704109 ps |
T1254 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.1008618813 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
70321726 ps |
T1255 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/43.otp_ctrl_intr_test.2081534787 |
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Aug 29 09:40:11 AM UTC 24 |
Aug 29 09:40:13 AM UTC 24 |
80357890 ps |
T301 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.2456241326 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
68669745 ps |
T1256 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.3472355258 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
68819283 ps |
T350 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2471196925 |
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Aug 29 09:39:48 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
1391322253 ps |
T1257 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3809903652 |
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Aug 29 09:40:05 AM UTC 24 |
Aug 29 09:40:09 AM UTC 24 |
121227766 ps |
T1258 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/21.otp_ctrl_intr_test.752095730 |
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Aug 29 09:40:07 AM UTC 24 |
Aug 29 09:40:10 AM UTC 24 |
573610392 ps |
T1259 |
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/22.otp_ctrl_intr_test.3303850756 |
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Aug 29 09:40:07 AM UTC 24 |
Aug 29 09:40:10 AM UTC 24 |
581418555 ps |