Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.70 93.76 96.20 95.67 90.69 97.00 96.28 93.28


Total tests in report: 1293
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
70.34 70.34 88.75 88.75 80.55 80.55 57.91 57.91 53.70 53.70 83.71 83.71 89.30 89.30 38.46 38.46 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.1182396005
76.26 5.92 88.90 0.15 81.96 1.42 73.26 15.35 55.37 1.67 84.66 0.95 89.98 0.68 59.69 21.23 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.1609354384
80.69 4.43 90.99 2.09 91.23 9.27 74.85 1.59 58.47 3.10 91.19 6.53 90.86 0.88 67.26 7.58 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.2804474526
83.06 2.36 91.07 0.08 91.88 0.65 86.16 11.30 59.19 0.72 91.47 0.29 90.86 0.00 70.76 3.50 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.1377759570
84.80 1.74 91.79 0.72 92.67 0.80 88.60 2.44 62.53 3.34 92.62 1.14 91.20 0.34 74.20 3.43 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.327540506
85.93 1.13 91.82 0.03 92.75 0.07 90.12 1.53 66.35 3.82 92.71 0.10 91.27 0.07 76.48 2.29 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.1398781869
86.83 0.91 92.02 0.20 92.99 0.25 90.24 0.11 71.12 4.77 93.09 0.38 91.54 0.27 76.84 0.36 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.862895592
87.71 0.87 92.28 0.26 93.74 0.75 90.49 0.25 71.12 0.00 94.71 1.62 93.84 2.30 77.77 0.93 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3770051364
88.29 0.59 92.50 0.21 93.79 0.05 90.51 0.02 73.51 2.39 94.95 0.24 94.11 0.27 78.70 0.93 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.3657281500
88.79 0.50 92.50 0.00 93.81 0.02 91.55 1.05 74.70 1.19 94.95 0.00 94.11 0.00 79.91 1.22 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.2552804100
89.17 0.38 92.58 0.08 93.94 0.12 91.61 0.06 76.13 1.43 95.09 0.14 94.11 0.00 80.70 0.79 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.3138251020
89.51 0.35 92.58 0.00 94.04 0.10 92.79 1.18 76.13 0.00 95.09 0.00 94.11 0.00 81.84 1.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.2676978039
89.86 0.35 92.67 0.10 94.14 0.10 92.79 0.00 78.04 1.91 95.33 0.24 94.11 0.00 81.92 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.3944037668
90.17 0.31 92.69 0.02 94.31 0.17 92.79 0.00 78.04 0.00 95.38 0.05 94.11 0.00 83.85 1.93 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3255481920
90.47 0.30 92.74 0.05 94.43 0.12 93.12 0.33 79.47 1.43 95.43 0.05 94.11 0.00 83.99 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.446749477
90.74 0.27 92.74 0.00 94.48 0.05 93.12 0.00 79.71 0.24 95.43 0.00 94.99 0.88 84.70 0.71 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_stress_all_with_rand_reset.2151158069
90.97 0.23 92.74 0.00 94.58 0.10 94.12 1.00 79.71 0.00 95.43 0.00 94.99 0.00 85.20 0.50 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.610792712
91.19 0.22 92.84 0.10 94.66 0.07 94.15 0.03 80.43 0.72 95.62 0.19 94.99 0.00 85.63 0.43 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_check_fail.3821179617
91.39 0.20 92.84 0.00 94.71 0.05 94.15 0.00 80.43 0.00 95.62 0.00 96.01 1.02 85.99 0.36 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2251823804
91.56 0.16 92.92 0.08 94.73 0.02 94.17 0.02 80.91 0.48 95.66 0.05 96.01 0.00 86.49 0.50 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_stress_all_with_rand_reset.2276956786
91.71 0.15 92.92 0.00 94.73 0.00 94.19 0.02 81.38 0.48 95.66 0.00 96.01 0.00 87.06 0.57 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_stress_all.824538517
91.85 0.14 92.97 0.05 94.76 0.02 94.25 0.06 81.86 0.48 95.71 0.05 96.01 0.00 87.42 0.36 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.2597653012
91.99 0.14 93.02 0.05 94.78 0.02 94.33 0.08 82.58 0.72 95.76 0.05 96.01 0.00 87.49 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.1079195441
92.13 0.14 93.08 0.07 94.83 0.05 94.33 0.00 83.29 0.72 95.90 0.14 96.01 0.00 87.49 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_init_fail.173797326
92.27 0.13 93.13 0.05 94.88 0.05 94.33 0.00 84.01 0.72 95.95 0.05 96.01 0.00 87.56 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.664362398
92.39 0.12 93.13 0.00 94.88 0.00 94.33 0.00 84.01 0.00 95.95 0.00 96.01 0.00 88.42 0.86 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_stress_all_with_rand_reset.1846890685
92.51 0.12 93.13 0.00 94.91 0.02 94.50 0.17 84.49 0.48 95.95 0.00 96.01 0.00 88.56 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.2176341723
92.61 0.10 93.18 0.05 94.93 0.02 94.50 0.00 84.96 0.48 96.05 0.10 96.01 0.00 88.63 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.2686254390
92.71 0.10 93.18 0.00 94.93 0.00 94.50 0.00 85.44 0.48 96.05 0.00 96.01 0.00 88.85 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_stress_all.1611269257
92.80 0.10 93.23 0.05 94.96 0.02 94.50 0.00 85.92 0.48 96.09 0.05 96.01 0.00 88.92 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/129.otp_ctrl_init_fail.497631134
92.90 0.10 93.28 0.05 94.98 0.02 94.50 0.00 86.40 0.48 96.14 0.05 96.01 0.00 88.99 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/143.otp_ctrl_init_fail.656298450
92.99 0.09 93.33 0.05 95.01 0.02 94.50 0.00 86.87 0.48 96.24 0.10 96.01 0.00 88.99 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_init_fail.3691165583
93.07 0.08 93.33 0.00 95.01 0.00 94.58 0.08 87.35 0.48 96.24 0.00 96.01 0.00 88.99 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.2921649795
93.15 0.08 93.36 0.03 95.01 0.00 94.58 0.00 87.83 0.48 96.28 0.05 96.01 0.00 88.99 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.3168622755
93.23 0.08 93.36 0.00 95.28 0.27 94.64 0.06 87.83 0.00 96.28 0.00 96.01 0.00 89.21 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.3430590905
93.30 0.07 93.36 0.00 95.28 0.00 94.73 0.09 87.83 0.00 96.28 0.00 96.01 0.00 89.64 0.43 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3052476320
93.38 0.07 93.36 0.00 95.28 0.00 95.00 0.27 87.83 0.00 96.52 0.24 96.01 0.00 89.64 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_sec_cm.1122908972
93.44 0.07 93.36 0.00 95.28 0.00 95.00 0.00 88.31 0.48 96.52 0.00 96.01 0.00 89.64 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_parallel_lc_esc.1520129489
93.51 0.06 93.36 0.00 95.28 0.00 95.00 0.00 88.54 0.24 96.52 0.00 96.01 0.00 89.85 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_stress_all.3955681765
93.57 0.06 93.43 0.07 95.30 0.02 95.00 0.00 88.78 0.24 96.62 0.10 96.01 0.00 89.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_init_fail.2838786850
93.63 0.06 93.43 0.00 95.30 0.00 95.04 0.04 89.02 0.24 96.62 0.00 96.01 0.00 89.99 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.516762308
93.69 0.06 93.46 0.03 95.35 0.05 95.06 0.02 89.02 0.00 96.71 0.10 96.01 0.00 90.21 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_check_fail.3916936535
93.74 0.05 93.46 0.00 95.35 0.00 95.09 0.03 89.02 0.00 96.71 0.00 96.01 0.00 90.56 0.36 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.1141648931
93.79 0.05 93.48 0.02 95.38 0.02 95.09 0.00 89.26 0.24 96.76 0.05 96.01 0.00 90.56 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_init_fail.3769259408
93.84 0.05 93.51 0.03 95.38 0.00 95.09 0.00 89.50 0.24 96.81 0.05 96.01 0.00 90.56 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.3967039943
93.88 0.04 93.51 0.00 95.40 0.02 95.09 0.00 89.50 0.00 96.81 0.00 96.01 0.00 90.85 0.29 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.2449045723
93.92 0.04 93.51 0.00 95.40 0.00 95.09 0.00 89.74 0.24 96.81 0.00 96.01 0.00 90.92 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_stress_all_with_rand_reset.846255056
93.97 0.04 93.51 0.00 95.40 0.00 95.09 0.00 89.98 0.24 96.81 0.00 96.01 0.00 90.99 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_parallel_lc_esc.2164845328
94.01 0.04 93.51 0.00 95.43 0.02 95.09 0.00 89.98 0.00 96.81 0.00 96.14 0.14 91.14 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.587456480
94.05 0.04 93.51 0.00 95.43 0.00 95.09 0.00 89.98 0.00 96.81 0.00 96.14 0.00 91.42 0.29 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_stress_all_with_rand_reset.1211935896
94.09 0.03 93.51 0.00 95.43 0.00 95.12 0.03 89.98 0.00 96.81 0.00 96.14 0.00 91.64 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.4005160469
94.12 0.03 93.51 0.00 95.45 0.02 95.12 0.00 89.98 0.00 96.81 0.00 96.14 0.00 91.85 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_stress_all_with_rand_reset.3607130417
94.16 0.03 93.51 0.00 95.45 0.00 95.12 0.00 90.21 0.24 96.81 0.00 96.14 0.00 91.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_parallel_lc_esc.1607836381
94.19 0.03 93.51 0.00 95.45 0.00 95.12 0.00 90.45 0.24 96.81 0.00 96.14 0.00 91.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/109.otp_ctrl_parallel_lc_esc.1915144815
94.22 0.03 93.51 0.00 95.45 0.00 95.12 0.00 90.69 0.24 96.81 0.00 96.14 0.00 91.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_lc_esc.379455630
94.25 0.03 93.51 0.00 95.45 0.00 95.12 0.00 90.69 0.00 96.81 0.00 96.14 0.00 92.07 0.21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.562754481
94.28 0.03 93.54 0.03 95.45 0.00 95.22 0.11 90.69 0.00 96.86 0.05 96.14 0.00 92.07 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.833329341
94.31 0.02 93.54 0.00 95.45 0.00 95.25 0.03 90.69 0.00 96.86 0.00 96.14 0.00 92.21 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.2294729597
94.33 0.02 93.59 0.05 95.48 0.02 95.29 0.04 90.69 0.00 96.90 0.05 96.14 0.00 92.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.2460640361
94.35 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.14 0.00 92.35 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2393895181
94.37 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.14 0.00 92.49 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_stress_all_with_rand_reset.2072312464
94.39 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.14 0.00 92.64 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_regwen.411719339
94.41 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.14 0.00 92.78 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all.3391067337
94.43 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.14 0.00 92.92 0.14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_stress_all_with_rand_reset.1402760686
94.45 0.02 93.59 0.00 95.48 0.00 95.29 0.00 90.69 0.00 96.90 0.00 96.21 0.07 92.99 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.1069108788
94.47 0.02 93.59 0.00 95.48 0.00 95.34 0.05 90.69 0.00 96.90 0.00 96.21 0.00 93.07 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all.1464030516
94.48 0.02 93.59 0.00 95.48 0.00 95.37 0.03 90.69 0.00 96.90 0.00 96.21 0.00 93.14 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all_with_rand_reset.2543952679
94.50 0.01 93.64 0.05 95.48 0.00 95.38 0.01 90.69 0.00 96.95 0.05 96.21 0.00 93.14 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_check_fail.2704061955
94.51 0.01 93.64 0.00 95.48 0.00 95.40 0.02 90.69 0.00 96.95 0.00 96.21 0.00 93.21 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.758714103
94.52 0.01 93.67 0.03 95.48 0.00 95.40 0.00 90.69 0.00 97.00 0.05 96.21 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.2827862969
94.53 0.01 93.71 0.03 95.48 0.00 95.40 0.00 90.69 0.00 97.05 0.05 96.21 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.1134646593
94.55 0.01 93.74 0.03 95.48 0.00 95.40 0.00 90.69 0.00 97.09 0.05 96.21 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/128.otp_ctrl_init_fail.2672502007
94.56 0.01 93.74 0.00 95.48 0.00 95.40 0.00 90.69 0.00 97.09 0.00 96.21 0.00 93.28 0.07 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2100643275
94.57 0.01 93.74 0.00 95.48 0.00 95.40 0.00 90.69 0.00 97.09 0.00 96.28 0.07 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_stress_all_with_rand_reset.3413938271
94.57 0.01 93.74 0.00 95.48 0.00 95.46 0.07 90.69 0.00 97.09 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.434162002
94.58 0.01 93.74 0.00 95.48 0.00 95.46 0.00 90.69 0.00 97.14 0.05 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.4284823879
94.59 0.01 93.74 0.00 95.48 0.00 95.51 0.05 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.2100382054
94.59 0.01 93.74 0.00 95.48 0.00 95.55 0.04 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/115.otp_ctrl_init_fail.917645691
94.60 0.01 93.74 0.00 95.48 0.00 95.59 0.04 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_init_fail.1948684442
94.60 0.01 93.74 0.00 95.48 0.00 95.62 0.03 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.874802252
94.61 0.01 93.74 0.00 95.50 0.02 95.62 0.00 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.325326456
94.61 0.01 93.74 0.00 95.53 0.02 95.62 0.00 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.2789719823
94.61 0.01 93.74 0.00 95.55 0.02 95.62 0.00 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_init_fail.4025611643
94.62 0.01 93.74 0.00 95.58 0.02 95.62 0.00 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all_with_rand_reset.1263065046
94.62 0.01 93.74 0.00 95.60 0.02 95.62 0.00 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_stress_all_with_rand_reset.3578418489
94.62 0.01 93.74 0.00 95.60 0.00 95.64 0.02 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.2799101799
94.63 0.01 93.74 0.00 95.60 0.00 95.65 0.01 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.3955464222
94.63 0.01 93.74 0.00 95.60 0.00 95.66 0.01 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.2851023514
94.63 0.01 93.74 0.00 95.60 0.00 95.67 0.01 90.69 0.00 97.14 0.00 96.28 0.00 93.28 0.00 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_parallel_lc_esc.611064773

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.315146951
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.854837765
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1865204970
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3440544280
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2204191390
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1576620345
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.808488382
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.3427732520
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3323494984
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.261924641
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.1431700621
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1399596947
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.2661801606
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1116621516
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1123802809
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.858808867
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.833356488
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2095579298
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.3097349650
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2452397235
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.166690762
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.507109208
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3011890764
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.2039865423
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2370203550
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3158380852
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1097859043
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.3353010216
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.3990338339
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.217779379
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.4245218456
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2751315568
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.113308474
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.2184886417
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.4288862017
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.3031973887
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.82285130
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2745751903
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.1920831584
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.359794626
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.1335578333
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2977278141
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1004325462
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.1990098937
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.2134570108
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.31525939
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.4208152386
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.4213238681
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2792258148
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1524175091
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1394109784
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.163928546
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2247988794
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.83313627
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.744044879
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.2733145486
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.4273702821
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3892768698
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.1375225059
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.574185905
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3205128930
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.1936901529
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.1262824447
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.3983533979
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1689024825
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1795248212
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.1658284182
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.1008618813
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.1531513860
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.3189069925
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3809903652
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3418417006
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.738755540
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.3472355258
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.2456241326
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.1852601521
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.561662198
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_errors.2304956895
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.1298000226
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.259138542
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3061438171
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2643878107
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1028589592
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.1569131560
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.2111037631
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.1830572781
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.227431433
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.970129995
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2486000668
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1612531828
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/20.otp_ctrl_intr_test.292361071
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/21.otp_ctrl_intr_test.752095730
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/22.otp_ctrl_intr_test.3303850756
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/23.otp_ctrl_intr_test.935418277
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/24.otp_ctrl_intr_test.4091499290
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/25.otp_ctrl_intr_test.3347452520
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/26.otp_ctrl_intr_test.2009662212
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/27.otp_ctrl_intr_test.4194148022
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/28.otp_ctrl_intr_test.3038057702
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/29.otp_ctrl_intr_test.2177461144
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.2271342985
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2293357861
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3569824604
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.4207673996
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.921474278
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.2341866193
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.687128526
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.36742082
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.2768668994
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2471196925
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/30.otp_ctrl_intr_test.990544001
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/cover_reg_top/31.otp_ctrl_intr_test.2154042135
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/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_parallel_lc_esc.3857849357
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_stress_all_with_rand_reset.1845649954
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_init_fail.2776014715
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_parallel_lc_esc.3964754772
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_stress_all_with_rand_reset.3987628361
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_init_fail.2470600140
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_parallel_lc_esc.4260277340
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_init_fail.3500621330
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_stress_all_with_rand_reset.439225705
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_init_fail.2078786603
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_parallel_lc_esc.1536443821
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_stress_all_with_rand_reset.2821938670
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_init_fail.1007985029
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_parallel_lc_esc.1347990835
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_stress_all_with_rand_reset.1420725065
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.724345702
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.665130729
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.831902408
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.1184683699
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2678342981
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.1635721015
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.1541033139
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.1276367764
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.2603232744
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.191681859
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.2503563559
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.523655165
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_init_fail.1949747135
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_parallel_lc_esc.1484286123
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_init_fail.1635843778
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_parallel_lc_esc.1742174633
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.2978630622
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_init_fail.15507590
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_parallel_lc_esc.1201063149
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_stress_all_with_rand_reset.805884261
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_init_fail.3242590194
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_parallel_lc_esc.2813929205
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.3601288879
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_init_fail.233778896
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_parallel_lc_esc.3938346802
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.2779283163
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_init_fail.1114968728
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_parallel_lc_esc.1127246032
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_init_fail.1489721257
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_parallel_lc_esc.1499101131
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_init_fail.2380715635
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_parallel_lc_esc.1022343897
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_init_fail.1174021248
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_parallel_lc_esc.447625645
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_init_fail.2335053712
/workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_parallel_lc_esc.2784889375



Total test records in report: 1293
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.4284823879 Aug 29 09:16:38 AM UTC 24 Aug 29 09:16:42 AM UTC 24 63494896 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.3923481392 Aug 29 09:16:42 AM UTC 24 Aug 29 09:16:53 AM UTC 24 216486369 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.446749477 Aug 29 09:17:05 AM UTC 24 Aug 29 09:17:13 AM UTC 24 289964633 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.1288618575 Aug 29 09:16:47 AM UTC 24 Aug 29 09:17:17 AM UTC 24 654870706 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.1226651305 Aug 29 09:16:55 AM UTC 24 Aug 29 09:17:22 AM UTC 24 6890542867 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.4216630805 Aug 29 09:17:10 AM UTC 24 Aug 29 09:17:28 AM UTC 24 944108507 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.830834120 Aug 29 09:17:14 AM UTC 24 Aug 29 09:17:31 AM UTC 24 520517467 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.1150332067 Aug 29 09:17:21 AM UTC 24 Aug 29 09:17:34 AM UTC 24 597884104 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.816534865 Aug 29 09:17:21 AM UTC 24 Aug 29 09:17:45 AM UTC 24 6866534998 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.1182396005 Aug 29 09:17:28 AM UTC 24 Aug 29 09:17:45 AM UTC 24 12300199059 ps
T102 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.2677976234 Aug 29 09:17:46 AM UTC 24 Aug 29 09:17:52 AM UTC 24 192359764 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.2925264125 Aug 29 09:17:22 AM UTC 24 Aug 29 09:18:10 AM UTC 24 1449280508 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.3430590905 Aug 29 09:18:12 AM UTC 24 Aug 29 09:18:16 AM UTC 24 75799919 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.327540506 Aug 29 09:17:46 AM UTC 24 Aug 29 09:18:16 AM UTC 24 2511912016 ps
T103 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.4053131557 Aug 29 09:17:32 AM UTC 24 Aug 29 09:18:19 AM UTC 24 1210704703 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.3620565513 Aug 29 09:18:17 AM UTC 24 Aug 29 09:18:26 AM UTC 24 477186896 ps
T104 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3518698980 Aug 29 09:18:17 AM UTC 24 Aug 29 09:18:27 AM UTC 24 215549200 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.610792712 Aug 29 09:17:35 AM UTC 24 Aug 29 09:18:29 AM UTC 24 8737857427 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.2176341723 Aug 29 09:18:20 AM UTC 24 Aug 29 09:18:55 AM UTC 24 11128419515 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.3735170010 Aug 29 09:18:27 AM UTC 24 Aug 29 09:19:00 AM UTC 24 1462761412 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.1821084728 Aug 29 09:18:56 AM UTC 24 Aug 29 09:19:01 AM UTC 24 301905428 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.3253982956 Aug 29 09:18:28 AM UTC 24 Aug 29 09:19:16 AM UTC 24 4708980226 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.4114996833 Aug 29 09:19:01 AM UTC 24 Aug 29 09:19:18 AM UTC 24 460312708 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.2799101799 Aug 29 09:19:15 AM UTC 24 Aug 29 09:19:30 AM UTC 24 252051765 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.3475125880 Aug 29 09:18:47 AM UTC 24 Aug 29 09:19:34 AM UTC 24 18009743326 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.1301254759 Aug 29 09:19:44 AM UTC 24 Aug 29 09:19:48 AM UTC 24 206425088 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.1752124810 Aug 29 09:19:49 AM UTC 24 Aug 29 09:19:59 AM UTC 24 743808804 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.2726880605 Aug 29 09:19:02 AM UTC 24 Aug 29 09:20:00 AM UTC 24 19980738446 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.1643121981 Aug 29 09:19:17 AM UTC 24 Aug 29 09:20:06 AM UTC 24 3528546397 ps
T108 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.477820993 Aug 29 09:18:31 AM UTC 24 Aug 29 09:20:06 AM UTC 24 5137358106 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.862895592 Aug 29 09:20:01 AM UTC 24 Aug 29 09:20:08 AM UTC 24 333393144 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.52422194 Aug 29 09:20:17 AM UTC 24 Aug 29 09:20:27 AM UTC 24 469483545 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.206327899 Aug 29 09:20:12 AM UTC 24 Aug 29 09:20:29 AM UTC 24 394091880 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.2100382054 Aug 29 09:20:01 AM UTC 24 Aug 29 09:20:30 AM UTC 24 1686775780 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3368915535 Aug 29 09:20:17 AM UTC 24 Aug 29 09:20:33 AM UTC 24 734346454 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.3262691765 Aug 29 09:20:13 AM UTC 24 Aug 29 09:20:37 AM UTC 24 473673902 ps
T61 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.2597653012 Aug 29 09:20:17 AM UTC 24 Aug 29 09:20:38 AM UTC 24 1320540480 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.2505947107 Aug 29 09:20:39 AM UTC 24 Aug 29 09:20:43 AM UTC 24 67609265 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.2664572632 Aug 29 09:20:25 AM UTC 24 Aug 29 09:20:44 AM UTC 24 3384034205 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.3001227123 Aug 29 09:20:12 AM UTC 24 Aug 29 09:20:44 AM UTC 24 7245324859 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all_with_rand_reset.2158026921 Aug 29 09:19:18 AM UTC 24 Aug 29 09:20:45 AM UTC 24 1871924112 ps
T211 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.3208299991 Aug 29 09:20:39 AM UTC 24 Aug 29 09:20:46 AM UTC 24 124956851 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.3240408435 Aug 29 09:20:44 AM UTC 24 Aug 29 09:20:50 AM UTC 24 367199797 ps
T193 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.2511071017 Aug 29 09:20:47 AM UTC 24 Aug 29 09:20:55 AM UTC 24 639027116 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.3903577608 Aug 29 09:20:28 AM UTC 24 Aug 29 09:20:56 AM UTC 24 6011014133 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.3486404251 Aug 29 09:20:47 AM UTC 24 Aug 29 09:20:56 AM UTC 24 467051985 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.459036479 Aug 29 09:20:45 AM UTC 24 Aug 29 09:20:58 AM UTC 24 857324725 ps
T195 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.897934397 Aug 29 09:20:59 AM UTC 24 Aug 29 09:21:08 AM UTC 24 407275217 ps
T112 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.1819531147 Aug 29 09:20:45 AM UTC 24 Aug 29 09:21:12 AM UTC 24 1831054549 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.1357708990 Aug 29 09:20:13 AM UTC 24 Aug 29 09:21:16 AM UTC 24 2913053304 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.516762308 Aug 29 09:20:56 AM UTC 24 Aug 29 09:21:17 AM UTC 24 563725208 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.2216972503 Aug 29 09:21:09 AM UTC 24 Aug 29 09:21:24 AM UTC 24 445777193 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.1609354384 Aug 29 09:18:00 AM UTC 24 Aug 29 09:21:26 AM UTC 24 6002189464 ps
T416 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.381309049 Aug 29 09:21:25 AM UTC 24 Aug 29 09:21:29 AM UTC 24 75009814 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.780363127 Aug 29 09:20:51 AM UTC 24 Aug 29 09:21:35 AM UTC 24 4091380946 ps
T417 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.4211514250 Aug 29 09:21:29 AM UTC 24 Aug 29 09:21:35 AM UTC 24 300829050 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.1079195441 Aug 29 09:21:30 AM UTC 24 Aug 29 09:21:43 AM UTC 24 2425483020 ps
T202 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.1141648931 Aug 29 09:20:58 AM UTC 24 Aug 29 09:21:44 AM UTC 24 3548927783 ps
T113 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.1398781869 Aug 29 09:19:31 AM UTC 24 Aug 29 09:21:46 AM UTC 24 4676286094 ps
T119 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.3864089041 Aug 29 09:21:38 AM UTC 24 Aug 29 09:21:47 AM UTC 24 194814982 ps
T399 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.1092354243 Aug 29 09:21:37 AM UTC 24 Aug 29 09:21:51 AM UTC 24 1388758047 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.2804474526 Aug 29 09:20:30 AM UTC 24 Aug 29 09:22:03 AM UTC 24 24439131170 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.1209738550 Aug 29 09:21:45 AM UTC 24 Aug 29 09:22:03 AM UTC 24 2943429684 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.2652490778 Aug 29 09:21:49 AM UTC 24 Aug 29 09:22:04 AM UTC 24 1483285931 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.1807687223 Aug 29 09:21:59 AM UTC 24 Aug 29 09:22:06 AM UTC 24 382463203 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.1641022506 Aug 29 09:21:45 AM UTC 24 Aug 29 09:22:08 AM UTC 24 7018979918 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.4034858487 Aug 29 09:21:38 AM UTC 24 Aug 29 09:22:10 AM UTC 24 812487207 ps
T418 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.3558508483 Aug 29 09:22:09 AM UTC 24 Aug 29 09:22:13 AM UTC 24 570652229 ps
T237 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.2933357010 Aug 29 09:21:51 AM UTC 24 Aug 29 09:22:13 AM UTC 24 1178438493 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.1983156057 Aug 29 09:22:12 AM UTC 24 Aug 29 09:22:19 AM UTC 24 418367918 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.3234053261 Aug 29 09:22:14 AM UTC 24 Aug 29 09:22:20 AM UTC 24 225122116 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.1623292853 Aug 29 09:22:09 AM UTC 24 Aug 29 09:22:21 AM UTC 24 3440258825 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.579241782 Aug 29 09:20:56 AM UTC 24 Aug 29 09:22:29 AM UTC 24 14462558900 ps
T204 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.3627117930 Aug 29 09:22:14 AM UTC 24 Aug 29 09:22:30 AM UTC 24 1443175684 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.749929718 Aug 29 09:22:26 AM UTC 24 Aug 29 09:22:34 AM UTC 24 195205762 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all_with_rand_reset.1048961387 Aug 29 09:21:13 AM UTC 24 Aug 29 09:22:38 AM UTC 24 1771282870 ps
T205 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.2125650758 Aug 29 09:22:05 AM UTC 24 Aug 29 09:22:40 AM UTC 24 3326579145 ps
T255 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.4030496871 Aug 29 09:22:20 AM UTC 24 Aug 29 09:22:40 AM UTC 24 4175165191 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.2276285508 Aug 29 09:22:35 AM UTC 24 Aug 29 09:22:42 AM UTC 24 467320254 ps
T369 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.757225686 Aug 29 09:22:31 AM UTC 24 Aug 29 09:22:47 AM UTC 24 451399278 ps
T420 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.2370951401 Aug 29 09:22:43 AM UTC 24 Aug 29 09:22:47 AM UTC 24 99789173 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.1135123710 Aug 29 09:22:47 AM UTC 24 Aug 29 09:22:53 AM UTC 24 178239953 ps
T197 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.456187144 Aug 29 09:22:39 AM UTC 24 Aug 29 09:22:55 AM UTC 24 603782875 ps
T70 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.2685563600 Aug 29 09:21:49 AM UTC 24 Aug 29 09:22:59 AM UTC 24 9865452964 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.1183002277 Aug 29 09:22:22 AM UTC 24 Aug 29 09:23:00 AM UTC 24 2578699795 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.592701103 Aug 29 09:22:31 AM UTC 24 Aug 29 09:23:03 AM UTC 24 3596612668 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.3820564191 Aug 29 09:22:47 AM UTC 24 Aug 29 09:23:04 AM UTC 24 1350757248 ps
T151 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.4125951569 Aug 29 09:22:55 AM UTC 24 Aug 29 09:23:07 AM UTC 24 386463114 ps
T200 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.2572077894 Aug 29 09:22:59 AM UTC 24 Aug 29 09:23:17 AM UTC 24 3292377262 ps
T134 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.3382734935 Aug 29 09:22:52 AM UTC 24 Aug 29 09:23:23 AM UTC 24 2489442708 ps
T201 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.661732099 Aug 29 09:23:14 AM UTC 24 Aug 29 09:23:23 AM UTC 24 274383514 ps
T208 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.3933394555 Aug 29 09:23:01 AM UTC 24 Aug 29 09:23:25 AM UTC 24 545701428 ps
T222 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.758714103 Aug 29 09:23:08 AM UTC 24 Aug 29 09:23:30 AM UTC 24 414028919 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_sec_cm.1571215417 Aug 29 09:18:10 AM UTC 24 Aug 29 09:23:30 AM UTC 24 12396524258 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.2590329590 Aug 29 09:23:04 AM UTC 24 Aug 29 09:23:30 AM UTC 24 1043015386 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.3687716243 Aug 29 09:23:26 AM UTC 24 Aug 29 09:23:31 AM UTC 24 642874924 ps
T230 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.3875606926 Aug 29 09:22:54 AM UTC 24 Aug 29 09:23:31 AM UTC 24 2674951224 ps
T231 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.434162002 Aug 29 09:24:55 AM UTC 24 Aug 29 09:25:12 AM UTC 24 806841996 ps
T135 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all.1464030516 Aug 29 09:21:18 AM UTC 24 Aug 29 09:23:36 AM UTC 24 50361432006 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3770051364 Aug 29 09:19:35 AM UTC 24 Aug 29 09:23:36 AM UTC 24 14457835288 ps
T232 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.2124256856 Aug 29 09:22:21 AM UTC 24 Aug 29 09:23:37 AM UTC 24 18168459862 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.1377759570 Aug 29 09:20:32 AM UTC 24 Aug 29 09:23:37 AM UTC 24 4767461351 ps
T223 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.3554097463 Aug 29 09:23:18 AM UTC 24 Aug 29 09:23:40 AM UTC 24 1600769321 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.3297944992 Aug 29 09:23:32 AM UTC 24 Aug 29 09:23:40 AM UTC 24 512644757 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all_with_rand_reset.2647635158 Aug 29 09:22:42 AM UTC 24 Aug 29 09:23:42 AM UTC 24 4613202034 ps
T421 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.558481088 Aug 29 09:23:32 AM UTC 24 Aug 29 09:23:45 AM UTC 24 1320406994 ps
T390 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.125478193 Aug 29 09:23:32 AM UTC 24 Aug 29 09:23:45 AM UTC 24 704461326 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.4101289283 Aug 29 09:23:04 AM UTC 24 Aug 29 09:23:46 AM UTC 24 5859121911 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all.4285257997 Aug 29 09:23:24 AM UTC 24 Aug 29 09:23:50 AM UTC 24 2453447441 ps
T422 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.4100492388 Aug 29 09:23:46 AM UTC 24 Aug 29 09:23:50 AM UTC 24 211783791 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all.54456349 Aug 29 09:23:46 AM UTC 24 Aug 29 09:23:51 AM UTC 24 82183112 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.66669901 Aug 29 09:23:48 AM UTC 24 Aug 29 09:23:54 AM UTC 24 315468890 ps
T361 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.612504747 Aug 29 09:23:46 AM UTC 24 Aug 29 09:23:57 AM UTC 24 264915361 ps
T423 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.4034277350 Aug 29 09:23:48 AM UTC 24 Aug 29 09:24:00 AM UTC 24 3997182459 ps
T148 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.1331817291 Aug 29 09:23:52 AM UTC 24 Aug 29 09:24:02 AM UTC 24 298183513 ps
T372 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2760728191 Aug 29 09:23:46 AM UTC 24 Aug 29 09:24:03 AM UTC 24 1067297754 ps
T338 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.4074203558 Aug 29 09:23:40 AM UTC 24 Aug 29 09:24:03 AM UTC 24 3876476987 ps
T424 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.876076262 Aug 29 09:23:54 AM UTC 24 Aug 29 09:24:05 AM UTC 24 335493006 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.4230913601 Aug 29 09:23:57 AM UTC 24 Aug 29 09:24:06 AM UTC 24 421657622 ps
T181 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.2868559504 Aug 29 09:24:01 AM UTC 24 Aug 29 09:24:11 AM UTC 24 880308614 ps
T425 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.4266291423 Aug 29 09:24:04 AM UTC 24 Aug 29 09:24:13 AM UTC 24 122811675 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.4100612653 Aug 29 09:23:51 AM UTC 24 Aug 29 09:24:14 AM UTC 24 639314051 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.4096551536 Aug 29 09:23:33 AM UTC 24 Aug 29 09:24:15 AM UTC 24 966466385 ps
T426 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.702255503 Aug 29 09:24:12 AM UTC 24 Aug 29 09:24:16 AM UTC 24 131074457 ps
T370 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.1274663161 Aug 29 09:23:46 AM UTC 24 Aug 29 09:24:17 AM UTC 24 1765581071 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.3138251020 Aug 29 09:23:40 AM UTC 24 Aug 29 09:24:18 AM UTC 24 4067835754 ps
T427 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.191681859 Aug 29 09:24:14 AM UTC 24 Aug 29 09:24:20 AM UTC 24 203644421 ps
T156 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.3239915615 Aug 29 09:23:40 AM UTC 24 Aug 29 09:24:21 AM UTC 24 14376554283 ps
T386 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.4288583582 Aug 29 09:24:43 AM UTC 24 Aug 29 09:25:14 AM UTC 24 1186457668 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2678342981 Aug 29 09:24:16 AM UTC 24 Aug 29 09:24:23 AM UTC 24 157901530 ps
T378 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.3315686860 Aug 29 09:23:39 AM UTC 24 Aug 29 09:24:24 AM UTC 24 2637898824 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.3982860307 Aug 29 09:23:51 AM UTC 24 Aug 29 09:24:27 AM UTC 24 3243104703 ps
T428 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.2876564460 Aug 29 09:23:55 AM UTC 24 Aug 29 09:24:29 AM UTC 24 2337640522 ps
T225 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.3944054756 Aug 29 09:24:04 AM UTC 24 Aug 29 09:24:29 AM UTC 24 6439843567 ps
T405 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.665130729 Aug 29 09:24:17 AM UTC 24 Aug 29 09:24:30 AM UTC 24 728494803 ps
T429 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.1541033139 Aug 29 09:24:24 AM UTC 24 Aug 29 09:24:31 AM UTC 24 685607172 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.2603232744 Aug 29 09:24:27 AM UTC 24 Aug 29 09:24:35 AM UTC 24 325171643 ps
T430 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.1276367764 Aug 29 09:24:17 AM UTC 24 Aug 29 09:24:35 AM UTC 24 794010125 ps
T431 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.724345702 Aug 29 09:24:31 AM UTC 24 Aug 29 09:24:36 AM UTC 24 826445403 ps
T209 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.1635721015 Aug 29 09:24:24 AM UTC 24 Aug 29 09:24:36 AM UTC 24 258951394 ps
T432 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.2708497508 Aug 29 09:23:32 AM UTC 24 Aug 29 09:24:37 AM UTC 24 26201001788 ps
T250 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.2921649795 Aug 29 09:24:19 AM UTC 24 Aug 29 09:24:38 AM UTC 24 839442264 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.2460640361 Aug 29 09:24:22 AM UTC 24 Aug 29 09:24:41 AM UTC 24 586482935 ps
T433 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.526258437 Aug 29 09:24:31 AM UTC 24 Aug 29 09:24:42 AM UTC 24 238126760 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.2827862969 Aug 29 09:24:32 AM UTC 24 Aug 29 09:24:42 AM UTC 24 2465046161 ps
T434 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.3622326190 Aug 29 09:25:13 AM UTC 24 Aug 29 09:25:16 AM UTC 24 953739671 ps
T435 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.2679679276 Aug 29 09:24:37 AM UTC 24 Aug 29 09:24:44 AM UTC 24 169950342 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.1184683699 Aug 29 09:24:19 AM UTC 24 Aug 29 09:24:48 AM UTC 24 848950728 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.318941029 Aug 29 09:24:43 AM UTC 24 Aug 29 09:24:48 AM UTC 24 1626506149 ps
T247 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.1774815877 Aug 29 09:24:37 AM UTC 24 Aug 29 09:24:49 AM UTC 24 440646357 ps
T374 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.373631442 Aug 29 09:24:04 AM UTC 24 Aug 29 09:24:52 AM UTC 24 2481378935 ps
T375 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.2457875772 Aug 29 09:24:35 AM UTC 24 Aug 29 09:24:52 AM UTC 24 1054922291 ps
T436 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3166130472 Aug 29 09:24:49 AM UTC 24 Aug 29 09:24:53 AM UTC 24 232648050 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.1596529585 Aug 29 09:24:37 AM UTC 24 Aug 29 09:24:54 AM UTC 24 250953625 ps
T437 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.1614706249 Aug 29 09:24:49 AM UTC 24 Aug 29 09:24:57 AM UTC 24 2460735503 ps
T380 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.874802252 Aug 29 09:24:39 AM UTC 24 Aug 29 09:25:01 AM UTC 24 1328777853 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.3168622755 Aug 29 09:24:53 AM UTC 24 Aug 29 09:25:01 AM UTC 24 1568988023 ps
T133 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.2494078470 Aug 29 09:24:55 AM UTC 24 Aug 29 09:25:03 AM UTC 24 190924289 ps
T438 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.751716936 Aug 29 09:24:53 AM UTC 24 Aug 29 09:25:06 AM UTC 24 2928339297 ps
T251 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.2503563559 Aug 29 09:24:29 AM UTC 24 Aug 29 09:25:07 AM UTC 24 850847756 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.523655165 Aug 29 09:24:28 AM UTC 24 Aug 29 09:25:07 AM UTC 24 2209815699 ps
T314 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.831902408 Aug 29 09:24:20 AM UTC 24 Aug 29 09:25:08 AM UTC 24 2161063193 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_sec_cm.1122908972 Aug 29 09:21:18 AM UTC 24 Aug 29 09:25:18 AM UTC 24 9911954435 ps
T315 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.3680497337 Aug 29 09:24:41 AM UTC 24 Aug 29 09:25:16 AM UTC 24 10582135633 ps
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T227 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_sec_cm.3256525267 Aug 29 09:20:34 AM UTC 24 Aug 29 09:25:19 AM UTC 24 11452271436 ps
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T173 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.1134646593 Aug 29 09:25:17 AM UTC 24 Aug 29 09:25:24 AM UTC 24 117389861 ps
T213 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.1138647096 Aug 29 09:24:07 AM UTC 24 Aug 29 09:25:25 AM UTC 24 2201064821 ps
T214 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.1778957085 Aug 29 09:25:16 AM UTC 24 Aug 29 09:25:25 AM UTC 24 171683909 ps
T215 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.1781389256 Aug 29 09:25:03 AM UTC 24 Aug 29 09:25:28 AM UTC 24 1403219582 ps
T216 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.744435826 Aug 29 09:25:21 AM UTC 24 Aug 29 09:25:30 AM UTC 24 578232891 ps
T217 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.2510665792 Aug 29 09:25:21 AM UTC 24 Aug 29 09:25:32 AM UTC 24 1083352967 ps
T218 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.3948918693 Aug 29 09:25:29 AM UTC 24 Aug 29 09:25:33 AM UTC 24 174865644 ps
T219 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.2872652285 Aug 29 09:25:17 AM UTC 24 Aug 29 09:25:33 AM UTC 24 5880102911 ps
T220 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.3367108671 Aug 29 09:25:29 AM UTC 24 Aug 29 09:25:36 AM UTC 24 147846655 ps
T221 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.2676978039 Aug 29 09:22:06 AM UTC 24 Aug 29 09:25:36 AM UTC 24 30699300230 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1254306305 Aug 29 09:24:40 AM UTC 24 Aug 29 09:25:37 AM UTC 24 6323882609 ps
T439 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.862955722 Aug 29 09:25:31 AM UTC 24 Aug 29 09:25:39 AM UTC 24 172738288 ps
T440 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.2683807176 Aug 29 09:25:21 AM UTC 24 Aug 29 09:25:39 AM UTC 24 609918027 ps
T441 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.1571542537 Aug 29 09:25:34 AM UTC 24 Aug 29 09:25:44 AM UTC 24 469408227 ps
T442 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.4047513820 Aug 29 09:25:41 AM UTC 24 Aug 29 09:25:49 AM UTC 24 907049051 ps
T443 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all.723639453 Aug 29 09:25:29 AM UTC 24 Aug 29 09:25:50 AM UTC 24 910297761 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.562754481 Aug 29 09:25:41 AM UTC 24 Aug 29 09:25:51 AM UTC 24 493666342 ps
T376 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.3791173628 Aug 29 09:25:21 AM UTC 24 Aug 29 09:25:53 AM UTC 24 1979713435 ps
T444 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.4240783899 Aug 29 09:25:37 AM UTC 24 Aug 29 09:25:55 AM UTC 24 644208203 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.2051515680 Aug 29 09:25:23 AM UTC 24 Aug 29 09:25:56 AM UTC 24 1576728727 ps
T445 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.4014142805 Aug 29 09:25:53 AM UTC 24 Aug 29 09:25:57 AM UTC 24 66812102 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.1230007585 Aug 29 09:25:02 AM UTC 24 Aug 29 09:25:57 AM UTC 24 1479090019 ps
T446 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.1829805536 Aug 29 09:25:31 AM UTC 24 Aug 29 09:25:57 AM UTC 24 1587320414 ps
T368 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.803239453 Aug 29 09:25:34 AM UTC 24 Aug 29 09:25:58 AM UTC 24 662149146 ps
T238 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.4060912007 Aug 29 09:25:23 AM UTC 24 Aug 29 09:25:58 AM UTC 24 8870872491 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.315249950 Aug 29 09:25:56 AM UTC 24 Aug 29 09:26:01 AM UTC 24 197542650 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.2809647144 Aug 29 09:25:41 AM UTC 24 Aug 29 09:26:05 AM UTC 24 504207425 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2100643275 Aug 29 09:25:41 AM UTC 24 Aug 29 09:26:05 AM UTC 24 1348896557 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.1668950922 Aug 29 09:24:58 AM UTC 24 Aug 29 09:26:06 AM UTC 24 3461501128 ps
T448 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.3876080839 Aug 29 09:25:55 AM UTC 24 Aug 29 09:26:06 AM UTC 24 1356136971 ps
T406 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.2649651867 Aug 29 09:25:29 AM UTC 24 Aug 29 09:26:07 AM UTC 24 986319544 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.3109706933 Aug 29 09:25:57 AM UTC 24 Aug 29 09:26:08 AM UTC 24 280903830 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_sec_cm.2232480623 Aug 29 09:22:07 AM UTC 24 Aug 29 09:26:11 AM UTC 24 10494538648 ps
T226 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.3511488676 Aug 29 09:26:00 AM UTC 24 Aug 29 09:26:15 AM UTC 24 1402582073 ps
T449 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.2120143509 Aug 29 09:26:12 AM UTC 24 Aug 29 09:26:15 AM UTC 24 213363009 ps
T233 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.56781457 Aug 29 09:25:32 AM UTC 24 Aug 29 09:26:15 AM UTC 24 9568107114 ps
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T96 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.2294729597 Aug 29 09:22:42 AM UTC 24 Aug 29 09:26:17 AM UTC 24 19821722209 ps
T69 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.2008052719 Aug 29 09:26:00 AM UTC 24 Aug 29 09:26:17 AM UTC 24 1606771013 ps
T451 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.1346077277 Aug 29 09:26:02 AM UTC 24 Aug 29 09:26:20 AM UTC 24 707866648 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.48214627 Aug 29 09:26:12 AM UTC 24 Aug 29 09:26:20 AM UTC 24 1490877971 ps
T360 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.3351418494 Aug 29 09:26:08 AM UTC 24 Aug 29 09:26:20 AM UTC 24 703730648 ps
T452 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.2137736047 Aug 29 09:26:12 AM UTC 24 Aug 29 09:26:24 AM UTC 24 1009472282 ps
T373 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.2523605581 Aug 29 09:25:57 AM UTC 24 Aug 29 09:26:29 AM UTC 24 2527157416 ps
T453 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.1534250989 Aug 29 09:26:12 AM UTC 24 Aug 29 09:26:31 AM UTC 24 5692948228 ps
T454 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.219225886 Aug 29 09:26:22 AM UTC 24 Aug 29 09:26:31 AM UTC 24 139264549 ps
T455 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.956837210 Aug 29 09:26:30 AM UTC 24 Aug 29 09:26:33 AM UTC 24 78136413 ps
T46 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.2827912276 Aug 29 09:26:17 AM UTC 24 Aug 29 09:26:34 AM UTC 24 975920862 ps
T210 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.1927462037 Aug 29 09:26:22 AM UTC 24 Aug 29 09:26:35 AM UTC 24 479638518 ps
T407 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.4120727381 Aug 29 09:26:16 AM UTC 24 Aug 29 09:26:38 AM UTC 24 2116497383 ps
T456 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.1452664980 Aug 29 09:26:22 AM UTC 24 Aug 29 09:26:39 AM UTC 24 438403490 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.799132289 Aug 29 09:26:32 AM UTC 24 Aug 29 09:26:39 AM UTC 24 118075099 ps
T457 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.3839908034 Aug 29 09:26:13 AM UTC 24 Aug 29 09:26:43 AM UTC 24 2667960666 ps
T458 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.2604486079 Aug 29 09:26:31 AM UTC 24 Aug 29 09:26:43 AM UTC 24 4722778120 ps
T239 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.2953024106 Aug 29 09:26:40 AM UTC 24 Aug 29 09:26:48 AM UTC 24 172394601 ps
T459 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_errs.3235113829 Aug 29 09:26:38 AM UTC 24 Aug 29 09:26:50 AM UTC 24 364695594 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.561728166 Aug 29 09:26:35 AM UTC 24 Aug 29 09:26:50 AM UTC 24 737867326 ps
T460 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.285889713 Aug 29 09:26:49 AM UTC 24 Aug 29 09:26:54 AM UTC 24 285386021 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.3251875102 Aug 29 09:26:17 AM UTC 24 Aug 29 09:26:55 AM UTC 24 1160760208 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.1458822733 Aug 29 09:27:07 AM UTC 24 Aug 29 09:27:16 AM UTC 24 298766525 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.148015582 Aug 29 09:26:36 AM UTC 24 Aug 29 09:26:57 AM UTC 24 1877493757 ps
T182 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.1353822281 Aug 29 09:26:52 AM UTC 24 Aug 29 09:26:58 AM UTC 24 160977643 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3052476320 Aug 29 09:26:46 AM UTC 24 Aug 29 09:27:02 AM UTC 24 1057285844 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.2977319094 Aug 29 09:26:15 AM UTC 24 Aug 29 09:27:03 AM UTC 24 7881241459 ps
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T249 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all_with_rand_reset.3553607378 Aug 29 09:25:10 AM UTC 24 Aug 29 09:27:07 AM UTC 24 13674439897 ps
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T392 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.2556121333 Aug 29 09:26:40 AM UTC 24 Aug 29 09:27:09 AM UTC 24 1342317133 ps
T463 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.2593683497 Aug 29 09:27:05 AM UTC 24 Aug 29 09:27:11 AM UTC 24 200304285 ps
T464 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.2851023514 Aug 29 09:26:55 AM UTC 24 Aug 29 09:27:11 AM UTC 24 1317715436 ps
T465 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.3732013561 Aug 29 09:27:09 AM UTC 24 Aug 29 09:27:12 AM UTC 24 253188968 ps
T466 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.2001253666 Aug 29 09:26:56 AM UTC 24 Aug 29 09:27:14 AM UTC 24 1385390109 ps
T467 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_test_access.2701842244 Aug 29 09:27:07 AM UTC 24 Aug 29 09:27:15 AM UTC 24 134254748 ps
T468 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.667147321 Aug 29 09:27:10 AM UTC 24 Aug 29 09:27:24 AM UTC 24 1492764874 ps
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T469 /workspaces/repo/scratch/os_regression_2024_08_28/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_req.2779659806 Aug 29 09:27:11 AM UTC 24 Aug 29 09:27:24 AM UTC 24 430333831 ps
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