| T1062 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/178.otp_ctrl_parallel_lc_esc.3223479011 |
|
|
Sep 18 04:56:50 PM UTC 24 |
Sep 18 04:57:01 PM UTC 24 |
852593476 ps |
| T1063 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/180.otp_ctrl_parallel_lc_esc.729644107 |
|
|
Sep 18 04:56:51 PM UTC 24 |
Sep 18 04:57:02 PM UTC 24 |
749998222 ps |
| T1064 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.349267584 |
|
|
Sep 18 04:56:57 PM UTC 24 |
Sep 18 04:57:02 PM UTC 24 |
314947041 ps |
| T1065 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.4202019188 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
154876199 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.810438820 |
|
|
Sep 18 04:56:58 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
1282316422 ps |
| T1066 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.557040771 |
|
|
Sep 18 04:56:53 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
586368641 ps |
| T1067 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.3222508912 |
|
|
Sep 18 04:56:58 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
171764849 ps |
| T1068 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.2554396324 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
171451631 ps |
| T1069 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.636752777 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
108366192 ps |
| T1070 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.4235019589 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
167718737 ps |
| T1071 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.1572200791 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
121498068 ps |
| T1072 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.534931670 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:03 PM UTC 24 |
273154281 ps |
| T1073 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.47312938 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
458490577 ps |
| T1074 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.3280146685 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
198007003 ps |
| T1075 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.3735789811 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
1949841792 ps |
| T1076 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_parallel_lc_esc.4065636283 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
248676972 ps |
| T1077 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.4124896583 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
1545887426 ps |
| T1078 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_init_fail.3648223638 |
|
|
Sep 18 04:56:59 PM UTC 24 |
Sep 18 04:57:04 PM UTC 24 |
183139289 ps |
| T1079 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_parallel_lc_esc.3298290714 |
|
|
Sep 18 04:56:51 PM UTC 24 |
Sep 18 04:57:05 PM UTC 24 |
429324519 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_stress_all_with_rand_reset.2474215377 |
|
|
Sep 18 04:55:28 PM UTC 24 |
Sep 18 04:57:05 PM UTC 24 |
19139127124 ps |
| T1080 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.3280153462 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
195662469 ps |
| T1081 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/161.otp_ctrl_parallel_lc_esc.414275927 |
|
|
Sep 18 04:56:42 PM UTC 24 |
Sep 18 04:57:05 PM UTC 24 |
2734820107 ps |
| T1082 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.1392700689 |
|
|
Sep 18 04:56:53 PM UTC 24 |
Sep 18 04:57:06 PM UTC 24 |
5976451320 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.944706699 |
|
|
Sep 18 04:56:55 PM UTC 24 |
Sep 18 04:57:07 PM UTC 24 |
305389347 ps |
| T1083 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.2636641541 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
160830343 ps |
| T1084 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.651300366 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
433636445 ps |
| T1085 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.2339634604 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
225793116 ps |
| T1086 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.4051701039 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
352586858 ps |
| T1087 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.3247503055 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
218693236 ps |
| T1088 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.2242202737 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:08 PM UTC 24 |
520130135 ps |
| T1089 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.4001426733 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
111092704 ps |
| T1090 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/151.otp_ctrl_parallel_lc_esc.282530064 |
|
|
Sep 18 04:56:35 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
15924429952 ps |
| T1091 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.1075278968 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
1667457202 ps |
| T1092 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.1321673924 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
210382856 ps |
| T1093 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.787128261 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
423021545 ps |
| T1094 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.1912146382 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
116875043 ps |
| T1095 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.195772576 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
1638053256 ps |
| T1096 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.630807734 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
165466246 ps |
| T1097 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.3345127646 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
2397171661 ps |
| T1098 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.3691641815 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:09 PM UTC 24 |
1667017371 ps |
| T1099 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.4206786579 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
114642799 ps |
| T1100 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.3765803339 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
240989827 ps |
| T1101 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.2449667238 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
206321963 ps |
| T1102 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.618112044 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
333433416 ps |
| T1103 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.1627887346 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
211541234 ps |
| T1104 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.3217545989 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
182401381 ps |
| T1105 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.124137144 |
|
|
Sep 18 04:57:03 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
582890674 ps |
| T1106 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.1948323414 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
116554501 ps |
| T1107 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.1943379707 |
|
|
Sep 18 04:57:06 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
460361183 ps |
| T1108 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.4010747698 |
|
|
Sep 18 04:57:06 PM UTC 24 |
Sep 18 04:57:10 PM UTC 24 |
140779172 ps |
| T1109 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/173.otp_ctrl_parallel_lc_esc.752409654 |
|
|
Sep 18 04:56:46 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
5296544324 ps |
| T1110 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.3404736248 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
364293572 ps |
| T1111 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.2489874584 |
|
|
Sep 18 04:57:06 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
286157499 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.1846574187 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
501477980 ps |
| T1112 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.3793881782 |
|
|
Sep 18 04:57:06 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
385559898 ps |
| T1113 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.1024281798 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
360883973 ps |
| T1114 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.4186570768 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
117225601 ps |
| T1115 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.2475405499 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
2408912680 ps |
| T1116 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.2715588311 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:11 PM UTC 24 |
224028895 ps |
| T1117 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_stress_all_with_rand_reset.1769967021 |
|
|
Sep 18 04:54:49 PM UTC 24 |
Sep 18 04:57:12 PM UTC 24 |
14997797356 ps |
| T1118 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.4209286654 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:12 PM UTC 24 |
2510491069 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.4121254347 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
410021905 ps |
| T1119 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.3350834755 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
113323395 ps |
| T1120 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.224179433 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:13 PM UTC 24 |
230999596 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.1649703559 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
118130078 ps |
| T1121 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.2638474553 |
|
|
Sep 18 04:57:05 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
2633101721 ps |
| T1122 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.3968353661 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
224725539 ps |
| T1123 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.3515225287 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
270957255 ps |
| T1124 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.3191985989 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
207431943 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.3619874171 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
502826229 ps |
| T1125 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.93923073 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
133828756 ps |
| T1126 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.1158867064 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:14 PM UTC 24 |
201144052 ps |
| T32 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.3379318660 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:15 PM UTC 24 |
285027834 ps |
| T1127 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.3500113010 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:15 PM UTC 24 |
161367962 ps |
| T1128 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.2300448925 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:15 PM UTC 24 |
664417437 ps |
| T1129 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.3103658374 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:15 PM UTC 24 |
629885809 ps |
| T1130 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.4165068096 |
|
|
Sep 18 04:57:09 PM UTC 24 |
Sep 18 04:57:15 PM UTC 24 |
1649960837 ps |
| T1131 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.597163845 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
181044201 ps |
| T1132 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.1947409568 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
120282462 ps |
| T1133 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.2110668482 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
309859773 ps |
| T1134 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.3862283672 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
506072454 ps |
| T1135 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.1168432402 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
458744729 ps |
| T1136 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.4129922806 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
1547892227 ps |
| T1137 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.3379825596 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:16 PM UTC 24 |
264348260 ps |
| T1138 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.4208033724 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
146406154 ps |
| T1139 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.252415139 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
145574961 ps |
| T1140 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.3148458175 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
131830447 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.3204957164 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
264584189 ps |
| T1141 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.2147281940 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
313659859 ps |
| T1142 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.2252837954 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
273070106 ps |
| T1143 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.2723107608 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
143114002 ps |
| T1144 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.1517629360 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
388557903 ps |
| T1145 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.3759031450 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
159703301 ps |
| T1146 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.4255300493 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
2090204674 ps |
| T1147 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.2482265213 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:17 PM UTC 24 |
152541287 ps |
| T1148 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.3447246130 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:18 PM UTC 24 |
553783088 ps |
| T1149 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_stress_all_with_rand_reset.3055795531 |
|
|
Sep 18 04:54:57 PM UTC 24 |
Sep 18 04:57:18 PM UTC 24 |
9551531715 ps |
| T1150 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.258974940 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:18 PM UTC 24 |
273545357 ps |
| T1151 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/177.otp_ctrl_parallel_lc_esc.885109433 |
|
|
Sep 18 04:56:50 PM UTC 24 |
Sep 18 04:57:18 PM UTC 24 |
3816782317 ps |
| T1152 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.1475961332 |
|
|
Sep 18 04:56:56 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
7504844604 ps |
| T1153 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.4038576514 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
2436662904 ps |
| T1154 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.3423865004 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
1811844679 ps |
| T1155 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.1437827681 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
457734402 ps |
| T1156 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.4245847170 |
|
|
Sep 18 04:57:12 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
1663164176 ps |
| T1157 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.2915385451 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:19 PM UTC 24 |
278579140 ps |
| T1158 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.2955001701 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
134011995 ps |
| T71 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.1711226328 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
156406627 ps |
| T1159 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.3845579857 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
463142548 ps |
| T1160 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.4161441055 |
|
|
Sep 18 04:57:11 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
2390933353 ps |
| T1161 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.1496657511 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
498694376 ps |
| T1162 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.2825388822 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
195366482 ps |
| T1163 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.3629159337 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:20 PM UTC 24 |
2140633796 ps |
| T1164 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.2500682669 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:21 PM UTC 24 |
474459174 ps |
| T1165 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.394732478 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:21 PM UTC 24 |
170455513 ps |
| T1166 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.243798888 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:21 PM UTC 24 |
225491992 ps |
| T1167 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.2133830717 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:21 PM UTC 24 |
131653230 ps |
| T1168 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.539767241 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
432963860 ps |
| T1169 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.1262033799 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
307235568 ps |
| T1170 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.2794328936 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
100960206 ps |
| T1171 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.2544803693 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
116828667 ps |
| T1172 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.2030174380 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
169594941 ps |
| T1173 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.2611457611 |
|
|
Sep 18 04:57:17 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
121863661 ps |
| T1174 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.2157775627 |
|
|
Sep 18 04:57:15 PM UTC 24 |
Sep 18 04:57:22 PM UTC 24 |
2243818199 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_stress_all_with_rand_reset.2142286333 |
|
|
Sep 18 04:55:48 PM UTC 24 |
Sep 18 04:57:23 PM UTC 24 |
2609890613 ps |
| T1175 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.2683016505 |
|
|
Sep 18 04:57:20 PM UTC 24 |
Sep 18 04:57:25 PM UTC 24 |
324367947 ps |
| T1176 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.1859591406 |
|
|
Sep 18 04:57:20 PM UTC 24 |
Sep 18 04:57:25 PM UTC 24 |
293626779 ps |
| T1177 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_stress_all_with_rand_reset.3444990353 |
|
|
Sep 18 04:55:18 PM UTC 24 |
Sep 18 04:57:37 PM UTC 24 |
49397474082 ps |
| T1178 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_stress_all.2282177263 |
|
|
Sep 18 04:54:20 PM UTC 24 |
Sep 18 04:57:48 PM UTC 24 |
20083493064 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.1906495623 |
|
|
Sep 18 04:55:27 PM UTC 24 |
Sep 18 04:57:51 PM UTC 24 |
96656321296 ps |
| T1179 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_stress_all_with_rand_reset.2373669905 |
|
|
Sep 18 04:55:53 PM UTC 24 |
Sep 18 04:58:15 PM UTC 24 |
4515831606 ps |
| T1180 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.874715569 |
|
|
Sep 18 04:55:38 PM UTC 24 |
Sep 18 04:58:29 PM UTC 24 |
10652130591 ps |
| T1181 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3221533546 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:37 PM UTC 24 |
138445089 ps |
| T1182 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.2107267748 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:37 PM UTC 24 |
41435562 ps |
| T1183 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.441326190 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:37 PM UTC 24 |
125903041 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3248586862 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:37 PM UTC 24 |
39640616 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.2927034168 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:38 PM UTC 24 |
353248155 ps |
| T1184 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.3255268140 |
|
|
Sep 18 07:14:36 PM UTC 24 |
Sep 18 07:14:38 PM UTC 24 |
73137949 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.4275877890 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:38 PM UTC 24 |
75622559 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.667676467 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:39 PM UTC 24 |
82824211 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.573896605 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:39 PM UTC 24 |
100063780 ps |
| T1185 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.785640247 |
|
|
Sep 18 07:14:34 PM UTC 24 |
Sep 18 07:14:39 PM UTC 24 |
86453672 ps |
| T1186 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.1804896449 |
|
|
Sep 18 07:14:38 PM UTC 24 |
Sep 18 07:14:40 PM UTC 24 |
110629488 ps |
| T1187 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.1029355284 |
|
|
Sep 18 07:14:38 PM UTC 24 |
Sep 18 07:14:40 PM UTC 24 |
124610367 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.510652883 |
|
|
Sep 18 07:14:38 PM UTC 24 |
Sep 18 07:14:41 PM UTC 24 |
145954803 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.2802550840 |
|
|
Sep 18 07:14:38 PM UTC 24 |
Sep 18 07:14:41 PM UTC 24 |
383908221 ps |
| T1188 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.1586582459 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:42 PM UTC 24 |
641523056 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2759891521 |
|
|
Sep 18 07:14:39 PM UTC 24 |
Sep 18 07:14:42 PM UTC 24 |
172035271 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2468864924 |
|
|
Sep 18 07:14:39 PM UTC 24 |
Sep 18 07:14:42 PM UTC 24 |
87502885 ps |
| T1189 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.3266593561 |
|
|
Sep 18 07:14:41 PM UTC 24 |
Sep 18 07:14:44 PM UTC 24 |
91437647 ps |
| T1190 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.4195473800 |
|
|
Sep 18 07:14:41 PM UTC 24 |
Sep 18 07:14:44 PM UTC 24 |
146757016 ps |
| T1191 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.4211376547 |
|
|
Sep 18 07:14:41 PM UTC 24 |
Sep 18 07:14:44 PM UTC 24 |
74105131 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.2539077703 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:44 PM UTC 24 |
831746327 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.318565672 |
|
|
Sep 18 07:14:39 PM UTC 24 |
Sep 18 07:14:44 PM UTC 24 |
1282184703 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.1355906363 |
|
|
Sep 18 07:14:35 PM UTC 24 |
Sep 18 07:14:45 PM UTC 24 |
663962272 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.212490582 |
|
|
Sep 18 07:14:42 PM UTC 24 |
Sep 18 07:14:45 PM UTC 24 |
40260593 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.2808561491 |
|
|
Sep 18 07:14:39 PM UTC 24 |
Sep 18 07:14:45 PM UTC 24 |
163291163 ps |
| T1192 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.4102312313 |
|
|
Sep 18 07:14:40 PM UTC 24 |
Sep 18 07:14:46 PM UTC 24 |
2122550673 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.3771705354 |
|
|
Sep 18 07:14:41 PM UTC 24 |
Sep 18 07:14:46 PM UTC 24 |
1555138839 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3866526789 |
|
|
Sep 18 07:14:44 PM UTC 24 |
Sep 18 07:14:46 PM UTC 24 |
51271314 ps |
| T1193 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.795924444 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
64057588 ps |
| T1194 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.559065078 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
144907046 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.422999012 |
|
|
Sep 18 07:14:36 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
902333638 ps |
| T1195 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.4006792975 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
148331602 ps |
| T1196 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.953464313 |
|
|
Sep 18 07:14:44 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
115488187 ps |
| T1197 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1961234712 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:47 PM UTC 24 |
535260543 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.2431584716 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:48 PM UTC 24 |
183216341 ps |
| T1198 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2169353772 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:48 PM UTC 24 |
101245575 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1532009739 |
|
|
Sep 18 07:14:43 PM UTC 24 |
Sep 18 07:14:48 PM UTC 24 |
79149834 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.2820723584 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:48 PM UTC 24 |
219264632 ps |
| T1199 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.3580961752 |
|
|
Sep 18 07:14:46 PM UTC 24 |
Sep 18 07:14:48 PM UTC 24 |
74755116 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.1448381721 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:49 PM UTC 24 |
113413858 ps |
| T1200 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.3561110017 |
|
|
Sep 18 07:14:47 PM UTC 24 |
Sep 18 07:14:49 PM UTC 24 |
100169451 ps |
| T1201 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.4156743815 |
|
|
Sep 18 07:14:47 PM UTC 24 |
Sep 18 07:14:49 PM UTC 24 |
144403278 ps |
| T1202 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.54129051 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:14:49 PM UTC 24 |
311133446 ps |
| T1203 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1325664206 |
|
|
Sep 18 07:14:44 PM UTC 24 |
Sep 18 07:14:50 PM UTC 24 |
90194406 ps |
| T1204 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.1478258939 |
|
|
Sep 18 07:14:47 PM UTC 24 |
Sep 18 07:14:50 PM UTC 24 |
262659181 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.455721515 |
|
|
Sep 18 07:14:42 PM UTC 24 |
Sep 18 07:14:51 PM UTC 24 |
3751561528 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.3468724685 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:51 PM UTC 24 |
43388442 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.1824344516 |
|
|
Sep 18 07:14:49 PM UTC 24 |
Sep 18 07:14:51 PM UTC 24 |
140360745 ps |
| T1205 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3290275443 |
|
|
Sep 18 07:14:49 PM UTC 24 |
Sep 18 07:14:51 PM UTC 24 |
37546215 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.379344577 |
|
|
Sep 18 07:14:49 PM UTC 24 |
Sep 18 07:14:51 PM UTC 24 |
89342548 ps |
| T1206 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.785080981 |
|
|
Sep 18 07:14:50 PM UTC 24 |
Sep 18 07:14:52 PM UTC 24 |
56217653 ps |
| T1207 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.2005166059 |
|
|
Sep 18 07:14:46 PM UTC 24 |
Sep 18 07:14:52 PM UTC 24 |
181989692 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2645420129 |
|
|
Sep 18 07:14:50 PM UTC 24 |
Sep 18 07:14:52 PM UTC 24 |
59233911 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.2400237111 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:52 PM UTC 24 |
242079162 ps |
| T1208 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.3051116068 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:52 PM UTC 24 |
102897370 ps |
| T1209 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.1378775661 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:53 PM UTC 24 |
162552544 ps |
| T1210 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.2537453676 |
|
|
Sep 18 07:14:50 PM UTC 24 |
Sep 18 07:14:53 PM UTC 24 |
75127942 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.1533185884 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:53 PM UTC 24 |
223599537 ps |
| T1211 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.1101788950 |
|
|
Sep 18 07:14:50 PM UTC 24 |
Sep 18 07:14:53 PM UTC 24 |
111745175 ps |
| T1212 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.3463073057 |
|
|
Sep 18 07:14:51 PM UTC 24 |
Sep 18 07:14:54 PM UTC 24 |
145070483 ps |
| T1213 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.3619902258 |
|
|
Sep 18 07:14:52 PM UTC 24 |
Sep 18 07:14:54 PM UTC 24 |
148771217 ps |
| T1214 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.380492576 |
|
|
Sep 18 07:14:52 PM UTC 24 |
Sep 18 07:14:55 PM UTC 24 |
171209602 ps |
| T1215 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.1301219048 |
|
|
Sep 18 07:14:51 PM UTC 24 |
Sep 18 07:14:55 PM UTC 24 |
817716616 ps |
| T1216 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.2640558452 |
|
|
Sep 18 07:14:52 PM UTC 24 |
Sep 18 07:14:55 PM UTC 24 |
233902134 ps |
| T1217 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.2153466406 |
|
|
Sep 18 07:14:48 PM UTC 24 |
Sep 18 07:14:56 PM UTC 24 |
351130366 ps |
| T1218 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.1116266932 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:56 PM UTC 24 |
557908551 ps |
| T1219 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.198435372 |
|
|
Sep 18 07:14:54 PM UTC 24 |
Sep 18 07:14:56 PM UTC 24 |
75198875 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2095094421 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:56 PM UTC 24 |
132425396 ps |
| T1220 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.1657684133 |
|
|
Sep 18 07:14:52 PM UTC 24 |
Sep 18 07:14:56 PM UTC 24 |
1684697808 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.3528525964 |
|
|
Sep 18 07:14:50 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
183094287 ps |
| T1221 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.510177563 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
279361673 ps |
| T1222 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.4071018289 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
190499220 ps |
| T1223 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.3208351622 |
|
|
Sep 18 07:14:55 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
542369999 ps |
| T1224 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.2311645317 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
490986059 ps |
| T1225 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.3626011132 |
|
|
Sep 18 07:14:55 PM UTC 24 |
Sep 18 07:14:57 PM UTC 24 |
99881806 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1116537268 |
|
|
Sep 18 07:14:40 PM UTC 24 |
Sep 18 07:14:58 PM UTC 24 |
2416782855 ps |
| T1226 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.3518615874 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:14:58 PM UTC 24 |
114536417 ps |
| T1227 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.1347033167 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:14:59 PM UTC 24 |
93841277 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3588727893 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:14:59 PM UTC 24 |
64468767 ps |
| T1228 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.3332168239 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:14:59 PM UTC 24 |
88169702 ps |
| T1229 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.725152726 |
|
|
Sep 18 07:14:56 PM UTC 24 |
Sep 18 07:15:00 PM UTC 24 |
228031515 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.2606367747 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:12 PM UTC 24 |
696629821 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.1474350424 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:14 PM UTC 24 |
1231017193 ps |
| T1230 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.4165698562 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:15:00 PM UTC 24 |
123469786 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2507577672 |
|
|
Sep 18 07:14:58 PM UTC 24 |
Sep 18 07:15:00 PM UTC 24 |
81026241 ps |
| T1231 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.3445778702 |
|
|
Sep 18 07:14:56 PM UTC 24 |
Sep 18 07:15:01 PM UTC 24 |
1715052958 ps |
| T1232 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.1734746423 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:15:01 PM UTC 24 |
209135306 ps |
| T1233 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.4104270739 |
|
|
Sep 18 07:14:58 PM UTC 24 |
Sep 18 07:15:01 PM UTC 24 |
664234075 ps |
| T1234 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.2148974315 |
|
|
Sep 18 07:14:58 PM UTC 24 |
Sep 18 07:15:02 PM UTC 24 |
109790647 ps |
| T1235 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.3093553876 |
|
|
Sep 18 07:14:59 PM UTC 24 |
Sep 18 07:15:02 PM UTC 24 |
77097163 ps |
| T1236 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3433107344 |
|
|
Sep 18 07:14:57 PM UTC 24 |
Sep 18 07:15:02 PM UTC 24 |
1555293904 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.4015488735 |
|
|
Sep 18 07:14:59 PM UTC 24 |
Sep 18 07:15:02 PM UTC 24 |
573000507 ps |
| T1237 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/34.otp_ctrl_intr_test.4191298610 |
|
|
Sep 18 07:15:07 PM UTC 24 |
Sep 18 07:15:19 PM UTC 24 |
38155666 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1494979745 |
|
|
Sep 18 07:14:46 PM UTC 24 |
Sep 18 07:15:03 PM UTC 24 |
1412289060 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.4113467169 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:03 PM UTC 24 |
137351185 ps |
| T1238 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3049519848 |
|
|
Sep 18 07:14:59 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
197879757 ps |
| T1239 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.2687496399 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
61818074 ps |
| T1240 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.2444180574 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
90892493 ps |
| T1241 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.2193709573 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
552125869 ps |
| T1242 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.2400729709 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
82626866 ps |
| T1243 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.2535824178 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
39052225 ps |
| T1244 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.2463230000 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
41666649 ps |
| T1245 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.921365526 |
|
|
Sep 18 07:14:58 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
287962031 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.3022241457 |
|
|
Sep 18 07:14:53 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
1283478585 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.1661690763 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
44736098 ps |
| T1246 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.3614251174 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
275300008 ps |
| T1247 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.82765303 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
686228012 ps |
| T1248 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.2755929385 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:04 PM UTC 24 |
258459924 ps |
| T1249 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.1575049002 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
166989407 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.388575728 |
|
|
Sep 18 07:14:45 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
1733387856 ps |
| T1250 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.4084563790 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
99728859 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.2414121287 |
|
|
Sep 18 07:14:56 PM UTC 24 |
Sep 18 07:15:14 PM UTC 24 |
2283529604 ps |
| T1251 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3044695965 |
|
|
Sep 18 07:15:01 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
108990080 ps |
| T1252 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.3394948520 |
|
|
Sep 18 07:14:59 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
1901564939 ps |
| T1253 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.1088709754 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
78251461 ps |
| T1254 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.3556206277 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:05 PM UTC 24 |
68661404 ps |
| T1255 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.34238326 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:06 PM UTC 24 |
567715491 ps |
| T1256 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.3695016998 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:06 PM UTC 24 |
142993892 ps |
| T1257 |
/workspaces/repo/scratch/os_regression_2024_09_17/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.3467595936 |
|
|
Sep 18 07:15:03 PM UTC 24 |
Sep 18 07:15:06 PM UTC 24 |
600795043 ps |