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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9880 1 T1 1 T2 2 T3 3
true 16134 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10774 1 T1 1 T2 2 T3 3
true 16178 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T90 2 T95 2 T80 2
others[1] 74 1 T93 2 T94 4 T296 2
others[2] 90 1 T89 2 T90 2 T39 2
others[3] 100 1 T7 2 T92 2 T416 2
others[4] 102 1 T65 4 T90 4 T80 2
others[5] 96 1 T88 2 T95 2 T96 2
others[6] 100 1 T89 2 T90 2 T82 2
others[7] 102 1 T91 2 T96 2 T98 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T89 2 T97 4 T215 2
others[1] 77 1 T17 2 T91 2 T78 2
others[2] 70 1 T65 2 T89 2 T78 2
others[3] 88 1 T96 2 T132 2 T133 2
others[4] 78 1 T65 2 T28 2 T94 2
others[5] 84 1 T48 2 T273 4 T417 2
others[6] 94 1 T95 2 T80 2 T368 2
others[7] 114 1 T262 2 T82 2 T365 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T88 2 T93 2 T100 2
others[1] 100 1 T65 2 T90 2 T94 2
others[2] 88 1 T18 4 T91 2 T94 2
others[3] 82 1 T97 2 T99 2 T418 2
others[4] 93 1 T419 2 T200 2 T294 2
others[5] 100 1 T18 2 T80 2 T418 2
others[6] 78 1 T94 2 T131 2 T296 2
others[7] 122 1 T48 2 T65 2 T89 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T26 2 T204 2 T420 2
others[1] 52 1 T38 2 T368 2 T255 2
others[2] 56 1 T65 2 T95 2 T421 2
others[3] 58 1 T65 2 T89 2 T214 2
others[4] 60 1 T65 2 T263 2 T368 2
others[5] 68 1 T94 2 T78 2 T416 2
others[6] 70 1 T93 2 T95 2 T214 2
others[7] 74 1 T48 2 T84 2 T90 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T26 2 T95 4 T78 2
others[1] 78 1 T98 2 T131 2 T422 2
others[2] 78 1 T48 2 T255 2 T348 2
others[3] 94 1 T65 4 T90 2 T94 4
others[4] 76 1 T7 2 T18 2 T419 2
others[5] 80 1 T94 2 T418 2 T132 2
others[6] 86 1 T65 2 T97 2 T418 2
others[7] 102 1 T91 2 T97 2 T418 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T18 2 T133 2 T273 2
others[1] 32 1 T131 2 T133 2 T294 2
others[2] 30 1 T99 2 T296 2 T275 2
others[3] 44 1 T96 2 T97 2 T119 2
others[4] 42 1 T119 2 T296 2 T423 2
others[5] 18 1 T273 2 T184 2 T386 2
others[6] 44 1 T100 2 T132 2 T296 2
others[7] 42 1 T98 2 T119 2 T424 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T84 2 T78 2 T418 2
others[1] 78 1 T48 2 T88 2 T94 2
others[2] 68 1 T17 2 T18 2 T215 2
others[3] 70 1 T17 2 T94 2 T425 2
others[4] 76 1 T168 2 T425 2 T426 2
others[5] 66 1 T65 2 T427 2 T255 2
others[6] 86 1 T88 2 T91 2 T97 2
others[7] 96 1 T59 2 T90 2 T97 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T80 2 T99 2 T365 2
others[1] 78 1 T416 2 T295 2 T204 2
others[2] 92 1 T94 2 T100 2 T368 2
others[3] 88 1 T18 2 T28 2 T78 2
others[4] 64 1 T28 2 T157 2 T422 2
others[5] 100 1 T18 2 T91 2 T97 2
others[6] 80 1 T263 2 T425 2 T428 2
others[7] 98 1 T48 2 T89 2 T133 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T214 2 T368 2 T133 2
others[1] 76 1 T27 2 T99 2 T418 2
others[2] 106 1 T7 2 T26 2 T48 2
others[3] 82 1 T18 2 T95 2 T96 2
others[4] 66 1 T17 2 T18 2 T65 2
others[5] 112 1 T88 2 T422 2 T429 2
others[6] 76 1 T17 2 T179 2 T348 2
others[7] 106 1 T94 2 T97 2 T80 4
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T27 2 T84 2 T93 2
others[1] 100 1 T17 2 T214 2 T132 2
others[2] 66 1 T18 2 T77 2 T179 2
others[3] 96 1 T48 2 T89 2 T97 2
others[4] 92 1 T26 2 T48 2 T99 2
others[5] 86 1 T90 2 T96 2 T80 2
others[6] 90 1 T89 2 T95 2 T119 2
others[7] 106 1 T89 4 T94 2 T131 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T88 2 T89 2 T94 2
others[1] 62 1 T91 2 T97 2 T78 2
others[2] 90 1 T93 2 T94 2 T95 2
others[3] 114 1 T59 2 T80 2 T200 2
others[4] 74 1 T98 2 T99 2 T294 2
others[5] 92 1 T38 2 T18 2 T65 6
others[6] 86 1 T65 2 T88 2 T422 2
others[7] 117 1 T97 2 T78 2 T80 2
false 13800 1 T1 1 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 8 1 T113 2 T136 1 T369 2
others[1] 22 1 T78 2 T430 2 T431 2
others[2] 12 1 T134 1 T219 1 T432 2
others[3] 15 1 T134 1 T220 1 T62 2
others[4] 15 1 T15 1 T16 1 T134 1
others[5] 14 1 T365 2 T340 1 T433 2
others[6] 9 1 T111 2 T221 1 T253 1
others[7] 22 1 T255 2 T204 2 T209 2
false 13800 1 T1 1 T2 4 T3 4
true 2026 1 T7 1 T17 2 T26 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 16 1 T16 1 T134 1 T430 2
others[1] 9 1 T166 2 T190 1 T434 2
others[2] 12 1 T113 2 T220 1 T253 1
others[3] 11 1 T204 2 T431 2 T338 1
others[4] 10 1 T435 1 T338 2 T436 1
others[5] 20 1 T365 2 T111 2 T134 2
others[6] 18 1 T255 2 T136 1 T219 1
others[7] 20 1 T78 2 T15 1 T209 2
false 11235 1 T1 1 T2 3 T3 3
true 18197 1 T1 1 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T65 2 T90 2 T93 2
others[1] 100 1 T92 2 T39 2 T96 2
others[2] 86 1 T89 2 T94 2 T273 2
others[3] 94 1 T65 2 T88 2 T90 4
others[4] 92 1 T7 2 T90 2 T91 2
others[5] 76 1 T418 2 T368 2 T425 2
others[6] 80 1 T119 2 T421 2 T165 2
others[7] 110 1 T89 2 T90 2 T95 2
false 7673 1 T1 1 T2 3 T3 2
true 16218 1 T1 1 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T89 4 T28 2 T94 2
others[1] 78 1 T95 2 T368 2 T132 4
others[2] 94 1 T96 2 T97 2 T80 2
others[3] 74 1 T65 2 T91 2 T97 2
others[4] 80 1 T82 2 T255 2 T437 2
others[5] 94 1 T17 2 T438 2 T419 2
others[6] 88 1 T418 2 T273 2 T429 2
others[7] 97 1 T48 2 T65 2 T262 2
false 6735 1 T1 1 T2 2 T3 3
true 16011 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T18 2 T48 2 T99 2
others[1] 84 1 T89 2 T94 2 T80 2
others[2] 91 1 T97 2 T82 2 T418 2
others[3] 86 1 T94 2 T215 2 T131 2
others[4] 86 1 T18 4 T90 2 T94 2
others[5] 104 1 T65 4 T97 2 T77 2
others[6] 80 1 T88 2 T93 4 T214 2
others[7] 92 1 T91 2 T132 4 T439 2
false 7199 1 T1 1 T2 2 T3 3
true 16032 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T134 1 T358 2 T440 2
others[1] 17 1 T168 2 T417 2 T441 2
others[2] 24 1 T253 1 T442 2 T443 2
others[3] 13 1 T439 2 T253 1 T442 2
others[4] 11 1 T111 2 T275 2 T444 2
others[5] 12 1 T445 2 T221 1 T190 1
others[6] 9 1 T297 1 T433 2 T261 2
others[7] 28 1 T131 2 T419 2 T135 1
false 11181 1 T1 1 T2 3 T3 3
true 18150 1 T1 1 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T26 2 T65 2 T89 2
others[1] 60 1 T38 2 T428 2 T40 2
others[2] 78 1 T90 2 T368 2 T255 4
others[3] 50 1 T368 2 T416 2 T269 2
others[4] 52 1 T94 2 T157 2 T422 2
others[5] 58 1 T95 2 T214 2 T416 2
others[6] 70 1 T65 4 T78 2 T263 4
others[7] 66 1 T48 2 T84 2 T93 2
false 8820 1 T1 1 T2 3 T3 2
true 16225 1 T1 1 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T386 2 T136 1 T259 2
others[1] 24 1 T14 1 T15 1 T202 2
others[2] 14 1 T446 2 T219 2 T447 2
others[3] 10 1 T136 1 T221 2 T205 2
others[4] 21 1 T16 1 T448 2 T449 2
others[5] 6 1 T226 1 T450 1 T338 2
others[6] 11 1 T219 1 T451 2 T221 1
others[7] 13 1 T132 2 T253 1 T190 1
false 11147 1 T1 1 T2 2 T3 3
true 18096 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T18 2 T98 2 T422 2
others[1] 90 1 T95 2 T416 2 T348 2
others[2] 96 1 T26 2 T97 2 T98 2
others[3] 94 1 T65 2 T275 2 T446 2
others[4] 86 1 T7 2 T48 2 T65 2
others[5] 84 1 T91 2 T97 2 T78 2
others[6] 64 1 T95 2 T418 2 T452 2
others[7] 82 1 T65 2 T90 2 T94 2
false 7696 1 T1 1 T2 2 T3 2
true 16165 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 18 1 T14 1 T220 1 T205 2
others[1] 16 1 T453 2 T297 1 T136 1
others[2] 22 1 T15 1 T297 1 T136 1
others[3] 18 1 T454 2 T221 1 T261 2
others[4] 12 1 T455 2 T442 2 T340 1
others[5] 8 1 T297 1 T342 1 T343 2
others[6] 22 1 T133 2 T165 2 T386 2
others[7] 21 1 T89 2 T56 2 T368 2
false 11100 1 T1 1 T2 2 T3 3
true 18118 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T98 2 T294 2 T296 2
others[1] 38 1 T133 2 T296 2 T348 2
others[2] 32 1 T18 2 T296 2 T348 2
others[3] 34 1 T119 2 T273 2 T179 2
others[4] 28 1 T119 4 T296 2 T348 2
others[5] 36 1 T96 2 T97 2 T100 2
others[6] 42 1 T131 2 T132 4 T133 4
others[7] 26 1 T99 2 T440 2 T456 2
false 9658 1 T1 1 T2 2 T3 3
true 16205 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T59 2 T131 2 T273 2
others[1] 66 1 T17 2 T88 2 T215 2
others[2] 96 1 T17 2 T88 2 T94 2
others[3] 58 1 T84 2 T418 4 T427 2
others[4] 76 1 T18 2 T80 2 T128 2
others[5] 88 1 T255 2 T426 2 T268 2
others[6] 92 1 T48 2 T65 2 T275 2
others[7] 84 1 T90 2 T91 2 T94 2
false 6875 1 T1 1 T2 2 T3 3
true 16004 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T295 2 T157 2 T428 2
others[1] 90 1 T28 2 T97 2 T78 2
others[2] 78 1 T18 2 T91 2 T296 2
others[3] 94 1 T418 2 T132 2 T268 2
others[4] 80 1 T18 2 T99 2 T263 2
others[5] 70 1 T48 2 T422 2 T255 2
others[6] 80 1 T89 2 T28 2 T94 2
others[7] 106 1 T80 2 T133 2 T416 4
false 6875 1 T1 1 T2 2 T3 3
true 16004 1 T1 1 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T18 2 T48 2 T99 2
others[1] 80 1 T17 2 T131 2 T133 2
others[2] 92 1 T94 2 T418 4 T422 4
others[3] 70 1 T18 2 T96 2 T368 2
others[4] 76 1 T27 2 T97 2 T80 2
others[5] 76 1 T7 2 T95 2 T97 2
others[6] 100 1 T26 2 T88 2 T263 2
others[7] 120 1 T17 2 T65 2 T97 2
false 6202 1 T1 1 T2 1 T3 2
true 15987 1 T1 1 T2 4 T3 5

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