Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 49014 1 T4 19 T5 144 T13 445
access_err 63887 1 T1 23 T4 373 T5 87
write_blank_err 452 1 T4 2 T6 3 T12 3
ecc_uncorr_err 64991 1 T4 442 T6 327 T12 722
ecc_corr_err 1391 1 T5 45 T6 1 T14 33
no_err 91757 1 T1 44 T2 27 T4 725



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 792 1 T4 19 T6 4 T12 18
secret2 26700 1 T1 5 T2 7 T4 119
secret1 27993 1 T1 10 T2 1 T4 326
secret0 32489 1 T1 5 T2 1 T4 103
hw_cfg1 36252 1 T1 10 T2 1 T4 321
hw_cfg0 27346 1 T1 6 T2 5 T4 87
rot_creator_auth_state 24094 1 T1 7 T2 2 T4 113
rot_creator_auth_codesign 22372 1 T1 2 T2 4 T4 118
owner_sw_cfg 20402 1 T1 7 T4 80 T5 22
creator_sw_cfg 22118 1 T1 3 T2 4 T4 142
vendor_test 30934 1 T1 12 T2 2 T4 133



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 4214 1 T90 1 T341 63 T116 258
fsm_err secret1 5440 1 T4 19 T342 165 T158 101
fsm_err secret0 2526 1 T173 251 T16 55 T145 243
fsm_err hw_cfg1 2694 1 T150 45 T343 6 T344 71
fsm_err hw_cfg0 6868 1 T148 201 T146 312 T345 256
fsm_err rot_creator_auth_state 3131 1 T103 264 T346 215 T138 19
fsm_err rot_creator_auth_codesign 3733 1 T13 445 T165 2 T347 84
fsm_err owner_sw_cfg 2785 1 T169 13 T348 443 T160 25
fsm_err creator_sw_cfg 4530 1 T252 136 T159 49 T349 341
fsm_err vendor_test 13093 1 T5 144 T14 140 T102 120
access_err life_cycle 792 1 T4 19 T6 4 T12 18
access_err secret2 11005 1 T1 4 T4 77 T5 13
access_err secret1 5997 1 T1 5 T5 5 T15 144
access_err secret0 4858 1 T1 4 T4 3 T5 13
access_err hw_cfg1 1264 1 T1 3 T4 5 T6 3
access_err hw_cfg0 2104 1 T1 2 T5 10 T15 34
access_err rot_creator_auth_state 6196 1 T1 3 T4 43 T5 17
access_err rot_creator_auth_codesign 8364 1 T1 1 T4 54 T5 8
access_err owner_sw_cfg 7215 1 T1 1 T4 20 T5 2
access_err creator_sw_cfg 8088 1 T4 79 T5 7 T6 26
access_err vendor_test 8004 1 T4 73 T5 12 T6 34
write_blank_err secret2 14 1 T162 1 T131 1 T279 1
write_blank_err secret1 24 1 T4 1 T158 1 T339 1
write_blank_err secret0 44 1 T163 1 T239 1 T73 1
write_blank_err hw_cfg1 81 1 T4 1 T6 3 T12 2
write_blank_err hw_cfg0 22 1 T339 1 T350 1 T249 1
write_blank_err rot_creator_auth_state 140 1 T12 1 T158 4 T164 3
write_blank_err rot_creator_auth_codesign 50 1 T148 5 T239 2 T139 1
write_blank_err owner_sw_cfg 25 1 T164 1 T148 1 T239 2
write_blank_err creator_sw_cfg 22 1 T162 1 T73 1 T351 1
write_blank_err vendor_test 30 1 T131 2 T249 1 T139 2
ecc_uncorr_err secret2 5891 1 T162 309 T131 264 T352 61
ecc_uncorr_err secret1 7519 1 T4 214 T158 302 T339 75
ecc_uncorr_err secret0 16294 1 T163 249 T165 2 T239 209
ecc_uncorr_err hw_cfg1 21163 1 T4 228 T6 327 T12 722
ecc_uncorr_err hw_cfg0 5475 1 T165 3 T350 62 T159 95
ecc_uncorr_err rot_creator_auth_state 5860 1 T138 501 T178 46 T277 588
ecc_uncorr_err rot_creator_auth_codesign 1187 1 T353 34 T207 15 T223 14
ecc_uncorr_err owner_sw_cfg 818 1 T159 58 T178 38 T217 43
ecc_uncorr_err creator_sw_cfg 784 1 T165 5 T169 21 T233 7
ecc_corr_err secret2 86 1 T14 1 T41 3 T217 1
ecc_corr_err secret1 139 1 T14 6 T94 1 T178 2
ecc_corr_err secret0 178 1 T5 6 T14 4 T94 1
ecc_corr_err hw_cfg1 280 1 T5 4 T6 1 T14 5
ecc_corr_err hw_cfg0 220 1 T5 22 T14 15 T165 1
ecc_corr_err rot_creator_auth_state 136 1 T94 2 T159 1 T41 2
ecc_corr_err rot_creator_auth_codesign 87 1 T160 3 T218 1 T353 1
ecc_corr_err owner_sw_cfg 145 1 T5 13 T14 1 T159 1
ecc_corr_err creator_sw_cfg 120 1 T14 1 T165 1 T100 1
no_err secret2 5490 1 T1 1 T2 7 T4 42
no_err secret1 8874 1 T1 5 T2 1 T4 92
no_err secret0 8589 1 T1 1 T2 1 T4 100
no_err hw_cfg1 10770 1 T1 7 T2 1 T4 87
no_err hw_cfg0 12657 1 T1 4 T2 5 T4 87
no_err rot_creator_auth_state 8631 1 T1 4 T2 2 T4 70
no_err rot_creator_auth_codesign 8951 1 T1 1 T2 4 T4 64
no_err owner_sw_cfg 9414 1 T1 6 T4 60 T5 7
no_err creator_sw_cfg 8574 1 T1 3 T2 4 T4 63
no_err vendor_test 9807 1 T1 12 T2 2 T4 60


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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