e3fb01b5e
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | smoke | pattgen_smoke | 5.000s | 109.711us | 50 | 50 | 100.00 |
V1 | csr_hw_reset | pattgen_csr_hw_reset | 3.000s | 39.551us | 5 | 5 | 100.00 |
V1 | csr_rw | pattgen_csr_rw | 4.000s | 13.236us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | pattgen_csr_bit_bash | 5.000s | 804.642us | 5 | 5 | 100.00 |
V1 | csr_aliasing | pattgen_csr_aliasing | 3.000s | 55.235us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | pattgen_csr_mem_rw_with_rand_reset | 4.000s | 23.997us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | pattgen_csr_rw | 4.000s | 13.236us | 20 | 20 | 100.00 |
pattgen_csr_aliasing | 3.000s | 55.235us | 5 | 5 | 100.00 | ||
V1 | TOTAL | 105 | 105 | 100.00 | |||
V2 | perf | pattgen_perf | 2.600m | 16.443ms | 50 | 50 | 100.00 |
V2 | cnt_rollover | cnt_rollover | 1.800m | 2.742ms | 50 | 50 | 100.00 |
V2 | error | pattgen_error | 4.000s | 73.983us | 50 | 50 | 100.00 |
V2 | stress_all | pattgen_stress_all | 1.950m | 4.325ms | 50 | 50 | 100.00 |
V2 | alert_test | pattgen_alert_test | 3.000s | 35.836us | 50 | 50 | 100.00 |
V2 | intr_test | pattgen_intr_test | 4.000s | 22.050us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | pattgen_tl_errors | 5.000s | 74.027us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | pattgen_tl_errors | 5.000s | 74.027us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | pattgen_csr_hw_reset | 3.000s | 39.551us | 5 | 5 | 100.00 |
pattgen_csr_rw | 4.000s | 13.236us | 20 | 20 | 100.00 | ||
pattgen_csr_aliasing | 3.000s | 55.235us | 5 | 5 | 100.00 | ||
pattgen_same_csr_outstanding | 4.000s | 30.432us | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | pattgen_csr_hw_reset | 3.000s | 39.551us | 5 | 5 | 100.00 |
pattgen_csr_rw | 4.000s | 13.236us | 20 | 20 | 100.00 | ||
pattgen_csr_aliasing | 3.000s | 55.235us | 5 | 5 | 100.00 | ||
pattgen_same_csr_outstanding | 4.000s | 30.432us | 20 | 20 | 100.00 | ||
V2 | TOTAL | 340 | 340 | 100.00 | |||
V2S | tl_intg_err | pattgen_tl_intg_err | 4.000s | 384.977us | 20 | 20 | 100.00 |
pattgen_sec_cm | 2.000s | 138.657us | 5 | 5 | 100.00 | ||
V2S | sec_cm_bus_integrity | pattgen_tl_intg_err | 4.000s | 384.977us | 20 | 20 | 100.00 |
V2S | TOTAL | 25 | 25 | 100.00 | |||
V3 | stress_all_with_rand_reset | pattgen_stress_all_with_rand_reset | 30.250m | 406.134ms | 46 | 50 | 92.00 |
V3 | TOTAL | 46 | 50 | 92.00 | |||
TOTAL | 516 | 520 | 99.23 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 6 | 6 | 6 | 100.00 |
V2 | 8 | 8 | 8 | 100.00 |
V2S | 2 | 2 | 2 | 100.00 |
V3 | 1 | 1 | 0 | 0.00 |
Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
---|---|---|---|---|---|---|---|---|
98.81 | 100.00 | 100.00 | 100.00 | 99.06 | 96.13 | -- | 100.00 | 90.43 |
UVM_ERROR (pattgen_scoreboard.sv:207) scoreboard [scoreboard]
has 3 failures:
1.pattgen_stress_all_with_rand_reset.3444299138
Line 403, in log /container/opentitan-public/scratch/os_regression/pattgen-sim-xcelium/1.pattgen_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 3570347343 ps: (pattgen_scoreboard.sv:207) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
--> channel 1 item mismatch!
--> EXP:
------------------------------------
Name Type Size Value
11.pattgen_stress_all_with_rand_reset.2978270016
Line 253, in log /container/opentitan-public/scratch/os_regression/pattgen-sim-xcelium/11.pattgen_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 476862158 ps: (pattgen_scoreboard.sv:207) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard]
--> channel 0 item mismatch!
--> EXP:
-------------------------------------
Name Type Size Value
... and 1 more failures.
UVM_ERROR (pattgen_scoreboard.sv:249) [scoreboard] exp_item_q[i] item uncompared:
has 1 failures:
23.pattgen_stress_all_with_rand_reset.1307046099
Line 769, in log /container/opentitan-public/scratch/os_regression/pattgen-sim-xcelium/23.pattgen_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 72010607500 ps: (pattgen_scoreboard.sv:249) [uvm_test_top.env.scoreboard] exp_item_q[i] item uncompared:
------------------------------------
Name Type Size Value
------------------------------------
exp_item pattgen_item - @11767