PWM Simulation Results

Wednesday December 20 2023 20:02:55 UTC

GitHub Revision: 9601d3bbdd

Branch: os_regression

Testplan

Simulator: XCELIUM

Build randomization enabled with --build-seed 30104064247514112511662306974640835321092728874679524971043777466318536599043

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke pwm_smoke 15.000s 515.508us 50 50 100.00
V1 csr_hw_reset pwm_csr_hw_reset 2.000s 52.820us 5 5 100.00
V1 csr_rw pwm_csr_rw 7.000s 160.095us 20 20 100.00
V1 csr_bit_bash pwm_csr_bit_bash 15.000s 959.705us 5 5 100.00
V1 csr_aliasing pwm_csr_aliasing 5.000s 83.612us 5 5 100.00
V1 csr_mem_rw_with_rand_reset pwm_csr_mem_rw_with_rand_reset 4.000s 49.983us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr pwm_csr_rw 7.000s 160.095us 20 20 100.00
pwm_csr_aliasing 5.000s 83.612us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 dutycycle pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 pulse pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 blink pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 heartbeat pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 resolution pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 multi_channel pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 polarity pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 phase pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 lowpower pwm_rand_output 1.117m 41.993ms 50 50 100.00
V2 perf pwm_perf 57.000s 43.751ms 50 50 100.00
V2 stress_all pwm_stress_all 5.050m 158.762ms 48 50 96.00
V2 alert_test pwm_alert_test 8.000s 12.786us 50 50 100.00
V2 intr_test pwm_intr_test 7.000s 34.817us 50 50 100.00
V2 tl_d_oob_addr_access pwm_tl_errors 7.000s 56.403us 20 20 100.00
V2 tl_d_illegal_access pwm_tl_errors 7.000s 56.403us 20 20 100.00
V2 tl_d_outstanding_access pwm_csr_hw_reset 2.000s 52.820us 5 5 100.00
pwm_csr_rw 7.000s 160.095us 20 20 100.00
pwm_csr_aliasing 5.000s 83.612us 5 5 100.00
pwm_same_csr_outstanding 14.000s 33.036us 20 20 100.00
V2 tl_d_partial_access pwm_csr_hw_reset 2.000s 52.820us 5 5 100.00
pwm_csr_rw 7.000s 160.095us 20 20 100.00
pwm_csr_aliasing 5.000s 83.612us 5 5 100.00
pwm_same_csr_outstanding 14.000s 33.036us 20 20 100.00
V2 TOTAL 288 290 99.31
V2S tl_intg_err pwm_tl_intg_err 9.000s 78.716us 20 20 100.00
pwm_sec_cm 2.000s 275.183us 5 5 100.00
V2S sec_cm_bus_integrity pwm_tl_intg_err 9.000s 78.716us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
TOTAL 418 420 99.52

Testplan Progress

Items Total Written Passing Progress
V1 6 6 6 100.00
V2 7 7 6 85.71
V2S 2 2 2 100.00

Failure Buckets

Past Results