Module Definition
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Module : rom_ctrl_mux
SCORELINECONDTOGGLEFSMBRANCHASSERT
95.24 100.00 85.71 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_mux 95.24 100.00 85.71 100.00



Module Instance : tb.dut.u_mux

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
95.24 100.00 85.71 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
95.24 100.00 85.71 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
94.98 100.00 98.28 97.33 100.00 79.31 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_sel_bus_q_flop 100.00 100.00 100.00
u_sel_bus_qq_flop 100.00 100.00 100.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : rom_ctrl_mux
Line No.TotalCoveredPercent
TOTAL1717100.00
CONT_ASSIGN6811100.00
CONT_ASSIGN7711100.00
CONT_ASSIGN8311100.00
CONT_ASSIGN9111100.00
CONT_ASSIGN9711100.00
CONT_ASSIGN10111100.00
ALWAYS10433100.00
CONT_ASSIGN11111100.00
CONT_ASSIGN11411100.00
CONT_ASSIGN11511100.00
CONT_ASSIGN11811100.00
CONT_ASSIGN12011100.00
CONT_ASSIGN12211100.00
CONT_ASSIGN12311100.00
CONT_ASSIGN12411100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' or '../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
68 1 1
77 1 1
83 1 1
91 1 1
97 1 1
101 1 1
104 1 1
105 1 1
107 1 1
111 1 1
114 1 1
115 1 1
118 1 1
120 1 1
122 1 1
123 1 1
124 1 1


Cond Coverage for Module : rom_ctrl_mux
TotalCoveredPercent
Conditions7685.71
Logical7685.71
Non-Logical00
Event00

 LINE       101
 EXPRESSION (sel_invalid | sel_reverted | sel_q_reverted)
             -----1-----   ------2-----   -------3------
-1--2--3-StatusTests
000CoveredT1,T2,T3
001Not Covered
010CoveredT18,T27,T28
100CoveredT2,T18,T27

 LINE       107
 EXPRESSION (alert_q | alert_d)
             ---1---   ---2---
-1--2-StatusTests
00CoveredT1,T2,T3
01CoveredT2,T18,T27
10CoveredT18,T27,T28

Branch Coverage for Module : rom_ctrl_mux
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 104 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' or '../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 104 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%