Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	88307	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

881720

1

T1

18

T2

19

T3

14

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	243541	1			T1	32		T2	32		T3	32
values[0x0]	337124	1			T6	3		T37	3		T38	2
values[0x1]	389362	1			T6	5		T37	3		T38	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40709	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

929318

1

T1

21

T2

20

T3

18

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4617	1			T1	1		T13	1		T29	7
valid_sources[0x01]	4151	1			T14	271		T116	1		T15	146
valid_sources[0x02]	3725	1			T9	1		T39	1		T44	1
valid_sources[0x03]	4473	1			T9	1		T13	3		T14	311
valid_sources[0x04]	3964	1			T14	116		T57	1		T15	143
valid_sources[0x05]	3079	1			T14	105		T116	1		T15	141
valid_sources[0x06]	3953	1			T1	1		T18	1		T14	383
valid_sources[0x07]	4396	1			T14	336		T57	1		T117	4
valid_sources[0x08]	3377	1			T14	391		T15	133		T16	292
valid_sources[0x09]	4100	1			T13	4		T14	11		T15	116
valid_sources[0x0a]	4016	1			T3	1		T14	264		T15	103
valid_sources[0x0b]	4056	1			T14	140		T80	1		T82	1
valid_sources[0x0c]	4208	1			T8	1		T14	4		T80	1
valid_sources[0x0d]	4307	1			T9	1		T14	389		T116	2
valid_sources[0x0e]	2972	1			T1	1		T18	1		T14	5
valid_sources[0x0f]	3519	1			T39	3		T14	247		T57	2
valid_sources[0x10]	3684	1			T14	164		T55	1		T34	4
valid_sources[0x11]	3854	1			T14	325		T57	1		T44	1
valid_sources[0x12]	2931	1			T55	5		T15	171		T16	391
valid_sources[0x13]	3550	1			T39	1		T14	341		T57	2
valid_sources[0x14]	3486	1			T14	428		T118	1		T15	111
valid_sources[0x15]	4245	1			T14	278		T57	2		T15	122
valid_sources[0x16]	3249	1			T17	1		T52	7		T57	1
valid_sources[0x17]	3050	1			T14	202		T80	1		T118	2
valid_sources[0x18]	3649	1			T14	5		T118	1		T44	2
valid_sources[0x19]	3791	1			T3	1		T14	197		T15	112
valid_sources[0x1a]	3544	1			T15	135		T16	248		T119	1
valid_sources[0x1b]	3785	1			T9	1		T14	143		T118	1
valid_sources[0x1c]	4232	1			T39	1		T14	334		T80	1
valid_sources[0x1d]	3737	1			T14	1		T15	136		T16	342
valid_sources[0x1e]	3901	1			T1	1		T8	2		T14	213
valid_sources[0x1f]	3166	1			T9	1		T14	229		T15	116
valid_sources[0x20]	3495	1			T8	1		T39	1		T14	91
valid_sources[0x21]	4694	1			T14	523		T57	1		T116	3
valid_sources[0x22]	3975	1			T14	140		T116	1		T15	142
valid_sources[0x23]	3882	1			T14	236		T120	3		T15	126
valid_sources[0x24]	3757	1			T14	26		T80	1		T81	6
valid_sources[0x25]	3329	1			T14	134		T80	1		T15	140
valid_sources[0x26]	3373	1			T1	1		T9	1		T26	1
valid_sources[0x27]	3960	1			T14	521		T118	1		T15	129
valid_sources[0x28]	3549	1			T39	1		T14	46		T118	1
valid_sources[0x29]	2819	1			T55	5		T15	129		T16	295
valid_sources[0x2a]	3757	1			T18	1		T14	180		T15	125
valid_sources[0x2b]	3559	1			T39	1		T14	9		T27	1
valid_sources[0x2c]	3707	1			T39	1		T14	264		T15	121
valid_sources[0x2d]	3140	1			T9	1		T13	6		T14	85
valid_sources[0x2e]	3014	1			T8	1		T65	1		T14	78
valid_sources[0x2f]	5090	1			T8	1		T14	228		T57	2
valid_sources[0x30]	3438	1			T8	1		T13	1		T14	61
valid_sources[0x31]	4455	1			T18	1		T14	664		T57	1
valid_sources[0x32]	3241	1			T42	2		T44	2		T15	112
valid_sources[0x33]	3970	1			T14	282		T55	13		T15	105
valid_sources[0x34]	3591	1			T3	1		T9	1		T15	113
valid_sources[0x35]	3434	1			T3	1		T14	5		T57	2
valid_sources[0x36]	3980	1			T1	1		T39	1		T13	7
valid_sources[0x37]	3403	1			T8	2		T17	3		T82	2
valid_sources[0x38]	3425	1			T8	1		T13	5		T14	4
valid_sources[0x39]	3438	1			T9	1		T38	1		T14	437
valid_sources[0x3a]	3929	1			T14	17		T82	1		T15	156
valid_sources[0x3b]	3500	1			T14	96		T117	1		T118	1
valid_sources[0x3c]	4067	1			T9	2		T14	7		T121	1
valid_sources[0x3d]	3624	1			T14	10		T53	4		T15	118
valid_sources[0x3e]	3884	1			T57	1		T15	131		T16	292
valid_sources[0x3f]	3016	1			T14	9		T15	135		T16	237
valid_sources[0x40]	4146	1			T39	1		T14	361		T15	125
valid_sources[0x41]	3264	1			T1	1		T9	1		T17	12
valid_sources[0x42]	2794	1			T33	1		T122	5		T15	125
valid_sources[0x43]	3858	1			T42	2		T14	89		T15	166
valid_sources[0x44]	3548	1			T42	2		T14	157		T117	6
valid_sources[0x45]	3869	1			T14	73		T15	125		T16	347
valid_sources[0x46]	3594	1			T66	1		T14	354		T118	1
valid_sources[0x47]	2681	1			T14	33		T15	127		T16	238
valid_sources[0x48]	4465	1			T3	1		T13	16		T14	412
valid_sources[0x49]	5289	1			T8	1		T9	1		T13	4
valid_sources[0x4a]	3866	1			T3	1		T14	12		T118	2
valid_sources[0x4b]	3714	1			T9	1		T18	1		T13	1
valid_sources[0x4c]	3786	1			T66	1		T14	1		T80	2
valid_sources[0x4d]	4052	1			T1	1		T14	698		T116	1
valid_sources[0x4e]	4256	1			T3	1		T14	854		T55	1
valid_sources[0x4f]	4314	1			T14	122		T57	2		T15	167
valid_sources[0x50]	3598	1			T33	1		T14	9		T117	2
valid_sources[0x51]	3515	1			T13	9		T14	7		T15	126
valid_sources[0x52]	3423	1			T14	16		T116	1		T70	3
valid_sources[0x53]	3081	1			T1	1		T18	1		T13	1
valid_sources[0x54]	3323	1			T1	1		T7	96		T14	2
valid_sources[0x55]	3669	1			T14	743		T80	1		T15	132
valid_sources[0x56]	3476	1			T18	1		T14	177		T53	4
valid_sources[0x57]	4143	1			T14	382		T120	2		T15	128
valid_sources[0x58]	3781	1			T39	1		T13	3		T14	370
valid_sources[0x59]	4443	1			T13	10		T79	32		T14	122
valid_sources[0x5a]	4153	1			T9	1		T14	703		T80	1
valid_sources[0x5b]	4525	1			T3	1		T42	1		T14	735
valid_sources[0x5c]	4534	1			T14	158		T57	1		T15	157
valid_sources[0x5d]	3378	1			T39	3		T14	297		T123	1
valid_sources[0x5e]	3544	1			T8	1		T14	303		T82	1
valid_sources[0x5f]	3943	1			T38	1		T14	311		T82	1
valid_sources[0x60]	3753	1			T9	1		T14	122		T15	128
valid_sources[0x61]	4251	1			T14	531		T116	1		T120	1
valid_sources[0x62]	4354	1			T39	2		T14	517		T15	130
valid_sources[0x63]	3434	1			T14	194		T57	2		T116	1
valid_sources[0x64]	4340	1			T14	319		T52	6		T80	1
valid_sources[0x65]	3562	1			T1	1		T38	1		T14	177
valid_sources[0x66]	3311	1			T14	226		T82	1		T118	1
valid_sources[0x67]	3360	1			T9	1		T14	92		T80	1
valid_sources[0x68]	3643	1			T18	2		T14	506		T31	24
valid_sources[0x69]	3746	1			T8	1		T39	1		T14	4
valid_sources[0x6a]	2746	1			T42	1		T14	16		T15	127
valid_sources[0x6b]	3835	1			T1	2		T14	478		T15	149
valid_sources[0x6c]	4089	1			T1	1		T14	429		T57	4
valid_sources[0x6d]	4197	1			T8	1		T14	141		T15	143
valid_sources[0x6e]	3721	1			T5	1		T14	208		T57	2
valid_sources[0x6f]	4364	1			T14	320		T55	8		T81	1
valid_sources[0x70]	3291	1			T1	3		T13	4		T14	276
valid_sources[0x71]	3642	1			T1	1		T18	2		T13	3
valid_sources[0x72]	3397	1			T3	2		T5	8		T14	232
valid_sources[0x73]	4272	1			T3	1		T14	365		T80	2
valid_sources[0x74]	3507	1			T14	308		T15	120		T16	329
valid_sources[0x75]	3043	1			T15	134		T16	227		T45	520
valid_sources[0x76]	4468	1			T5	2		T18	3		T14	77
valid_sources[0x77]	3008	1			T14	123		T57	1		T82	1
valid_sources[0x78]	4329	1			T10	20		T14	121		T57	3
valid_sources[0x79]	4008	1			T39	1		T14	222		T57	1
valid_sources[0x7a]	4621	1			T1	1		T42	1		T14	54
valid_sources[0x7b]	3370	1			T8	2		T13	1		T14	131
valid_sources[0x7c]	3371	1			T14	6		T57	1		T81	4
valid_sources[0x7d]	5079	1			T39	2		T14	513		T15	162
valid_sources[0x7e]	3451	1			T14	146		T116	1		T15	138
valid_sources[0x7f]	3446	1			T3	1		T14	4		T81	2
valid_sources[0x80]	3223	1			T33	1		T14	154		T82	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

222485

1

T1

18

T2

19

T3

14

values[0x0]

all_enables

biggest_size

329981

1

T6

1

T37

2

T38

1

values[0x1]

all_enables

biggest_size

329254

1

T38

1

T66

1

T14

19772

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	208485	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

862099

1

T1

6

T2

4

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	251108	1			T1	68		T2	61		T3	62
values[0x0]	338879	1			T14	20772		T15	11125		T16	24464
values[0x1]	480597	1			T14	29264		T15	16282		T16	35379

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	79901	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

990683

1

T1

39

T2

30

T3

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4160	1			T11	7		T12	2		T39	3
valid_sources[0x01]	3747	1			T7	8		T19	1		T39	1
valid_sources[0x02]	3787	1			T7	4		T11	11		T19	2
valid_sources[0x03]	5053	1			T8	6		T12	6		T13	23
valid_sources[0x04]	4194	1			T11	1		T12	1		T39	1
valid_sources[0x05]	3846	1			T2	1		T11	2		T12	4
valid_sources[0x06]	3364	1			T5	1		T12	3		T19	2
valid_sources[0x07]	3740	1			T5	1		T8	6		T19	7
valid_sources[0x08]	3595	1			T1	2		T7	2		T17	4
valid_sources[0x09]	3628	1			T11	3		T104	2		T14	264
valid_sources[0x0a]	3835	1			T5	1		T14	254		T57	1
valid_sources[0x0b]	4672	1			T2	1		T11	1		T12	4
valid_sources[0x0c]	4838	1			T7	2		T39	1		T104	2
valid_sources[0x0d]	3648	1			T12	3		T104	2		T96	1
valid_sources[0x0e]	4296	1			T17	9		T12	4		T19	12
valid_sources[0x0f]	3864	1			T7	1		T8	5		T11	1
valid_sources[0x10]	3727	1			T5	1		T8	5		T12	2
valid_sources[0x11]	3699	1			T1	1		T17	6		T11	2
valid_sources[0x12]	3730	1			T1	4		T17	5		T11	7
valid_sources[0x13]	4940	1			T1	1		T11	1		T104	1
valid_sources[0x14]	3874	1			T17	3		T12	3		T96	1
valid_sources[0x15]	4096	1			T12	1		T19	6		T13	11
valid_sources[0x16]	4329	1			T2	1		T7	7		T39	1
valid_sources[0x17]	3576	1			T1	1		T39	1		T104	3
valid_sources[0x18]	3982	1			T11	1		T12	1		T14	200
valid_sources[0x19]	4156	1			T7	3		T29	3		T79	1
valid_sources[0x1a]	4877	1			T1	1		T11	1		T104	1
valid_sources[0x1b]	4657	1			T5	1		T7	1		T11	1
valid_sources[0x1c]	3655	1			T2	2		T39	1		T104	2
valid_sources[0x1d]	4342	1			T5	2		T11	1		T12	10
valid_sources[0x1e]	4605	1			T2	1		T7	8		T11	1
valid_sources[0x1f]	4065	1			T1	1		T104	2		T96	1
valid_sources[0x20]	4197	1			T11	4		T12	1		T19	4
valid_sources[0x21]	4858	1			T1	1		T12	1		T39	2
valid_sources[0x22]	3554	1			T11	2		T61	7		T104	1
valid_sources[0x23]	4329	1			T7	1		T10	2		T39	1
valid_sources[0x24]	3855	1			T1	1		T11	7		T96	2
valid_sources[0x25]	4122	1			T1	1		T7	1		T11	1
valid_sources[0x26]	4216	1			T11	8		T39	1		T96	1
valid_sources[0x27]	3400	1			T39	4		T104	1		T96	2
valid_sources[0x28]	3771	1			T11	5		T12	5		T39	1
valid_sources[0x29]	3703	1			T5	1		T96	2		T14	270
valid_sources[0x2a]	6964	1			T1	1		T11	1		T19	4
valid_sources[0x2b]	4026	1			T9	30		T19	3		T14	244
valid_sources[0x2c]	3742	1			T1	1		T96	3		T14	281
valid_sources[0x2d]	3304	1			T1	1		T2	1		T11	2
valid_sources[0x2e]	4120	1			T19	1		T96	3		T14	275
valid_sources[0x2f]	3728	1			T2	2		T5	2		T12	1
valid_sources[0x30]	3415	1			T104	2		T14	287		T55	11
valid_sources[0x31]	4084	1			T12	3		T104	7		T14	297
valid_sources[0x32]	3488	1			T17	6		T12	1		T61	6
valid_sources[0x33]	4658	1			T11	2		T19	1		T104	2
valid_sources[0x34]	4417	1			T5	1		T104	1		T14	275
valid_sources[0x35]	4451	1			T7	3		T11	2		T12	7
valid_sources[0x36]	4014	1			T2	1		T5	1		T11	1
valid_sources[0x37]	4740	1			T1	1		T5	2		T11	2
valid_sources[0x38]	4077	1			T12	5		T19	4		T96	1
valid_sources[0x39]	3704	1			T4	20		T11	6		T12	1
valid_sources[0x3a]	6411	1			T2	1		T11	1		T104	3
valid_sources[0x3b]	3781	1			T1	1		T2	3		T5	1
valid_sources[0x3c]	3968	1			T17	1		T12	1		T104	1
valid_sources[0x3d]	3530	1			T7	11		T96	1		T97	28
valid_sources[0x3e]	3632	1			T8	1		T39	1		T104	4
valid_sources[0x3f]	4275	1			T5	1		T7	1		T12	1
valid_sources[0x40]	4365	1			T11	1		T104	1		T14	237
valid_sources[0x41]	3743	1			T1	1		T5	1		T11	3
valid_sources[0x42]	4840	1			T1	1		T7	1		T104	1
valid_sources[0x43]	3938	1			T11	6		T39	1		T97	13
valid_sources[0x44]	3830	1			T1	1		T19	2		T39	1
valid_sources[0x45]	4789	1			T11	2		T12	5		T39	1
valid_sources[0x46]	4160	1			T8	3		T12	6		T61	2
valid_sources[0x47]	4288	1			T4	15		T7	5		T11	1
valid_sources[0x48]	4071	1			T7	3		T11	1		T19	6
valid_sources[0x49]	3559	1			T5	2		T10	1		T11	2
valid_sources[0x4a]	5174	1			T12	4		T104	1		T96	1
valid_sources[0x4b]	4138	1			T1	1		T12	1		T96	3
valid_sources[0x4c]	3812	1			T1	1		T7	2		T11	5
valid_sources[0x4d]	3560	1			T1	1		T2	2		T5	1
valid_sources[0x4e]	4730	1			T3	19		T11	8		T96	3
valid_sources[0x4f]	3659	1			T12	1		T42	31		T104	1
valid_sources[0x50]	4013	1			T5	1		T61	2		T96	2
valid_sources[0x51]	4666	1			T4	16		T11	3		T61	1
valid_sources[0x52]	5005	1			T1	1		T11	2		T13	37
valid_sources[0x53]	3628	1			T12	4		T104	2		T96	2
valid_sources[0x54]	3865	1			T2	2		T96	1		T14	238
valid_sources[0x55]	5008	1			T104	1		T14	279		T52	1
valid_sources[0x56]	4034	1			T8	5		T12	7		T39	1
valid_sources[0x57]	3909	1			T61	4		T104	1		T14	246
valid_sources[0x58]	4077	1			T2	1		T11	3		T19	2
valid_sources[0x59]	5727	1			T5	1		T8	3		T11	4
valid_sources[0x5a]	3913	1			T11	1		T39	1		T104	1
valid_sources[0x5b]	3768	1			T11	1		T12	5		T39	1
valid_sources[0x5c]	4353	1			T104	5		T96	3		T14	284
valid_sources[0x5d]	3875	1			T7	1		T11	4		T104	1
valid_sources[0x5e]	4092	1			T5	1		T12	2		T96	2
valid_sources[0x5f]	4970	1			T1	1		T11	2		T12	4
valid_sources[0x60]	3793	1			T5	1		T11	1		T19	3
valid_sources[0x61]	3436	1			T1	1		T11	4		T104	2
valid_sources[0x62]	4014	1			T1	1		T19	2		T96	2
valid_sources[0x63]	4251	1			T104	1		T96	2		T14	258
valid_sources[0x64]	5374	1			T1	1		T5	1		T12	3
valid_sources[0x65]	4165	1			T1	1		T12	3		T19	2
valid_sources[0x66]	3364	1			T11	1		T39	2		T13	58
valid_sources[0x67]	3729	1			T17	5		T104	1		T96	5
valid_sources[0x68]	4054	1			T1	1		T2	1		T4	19
valid_sources[0x69]	3531	1			T1	1		T5	3		T11	8
valid_sources[0x6a]	4122	1			T8	4		T12	5		T19	5
valid_sources[0x6b]	4496	1			T12	5		T104	1		T96	1
valid_sources[0x6c]	3455	1			T39	1		T104	2		T79	1
valid_sources[0x6d]	3809	1			T1	1		T11	3		T12	3
valid_sources[0x6e]	5073	1			T2	1		T7	1		T12	2
valid_sources[0x6f]	4303	1			T12	3		T61	2		T79	1
valid_sources[0x70]	4449	1			T1	2		T2	1		T5	1
valid_sources[0x71]	3946	1			T1	1		T19	5		T104	2
valid_sources[0x72]	4286	1			T2	1		T7	4		T11	5
valid_sources[0x73]	4057	1			T7	9		T96	2		T97	21
valid_sources[0x74]	3627	1			T8	2		T19	1		T96	2
valid_sources[0x75]	3540	1			T7	15		T79	4		T14	272
valid_sources[0x76]	3983	1			T5	1		T7	2		T11	1
valid_sources[0x77]	3920	1			T7	5		T12	4		T104	2
valid_sources[0x78]	6039	1			T19	1		T96	4		T29	3
valid_sources[0x79]	3859	1			T7	1		T11	2		T12	1
valid_sources[0x7a]	4331	1			T11	3		T13	18		T104	2
valid_sources[0x7b]	3383	1			T11	1		T12	4		T96	1
valid_sources[0x7c]	3704	1			T5	1		T7	2		T11	6
valid_sources[0x7d]	3497	1			T11	7		T104	2		T96	1
valid_sources[0x7e]	3564	1			T1	1		T9	12		T104	1
valid_sources[0x7f]	3838	1			T104	1		T96	1		T79	1
valid_sources[0x80]	3401	1			T5	1		T8	1		T11	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

217692

1

T1

6

T2

4

T3

8

values[0x0]

all_enables

biggest_size

322437

1

T14

19806

T15

10545

T16

23353

values[0x1]

all_enables

biggest_size

321970

1

T14

19927

T15

10440

T16

23663