Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 129120 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1317396 1 T2 36 T3 31 T4 17



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 359757 1 T2 96 T3 64 T4 32
values[0x0] 503129 1 T7 1 T9 6823 T37 5
values[0x1] 583630 1 T7 4 T9 7892 T37 4



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 57302 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1389214 1 T2 48 T3 37 T4 18



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 6220 1 T9 144 T118 1 T13 309
valid_sources[0x01] 5591 1 T15 18 T13 299 T125 1
valid_sources[0x02] 5517 1 T30 2 T124 2 T13 8
valid_sources[0x03] 5320 1 T4 1 T13 299 T14 293
valid_sources[0x04] 4890 1 T9 6 T13 18 T45 103
valid_sources[0x05] 5283 1 T9 1 T13 4 T14 431
valid_sources[0x06] 6564 1 T9 570 T124 2 T13 161
valid_sources[0x07] 5844 1 T13 196 T14 216 T45 82
valid_sources[0x08] 6252 1 T9 78 T13 72 T14 92
valid_sources[0x09] 6537 1 T13 62 T125 2 T45 74
valid_sources[0x0a] 5027 1 T2 2 T3 5 T58 3
valid_sources[0x0b] 5403 1 T9 54 T30 1 T124 1
valid_sources[0x0c] 5666 1 T9 349 T124 2 T13 22
valid_sources[0x0d] 5463 1 T9 254 T118 1 T13 34
valid_sources[0x0e] 5850 1 T5 1 T118 1 T13 43
valid_sources[0x0f] 5729 1 T9 338 T118 1 T13 19
valid_sources[0x10] 6042 1 T13 324 T14 222 T139 1
valid_sources[0x11] 6865 1 T13 776 T140 7 T14 3
valid_sources[0x12] 4307 1 T9 79 T13 13 T140 4
valid_sources[0x13] 6627 1 T2 5 T9 57 T13 181
valid_sources[0x14] 5335 1 T19 1 T13 288 T139 9
valid_sources[0x15] 6511 1 T9 98 T13 297 T14 2
valid_sources[0x16] 5773 1 T13 120 T14 115 T45 94
valid_sources[0x17] 5824 1 T13 142 T14 187 T45 87
valid_sources[0x18] 5499 1 T9 147 T124 1 T13 12
valid_sources[0x19] 5615 1 T13 7 T14 222 T45 68
valid_sources[0x1a] 5746 1 T9 459 T13 354 T14 58
valid_sources[0x1b] 6112 1 T9 16 T124 3 T13 22
valid_sources[0x1c] 5056 1 T118 1 T13 10 T45 80
valid_sources[0x1d] 5490 1 T3 1 T9 78 T19 1
valid_sources[0x1e] 6583 1 T3 1 T13 149 T125 2
valid_sources[0x1f] 5665 1 T124 1 T13 147 T125 3
valid_sources[0x20] 4611 1 T9 11 T13 218 T125 1
valid_sources[0x21] 6300 1 T13 122 T125 1 T14 381
valid_sources[0x22] 4699 1 T13 187 T14 1 T45 111
valid_sources[0x23] 5700 1 T9 305 T124 3 T13 243
valid_sources[0x24] 5919 1 T3 6 T9 170 T124 1
valid_sources[0x25] 5477 1 T13 15 T14 111 T45 96
valid_sources[0x26] 6069 1 T9 333 T19 1 T13 200
valid_sources[0x27] 6060 1 T13 121 T14 221 T44 1
valid_sources[0x28] 5608 1 T8 1 T123 10 T13 177
valid_sources[0x29] 5809 1 T3 4 T4 1 T9 132
valid_sources[0x2a] 4735 1 T9 171 T13 15 T125 1
valid_sources[0x2b] 5064 1 T9 192 T13 31 T139 1
valid_sources[0x2c] 7008 1 T9 147 T58 1 T18 16
valid_sources[0x2d] 6101 1 T4 1 T9 2 T58 1
valid_sources[0x2e] 4793 1 T58 1 T13 528 T45 97
valid_sources[0x2f] 6346 1 T9 229 T58 2 T13 18
valid_sources[0x30] 5319 1 T9 182 T13 5 T140 4
valid_sources[0x31] 5774 1 T3 1 T124 1 T19 2
valid_sources[0x32] 4676 1 T2 1 T9 167 T13 153
valid_sources[0x33] 6296 1 T13 326 T125 3 T140 1
valid_sources[0x34] 4824 1 T124 1 T13 5 T14 219
valid_sources[0x35] 5589 1 T2 4 T9 236 T124 1
valid_sources[0x36] 5523 1 T124 1 T19 1 T13 114
valid_sources[0x37] 5382 1 T118 1 T19 1 T38 9
valid_sources[0x38] 4829 1 T13 49 T14 6 T139 3
valid_sources[0x39] 5945 1 T9 3 T75 24 T124 1
valid_sources[0x3a] 5832 1 T2 8 T118 1 T13 9
valid_sources[0x3b] 5441 1 T13 14 T14 58 T45 100
valid_sources[0x3c] 5048 1 T9 109 T19 1 T13 24
valid_sources[0x3d] 4954 1 T13 263 T14 309 T45 95
valid_sources[0x3e] 5860 1 T4 1 T13 566 T125 2
valid_sources[0x3f] 5919 1 T13 496 T14 6 T45 102
valid_sources[0x40] 4797 1 T124 1 T13 70 T14 102
valid_sources[0x41] 6117 1 T9 146 T13 54 T14 171
valid_sources[0x42] 5193 1 T9 12 T30 1 T13 80
valid_sources[0x43] 5927 1 T3 2 T9 286 T13 27
valid_sources[0x44] 5542 1 T4 1 T9 98 T13 217
valid_sources[0x45] 6585 1 T9 117 T13 317 T125 1
valid_sources[0x46] 5409 1 T9 140 T118 2 T124 1
valid_sources[0x47] 6808 1 T9 256 T13 449 T14 389
valid_sources[0x48] 4689 1 T124 2 T13 5 T14 115
valid_sources[0x49] 5647 1 T9 104 T13 120 T14 248
valid_sources[0x4a] 6440 1 T7 2 T13 278 T125 1
valid_sources[0x4b] 4754 1 T4 1 T18 4 T13 4
valid_sources[0x4c] 5497 1 T4 4 T9 197 T58 1
valid_sources[0x4d] 5789 1 T3 2 T4 1 T13 60
valid_sources[0x4e] 5412 1 T124 1 T13 141 T45 91
valid_sources[0x4f] 6273 1 T2 6 T9 106 T13 328
valid_sources[0x50] 5497 1 T9 31 T123 10 T13 183
valid_sources[0x51] 5574 1 T3 3 T4 1 T13 113
valid_sources[0x52] 5282 1 T13 164 T14 143 T45 104
valid_sources[0x53] 6259 1 T118 1 T13 157 T14 20
valid_sources[0x54] 6474 1 T4 1 T9 124 T13 187
valid_sources[0x55] 5671 1 T118 1 T124 1 T13 231
valid_sources[0x56] 4754 1 T2 13 T9 116 T118 1
valid_sources[0x57] 4984 1 T3 2 T13 8 T14 79
valid_sources[0x58] 6049 1 T13 29 T139 1 T45 71
valid_sources[0x59] 6929 1 T2 6 T9 279 T118 2
valid_sources[0x5a] 5870 1 T9 105 T13 38 T14 102
valid_sources[0x5b] 5687 1 T13 228 T14 116 T45 99
valid_sources[0x5c] 5062 1 T9 53 T13 5 T14 137
valid_sources[0x5d] 6202 1 T9 518 T124 1 T13 169
valid_sources[0x5e] 5565 1 T3 1 T9 105 T124 1
valid_sources[0x5f] 6260 1 T9 109 T19 2 T13 30
valid_sources[0x60] 5511 1 T124 1 T13 157 T125 1
valid_sources[0x61] 5490 1 T9 192 T58 2 T19 1
valid_sources[0x62] 6082 1 T9 326 T118 1 T124 1
valid_sources[0x63] 5928 1 T2 3 T13 434 T14 149
valid_sources[0x64] 5822 1 T9 6 T58 1 T13 23
valid_sources[0x65] 5060 1 T13 217 T45 90 T53 487
valid_sources[0x66] 4831 1 T13 101 T14 126 T139 1
valid_sources[0x67] 6112 1 T9 603 T13 302 T14 27
valid_sources[0x68] 4867 1 T124 1 T13 214 T44 1
valid_sources[0x69] 4800 1 T9 176 T118 1 T13 19
valid_sources[0x6a] 5949 1 T6 18 T9 15 T13 99
valid_sources[0x6b] 6942 1 T2 1 T9 186 T58 1
valid_sources[0x6c] 5196 1 T13 443 T139 2 T44 1
valid_sources[0x6d] 5445 1 T9 277 T13 164 T14 11
valid_sources[0x6e] 5548 1 T9 160 T13 60 T125 1
valid_sources[0x6f] 5137 1 T9 119 T19 1 T13 256
valid_sources[0x70] 5895 1 T9 320 T124 1 T13 58
valid_sources[0x71] 4222 1 T13 38 T14 5 T45 98
valid_sources[0x72] 5318 1 T19 1 T13 92 T140 1
valid_sources[0x73] 4879 1 T9 4 T124 1 T13 320
valid_sources[0x74] 5998 1 T9 111 T124 1 T13 833
valid_sources[0x75] 6204 1 T141 1 T13 39 T14 400
valid_sources[0x76] 5050 1 T124 2 T13 249 T14 111
valid_sources[0x77] 5992 1 T13 153 T14 5 T139 5
valid_sources[0x78] 6344 1 T9 71 T13 303 T125 2
valid_sources[0x79] 5356 1 T9 100 T124 2 T13 25
valid_sources[0x7a] 5741 1 T4 1 T7 1 T9 114
valid_sources[0x7b] 6196 1 T118 1 T124 2 T19 1
valid_sources[0x7c] 5446 1 T9 318 T58 1 T124 1
valid_sources[0x7d] 6011 1 T2 8 T13 97 T45 99
valid_sources[0x7e] 6244 1 T9 1 T37 3 T13 233
valid_sources[0x7f] 6503 1 T9 151 T118 1 T13 226
valid_sources[0x80] 5586 1 T4 2 T9 202 T13 7



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 332427 1 T2 36 T3 31 T4 17
values[0x0] all_enables biggest_size 492703 1 T7 1 T9 6689 T12 1
values[0x1] all_enables biggest_size 492266 1 T9 6678 T37 2 T38 2


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 296714 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1317197 1 T1 24 T2 18 T3 16



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 365264 1 T1 281 T2 174 T3 176
values[0x0] 517627 1 T9 7287 T13 15201 T14 12242
values[0x1] 731020 1 T9 10015 T13 20945 T14 17686



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 112757 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1501154 1 T1 163 T2 101 T3 103



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 6678 1 T1 1 T2 2 T4 1
valid_sources[0x01] 6275 1 T1 1 T3 1 T9 84
valid_sources[0x02] 5737 1 T1 1 T3 1 T9 96
valid_sources[0x03] 6896 1 T9 135 T10 4 T22 1
valid_sources[0x04] 6272 1 T1 5 T9 112 T10 1
valid_sources[0x05] 6390 1 T1 3 T2 3 T9 57
valid_sources[0x06] 5625 1 T4 1 T9 105 T75 1
valid_sources[0x07] 5978 1 T1 1 T3 1 T9 91
valid_sources[0x08] 5633 1 T1 1 T9 117 T10 4
valid_sources[0x09] 6109 1 T1 4 T9 64 T22 1
valid_sources[0x0a] 5988 1 T1 1 T3 2 T4 1
valid_sources[0x0b] 6964 1 T1 3 T2 1 T9 95
valid_sources[0x0c] 6235 1 T3 1 T9 114 T21 3
valid_sources[0x0d] 6204 1 T2 3 T9 88 T22 3
valid_sources[0x0e] 7366 1 T3 2 T9 68 T21 1
valid_sources[0x0f] 6963 1 T3 1 T9 91 T22 1
valid_sources[0x10] 5627 1 T2 4 T3 2 T4 3
valid_sources[0x11] 5702 1 T9 79 T21 2 T22 6
valid_sources[0x12] 6887 1 T3 1 T9 94 T21 1
valid_sources[0x13] 6089 1 T1 1 T2 4 T3 1
valid_sources[0x14] 5831 1 T2 2 T4 1 T9 84
valid_sources[0x15] 6554 1 T9 63 T22 1 T142 1
valid_sources[0x16] 5806 1 T9 78 T10 3 T22 1
valid_sources[0x17] 5742 1 T4 1 T9 66 T10 9
valid_sources[0x18] 5641 1 T1 7 T2 1 T9 74
valid_sources[0x19] 6620 1 T1 2 T3 1 T9 75
valid_sources[0x1a] 5857 1 T1 2 T3 2 T9 104
valid_sources[0x1b] 7158 1 T1 2 T2 1 T3 3
valid_sources[0x1c] 5520 1 T1 2 T3 1 T9 75
valid_sources[0x1d] 6585 1 T9 86 T10 4 T21 1
valid_sources[0x1e] 5906 1 T2 3 T9 71 T21 1
valid_sources[0x1f] 6229 1 T9 106 T10 2 T22 1
valid_sources[0x20] 6066 1 T1 2 T2 1 T4 2
valid_sources[0x21] 5706 1 T1 6 T3 1 T9 107
valid_sources[0x22] 6038 1 T4 1 T9 85 T22 2
valid_sources[0x23] 5860 1 T1 5 T2 1 T3 1
valid_sources[0x24] 5953 1 T3 1 T9 112 T10 2
valid_sources[0x25] 7765 1 T3 2 T4 1 T9 77
valid_sources[0x26] 6296 1 T9 62 T10 6 T22 2
valid_sources[0x27] 6451 1 T2 5 T3 2 T9 93
valid_sources[0x28] 6742 1 T1 2 T9 70 T22 2
valid_sources[0x29] 5653 1 T9 72 T15 1 T122 2
valid_sources[0x2a] 6478 1 T2 5 T3 1 T9 94
valid_sources[0x2b] 6366 1 T1 1 T9 74 T10 1
valid_sources[0x2c] 5975 1 T2 1 T9 87 T10 1
valid_sources[0x2d] 5942 1 T4 2 T9 117 T10 1
valid_sources[0x2e] 7843 1 T1 2 T3 3 T9 93
valid_sources[0x2f] 6552 1 T2 1 T9 77 T10 3
valid_sources[0x30] 7320 1 T9 72 T10 13 T21 1
valid_sources[0x31] 7721 1 T1 5 T9 66 T75 1
valid_sources[0x32] 5715 1 T1 5 T3 2 T9 78
valid_sources[0x33] 6154 1 T1 5 T9 105 T10 1
valid_sources[0x34] 7009 1 T2 3 T9 79 T10 5
valid_sources[0x35] 5681 1 T1 2 T4 1 T9 107
valid_sources[0x36] 6258 1 T1 2 T2 3 T3 1
valid_sources[0x37] 7055 1 T1 1 T2 4 T9 113
valid_sources[0x38] 6157 1 T3 1 T6 1 T9 87
valid_sources[0x39] 7755 1 T2 4 T3 1 T9 97
valid_sources[0x3a] 6141 1 T4 1 T9 74 T10 4
valid_sources[0x3b] 5684 1 T1 1 T4 1 T9 118
valid_sources[0x3c] 6160 1 T1 1 T3 1 T9 84
valid_sources[0x3d] 6992 1 T1 1 T2 6 T9 84
valid_sources[0x3e] 7397 1 T1 2 T9 81 T15 1
valid_sources[0x3f] 6644 1 T1 5 T2 1 T9 96
valid_sources[0x40] 6318 1 T2 2 T3 1 T9 103
valid_sources[0x41] 6367 1 T4 1 T9 108 T10 1
valid_sources[0x42] 5969 1 T4 2 T9 68 T22 1
valid_sources[0x43] 6574 1 T1 1 T3 1 T9 63
valid_sources[0x44] 6118 1 T1 1 T9 61 T10 5
valid_sources[0x45] 6669 1 T4 1 T9 116 T10 3
valid_sources[0x46] 6115 1 T4 1 T9 82 T10 1
valid_sources[0x47] 5654 1 T1 1 T9 83 T19 2
valid_sources[0x48] 6580 1 T1 2 T9 66 T19 1
valid_sources[0x49] 6948 1 T3 1 T9 122 T22 6
valid_sources[0x4a] 5935 1 T1 1 T9 70 T10 2
valid_sources[0x4b] 6340 1 T1 1 T3 1 T9 81
valid_sources[0x4c] 5626 1 T1 1 T2 3 T4 1
valid_sources[0x4d] 6098 1 T3 4 T9 93 T10 1
valid_sources[0x4e] 6060 1 T2 2 T4 2 T9 106
valid_sources[0x4f] 5431 1 T2 2 T9 110 T22 2
valid_sources[0x50] 5895 1 T2 9 T4 1 T9 69
valid_sources[0x51] 5554 1 T1 1 T3 1 T4 1
valid_sources[0x52] 6960 1 T1 3 T9 85 T22 1
valid_sources[0x53] 5628 1 T9 68 T10 1 T22 1
valid_sources[0x54] 6768 1 T1 3 T2 2 T3 1
valid_sources[0x55] 5839 1 T2 1 T3 1 T9 80
valid_sources[0x56] 6937 1 T1 1 T9 114 T10 1
valid_sources[0x57] 5625 1 T2 1 T9 64 T10 4
valid_sources[0x58] 5821 1 T1 1 T2 1 T3 1
valid_sources[0x59] 6033 1 T3 1 T9 87 T22 1
valid_sources[0x5a] 6546 1 T1 3 T9 77 T21 1
valid_sources[0x5b] 6668 1 T9 72 T15 1 T22 2
valid_sources[0x5c] 5867 1 T1 3 T2 2 T9 80
valid_sources[0x5d] 5411 1 T9 82 T10 1 T21 1
valid_sources[0x5e] 6064 1 T1 2 T3 1 T9 115
valid_sources[0x5f] 6294 1 T1 2 T2 3 T3 1
valid_sources[0x60] 6483 1 T1 2 T4 2 T9 73
valid_sources[0x61] 7430 1 T1 2 T9 112 T22 1
valid_sources[0x62] 6222 1 T1 1 T2 1 T4 2
valid_sources[0x63] 5648 1 T2 4 T9 70 T10 1
valid_sources[0x64] 6897 1 T1 1 T2 2 T9 111
valid_sources[0x65] 6442 1 T3 1 T9 98 T22 1
valid_sources[0x66] 6257 1 T2 2 T3 2 T4 1
valid_sources[0x67] 6348 1 T1 1 T9 95 T10 7
valid_sources[0x68] 6243 1 T3 1 T4 1 T9 70
valid_sources[0x69] 6997 1 T3 3 T9 77 T10 11
valid_sources[0x6a] 5705 1 T1 3 T3 2 T4 1
valid_sources[0x6b] 7900 1 T1 3 T2 4 T9 73
valid_sources[0x6c] 5596 1 T2 1 T9 87 T22 1
valid_sources[0x6d] 6019 1 T3 1 T9 87 T22 5
valid_sources[0x6e] 6806 1 T3 1 T9 84 T10 5
valid_sources[0x6f] 6972 1 T1 1 T2 2 T9 93
valid_sources[0x70] 5968 1 T3 2 T9 98 T10 2
valid_sources[0x71] 6493 1 T3 2 T9 103 T22 4
valid_sources[0x72] 5474 1 T1 3 T2 1 T3 3
valid_sources[0x73] 6495 1 T2 1 T3 1 T9 97
valid_sources[0x74] 6111 1 T9 81 T21 1 T22 2
valid_sources[0x75] 6313 1 T1 1 T2 3 T4 1
valid_sources[0x76] 7077 1 T3 3 T4 1 T9 94
valid_sources[0x77] 6066 1 T1 2 T9 86 T22 2
valid_sources[0x78] 7052 1 T2 7 T4 1 T9 90
valid_sources[0x79] 6754 1 T1 1 T2 2 T4 1
valid_sources[0x7a] 6210 1 T1 1 T9 99 T22 3
valid_sources[0x7b] 6294 1 T1 2 T6 1 T9 88
valid_sources[0x7c] 7065 1 T9 96 T21 1 T22 3
valid_sources[0x7d] 6663 1 T1 1 T9 79 T10 1
valid_sources[0x7e] 7095 1 T9 94 T10 2 T22 3
valid_sources[0x7f] 7121 1 T1 3 T2 2 T3 1
valid_sources[0x80] 5520 1 T4 1 T9 94 T22 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 331669 1 T1 24 T2 18 T3 16
values[0x0] all_enables biggest_size 492780 1 T9 6915 T13 14555 T14 11629
values[0x1] all_enables biggest_size 492748 1 T9 6626 T13 14558 T14 11669

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