Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_rom_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	118093	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1196776

1

T1

52736

T2

43

T4

43109

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	330074	1			T1	14707		T2	96		T3	10
values[0x0]	456510	1			T1	20026		T4	16252		T32	3
values[0x1]	528285	1			T1	23492		T4	19088		T32	2

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53508	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1261361

1

T1

55791

T2

59

T3

5

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5838	1			T1	195		T2	1		T4	228
valid_sources[0x01]	5258	1			T1	239		T4	188		T6	1
valid_sources[0x02]	5160	1			T1	237		T4	171		T69	1
valid_sources[0x03]	5089	1			T1	230		T4	190		T19	3
valid_sources[0x04]	4625	1			T1	205		T4	192		T6	1
valid_sources[0x05]	5091	1			T1	235		T4	162		T7	1
valid_sources[0x06]	4949	1			T1	248		T4	166		T31	1
valid_sources[0x07]	5234	1			T1	221		T2	1		T4	168
valid_sources[0x08]	5162	1			T1	192		T2	1		T4	185
valid_sources[0x09]	5869	1			T1	232		T3	1		T4	191
valid_sources[0x0a]	5337	1			T1	223		T2	2		T4	183
valid_sources[0x0b]	5280	1			T1	212		T4	193		T7	1
valid_sources[0x0c]	5171	1			T1	225		T4	179		T7	1
valid_sources[0x0d]	4465	1			T1	211		T4	190		T7	2
valid_sources[0x0e]	4875	1			T1	208		T4	177		T59	1
valid_sources[0x0f]	4573	1			T1	229		T4	181		T11	151
valid_sources[0x10]	4535	1			T1	226		T4	204		T7	2
valid_sources[0x11]	5019	1			T1	242		T4	187		T23	1
valid_sources[0x12]	5773	1			T1	228		T4	172		T23	1
valid_sources[0x13]	4913	1			T1	189		T4	182		T16	6
valid_sources[0x14]	5289	1			T1	257		T4	199		T24	1
valid_sources[0x15]	5359	1			T1	238		T4	201		T7	2
valid_sources[0x16]	5203	1			T1	193		T4	196		T113	1
valid_sources[0x17]	5779	1			T1	241		T2	1		T4	200
valid_sources[0x18]	5158	1			T1	235		T4	198		T6	1
valid_sources[0x19]	5736	1			T1	241		T2	1		T4	168
valid_sources[0x1a]	5785	1			T1	223		T4	178		T114	1
valid_sources[0x1b]	5184	1			T1	251		T2	1		T4	161
valid_sources[0x1c]	5355	1			T1	218		T4	216		T13	1
valid_sources[0x1d]	5013	1			T1	249		T2	1		T4	166
valid_sources[0x1e]	3939	1			T1	228		T2	1		T4	142
valid_sources[0x1f]	4920	1			T1	231		T4	167		T115	1
valid_sources[0x20]	5063	1			T1	221		T4	176		T115	1
valid_sources[0x21]	4975	1			T1	256		T2	1		T4	190
valid_sources[0x22]	5036	1			T1	229		T3	1		T4	187
valid_sources[0x23]	5069	1			T1	232		T2	3		T4	188
valid_sources[0x24]	5093	1			T1	231		T4	181		T13	1
valid_sources[0x25]	4794	1			T1	213		T4	163		T70	1
valid_sources[0x26]	4612	1			T1	226		T2	1		T4	214
valid_sources[0x27]	5472	1			T1	182		T2	1		T4	188
valid_sources[0x28]	4546	1			T1	221		T3	1		T4	193
valid_sources[0x29]	4890	1			T1	204		T2	1		T4	165
valid_sources[0x2a]	5752	1			T1	230		T4	178		T6	1
valid_sources[0x2b]	5111	1			T1	228		T4	185		T32	1
valid_sources[0x2c]	6137	1			T1	220		T2	1		T4	215
valid_sources[0x2d]	4782	1			T1	222		T4	162		T7	1
valid_sources[0x2e]	5573	1			T1	207		T4	192		T6	1
valid_sources[0x2f]	5370	1			T1	219		T4	205		T6	1
valid_sources[0x30]	5446	1			T1	238		T4	210		T7	1
valid_sources[0x31]	5034	1			T1	229		T2	1		T4	171
valid_sources[0x32]	5386	1			T1	226		T2	1		T4	212
valid_sources[0x33]	5436	1			T1	219		T4	181		T6	1
valid_sources[0x34]	4910	1			T1	233		T2	1		T4	217
valid_sources[0x35]	5457	1			T1	242		T4	175		T69	1
valid_sources[0x36]	5495	1			T1	222		T2	1		T4	204
valid_sources[0x37]	5366	1			T1	209		T2	1		T4	187
valid_sources[0x38]	4842	1			T1	247		T4	189		T7	1
valid_sources[0x39]	4597	1			T1	190		T4	176		T17	1
valid_sources[0x3a]	4811	1			T1	214		T4	185		T6	1
valid_sources[0x3b]	5288	1			T1	248		T4	188		T7	1
valid_sources[0x3c]	4685	1			T1	252		T4	197		T6	1
valid_sources[0x3d]	4936	1			T1	226		T2	1		T4	142
valid_sources[0x3e]	5618	1			T1	231		T4	181		T7	1
valid_sources[0x3f]	5215	1			T1	208		T4	176		T7	2
valid_sources[0x40]	5635	1			T1	245		T4	170		T60	1
valid_sources[0x41]	5436	1			T1	210		T4	173		T57	3
valid_sources[0x42]	5197	1			T1	238		T2	1		T4	148
valid_sources[0x43]	4945	1			T1	247		T4	172		T7	1
valid_sources[0x44]	4923	1			T1	253		T4	160		T116	4
valid_sources[0x45]	5327	1			T1	202		T4	191		T23	2
valid_sources[0x46]	4557	1			T1	232		T4	211		T29	9
valid_sources[0x47]	5415	1			T1	212		T2	1		T4	192
valid_sources[0x48]	5084	1			T1	223		T2	1		T4	174
valid_sources[0x49]	5686	1			T1	222		T2	1		T4	180
valid_sources[0x4a]	5262	1			T1	244		T2	1		T4	191
valid_sources[0x4b]	5462	1			T1	223		T4	196		T6	1
valid_sources[0x4c]	5009	1			T1	233		T4	161		T7	1
valid_sources[0x4d]	5149	1			T1	226		T3	1		T4	175
valid_sources[0x4e]	5405	1			T1	241		T2	1		T4	191
valid_sources[0x4f]	5137	1			T1	261		T4	201		T117	1
valid_sources[0x50]	4564	1			T1	218		T4	153		T16	4
valid_sources[0x51]	5155	1			T1	219		T4	169		T7	1
valid_sources[0x52]	4976	1			T1	251		T4	196		T23	1
valid_sources[0x53]	5318	1			T1	238		T4	180		T7	1
valid_sources[0x54]	5094	1			T1	211		T4	192		T7	2
valid_sources[0x55]	5670	1			T1	260		T2	1		T4	153
valid_sources[0x56]	5511	1			T1	223		T4	176		T7	1
valid_sources[0x57]	5053	1			T1	218		T2	2		T4	190
valid_sources[0x58]	5567	1			T1	212		T4	187		T7	2
valid_sources[0x59]	5730	1			T1	219		T4	186		T7	1
valid_sources[0x5a]	5323	1			T1	242		T4	183		T7	2
valid_sources[0x5b]	4769	1			T1	216		T4	161		T69	2
valid_sources[0x5c]	4198	1			T1	235		T2	1		T4	174
valid_sources[0x5d]	5316	1			T1	213		T4	192		T31	1
valid_sources[0x5e]	4648	1			T1	207		T4	175		T57	6
valid_sources[0x5f]	4913	1			T1	255		T4	165		T7	1
valid_sources[0x60]	4958	1			T1	211		T4	179		T117	2
valid_sources[0x61]	5608	1			T1	225		T4	171		T69	1
valid_sources[0x62]	5691	1			T1	194		T4	154		T7	1
valid_sources[0x63]	4944	1			T1	219		T4	175		T118	1
valid_sources[0x64]	4849	1			T1	238		T2	1		T4	195
valid_sources[0x65]	4912	1			T1	222		T4	194		T119	1
valid_sources[0x66]	5219	1			T1	210		T4	187		T7	2
valid_sources[0x67]	5101	1			T1	249		T4	183		T6	1
valid_sources[0x68]	4236	1			T1	214		T4	142		T113	1
valid_sources[0x69]	5096	1			T1	216		T2	1		T4	182
valid_sources[0x6a]	5117	1			T1	210		T4	169		T7	2
valid_sources[0x6b]	4836	1			T1	215		T4	173		T7	1
valid_sources[0x6c]	5270	1			T1	242		T4	176		T6	1
valid_sources[0x6d]	4999	1			T1	207		T4	191		T7	2
valid_sources[0x6e]	4688	1			T1	239		T2	1		T4	194
valid_sources[0x6f]	4185	1			T1	237		T2	1		T3	1
valid_sources[0x70]	5410	1			T1	254		T2	1		T4	159
valid_sources[0x71]	4841	1			T1	238		T4	214		T13	1
valid_sources[0x72]	4857	1			T1	216		T4	208		T69	3
valid_sources[0x73]	5147	1			T1	236		T4	205		T7	3
valid_sources[0x74]	5188	1			T1	219		T4	195		T7	1
valid_sources[0x75]	5365	1			T1	268		T4	206		T7	1
valid_sources[0x76]	4783	1			T1	209		T2	2		T4	195
valid_sources[0x77]	4831	1			T1	223		T2	2		T4	177
valid_sources[0x78]	5790	1			T1	202		T4	180		T7	2
valid_sources[0x79]	5177	1			T1	202		T2	1		T3	1
valid_sources[0x7a]	5880	1			T1	234		T2	1		T4	155
valid_sources[0x7b]	4708	1			T1	257		T2	1		T4	205
valid_sources[0x7c]	4801	1			T1	263		T4	148		T117	1
valid_sources[0x7d]	4991	1			T1	213		T2	1		T4	209
valid_sources[0x7e]	5323	1			T1	228		T4	167		T15	2
valid_sources[0x7f]	4960	1			T1	217		T4	178		T15	4
valid_sources[0x80]	4894	1			T1	250		T4	176		T7	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

303028

1

T1

13465

T2

43

T4

11032

values[0x0]

all_enables

biggest_size

447162

1

T1

19594

T4

15933

T32

1

values[0x1]

all_enables

biggest_size

446586

1

T1

19677

T4

16144

T32

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	276409	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1182391

1

T1

54790

T2

19

T4

43119

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	334956	1			T1	15491		T2	175		T4	11355
values[0x0]	464694	1			T1	21588		T4	16958		T11	16515
values[0x1]	659150	1			T1	30728		T4	24242		T11	23401

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	105300	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1353500

1

T1

62873

T2

100

T4

48945

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8054	1			T1	270		T4	191		T7	1
valid_sources[0x01]	6735	1			T1	316		T4	204		T10	2
valid_sources[0x02]	5285	1			T1	262		T4	212		T5	58
valid_sources[0x03]	4951	1			T1	261		T4	223		T18	1
valid_sources[0x04]	3721	1			T1	281		T4	219		T7	4
valid_sources[0x05]	4523	1			T1	232		T4	227		T6	1
valid_sources[0x06]	4357	1			T1	226		T4	252		T18	2
valid_sources[0x07]	6498	1			T1	309		T4	215		T7	2
valid_sources[0x08]	6217	1			T1	325		T4	248		T7	2
valid_sources[0x09]	4754	1			T1	254		T4	224		T7	1
valid_sources[0x0a]	6591	1			T1	268		T4	216		T18	2
valid_sources[0x0b]	7632	1			T1	284		T4	211		T7	1
valid_sources[0x0c]	3950	1			T1	282		T4	205		T10	1
valid_sources[0x0d]	3753	1			T1	284		T2	18		T4	199
valid_sources[0x0e]	6268	1			T1	271		T4	212		T18	1
valid_sources[0x0f]	5821	1			T1	284		T4	216		T7	1
valid_sources[0x10]	4598	1			T1	249		T4	215		T13	1
valid_sources[0x11]	6226	1			T1	265		T4	206		T18	1
valid_sources[0x12]	3879	1			T1	307		T4	207		T7	1
valid_sources[0x13]	6074	1			T1	270		T4	223		T6	4
valid_sources[0x14]	6642	1			T1	263		T4	189		T7	1
valid_sources[0x15]	5894	1			T1	273		T4	201		T18	2
valid_sources[0x16]	8516	1			T1	239		T4	212		T7	1
valid_sources[0x17]	7736	1			T1	283		T4	203		T7	2
valid_sources[0x18]	5302	1			T1	291		T4	210		T7	2
valid_sources[0x19]	4814	1			T1	257		T4	192		T7	1
valid_sources[0x1a]	4753	1			T1	233		T4	224		T18	2
valid_sources[0x1b]	5033	1			T1	270		T4	199		T10	1
valid_sources[0x1c]	3345	1			T1	263		T4	188		T7	2
valid_sources[0x1d]	5138	1			T1	255		T4	198		T18	1
valid_sources[0x1e]	6899	1			T1	273		T4	169		T9	3
valid_sources[0x1f]	9334	1			T1	279		T4	239		T18	1
valid_sources[0x20]	6817	1			T1	272		T4	203		T13	1
valid_sources[0x21]	5726	1			T1	248		T4	178		T6	1
valid_sources[0x22]	5815	1			T1	260		T4	201		T7	1
valid_sources[0x23]	5824	1			T1	266		T4	216		T6	1
valid_sources[0x24]	6921	1			T1	290		T4	188		T120	2
valid_sources[0x25]	5613	1			T1	270		T4	211		T10	2
valid_sources[0x26]	7398	1			T1	290		T4	177		T7	1
valid_sources[0x27]	5613	1			T1	265		T4	220		T5	18
valid_sources[0x28]	5037	1			T1	298		T4	187		T7	3
valid_sources[0x29]	6714	1			T1	274		T4	206		T18	1
valid_sources[0x2a]	5696	1			T1	276		T4	230		T7	4
valid_sources[0x2b]	5861	1			T1	246		T4	194		T18	1
valid_sources[0x2c]	6626	1			T1	288		T4	203		T18	4
valid_sources[0x2d]	6502	1			T1	245		T4	195		T6	1
valid_sources[0x2e]	5232	1			T1	269		T4	206		T18	1
valid_sources[0x2f]	6531	1			T1	269		T4	168		T7	1
valid_sources[0x30]	5737	1			T1	245		T4	210		T6	2
valid_sources[0x31]	4185	1			T1	262		T4	192		T7	2
valid_sources[0x32]	5139	1			T1	285		T4	211		T7	1
valid_sources[0x33]	5759	1			T1	304		T4	226		T7	1
valid_sources[0x34]	5616	1			T1	268		T4	207		T18	2
valid_sources[0x35]	5775	1			T1	253		T4	192		T7	1
valid_sources[0x36]	4478	1			T1	262		T4	182		T18	1
valid_sources[0x37]	4873	1			T1	240		T4	207		T5	22
valid_sources[0x38]	6742	1			T1	275		T4	194		T6	1
valid_sources[0x39]	5125	1			T1	272		T4	235		T58	1
valid_sources[0x3a]	5987	1			T1	285		T2	12		T4	225
valid_sources[0x3b]	5940	1			T1	252		T4	232		T7	1
valid_sources[0x3c]	4461	1			T1	258		T4	163		T7	2
valid_sources[0x3d]	5419	1			T1	268		T4	200		T18	1
valid_sources[0x3e]	6510	1			T1	267		T4	197		T18	2
valid_sources[0x3f]	5267	1			T1	292		T4	186		T7	2
valid_sources[0x40]	4947	1			T1	265		T4	189		T6	3
valid_sources[0x41]	3627	1			T1	233		T4	214		T18	3
valid_sources[0x42]	6115	1			T1	300		T4	223		T7	2
valid_sources[0x43]	4402	1			T1	266		T4	220		T9	7
valid_sources[0x44]	4548	1			T1	248		T4	194		T7	2
valid_sources[0x45]	6328	1			T1	256		T4	203		T7	1
valid_sources[0x46]	6575	1			T1	279		T4	185		T9	2
valid_sources[0x47]	9139	1			T1	262		T4	211		T7	3
valid_sources[0x48]	4812	1			T1	262		T4	193		T10	3
valid_sources[0x49]	7524	1			T1	268		T4	212		T7	2
valid_sources[0x4a]	4562	1			T1	241		T4	216		T23	2
valid_sources[0x4b]	7657	1			T1	253		T4	229		T7	1
valid_sources[0x4c]	6716	1			T1	226		T4	228		T7	1
valid_sources[0x4d]	4918	1			T1	282		T4	174		T7	1
valid_sources[0x4e]	7998	1			T1	250		T4	200		T7	1
valid_sources[0x4f]	6098	1			T1	268		T4	189		T7	2
valid_sources[0x50]	4502	1			T1	294		T4	209		T7	5
valid_sources[0x51]	6026	1			T1	258		T4	206		T18	1
valid_sources[0x52]	5507	1			T1	275		T4	210		T7	1
valid_sources[0x53]	5756	1			T1	265		T4	201		T7	1
valid_sources[0x54]	5925	1			T1	265		T4	192		T5	15
valid_sources[0x55]	3903	1			T1	274		T4	176		T18	4
valid_sources[0x56]	4988	1			T1	256		T4	195		T7	2
valid_sources[0x57]	6487	1			T1	269		T4	204		T10	2
valid_sources[0x58]	6422	1			T1	254		T4	189		T7	1
valid_sources[0x59]	4285	1			T1	266		T4	197		T7	1
valid_sources[0x5a]	7009	1			T1	243		T4	210		T18	1
valid_sources[0x5b]	4913	1			T1	265		T4	183		T7	1
valid_sources[0x5c]	4516	1			T1	286		T4	201		T9	23
valid_sources[0x5d]	4334	1			T1	254		T4	214		T7	1
valid_sources[0x5e]	5171	1			T1	260		T4	209		T7	3
valid_sources[0x5f]	6222	1			T1	246		T4	199		T18	2
valid_sources[0x60]	5888	1			T1	232		T4	205		T9	1
valid_sources[0x61]	6846	1			T1	268		T4	215		T5	10
valid_sources[0x62]	6355	1			T1	265		T4	218		T7	5
valid_sources[0x63]	6388	1			T1	294		T4	192		T6	1
valid_sources[0x64]	5369	1			T1	292		T4	237		T6	3
valid_sources[0x65]	4672	1			T1	294		T4	212		T7	1
valid_sources[0x66]	4906	1			T1	266		T2	13		T4	204
valid_sources[0x67]	6712	1			T1	260		T4	206		T18	1
valid_sources[0x68]	5495	1			T1	258		T4	230		T18	4
valid_sources[0x69]	4534	1			T1	264		T4	224		T9	16
valid_sources[0x6a]	4345	1			T1	270		T4	204		T18	1
valid_sources[0x6b]	4186	1			T1	242		T4	204		T7	3
valid_sources[0x6c]	6405	1			T1	234		T4	177		T9	1
valid_sources[0x6d]	3775	1			T1	268		T4	204		T10	1
valid_sources[0x6e]	7198	1			T1	262		T4	225		T12	21
valid_sources[0x6f]	4223	1			T1	222		T4	200		T10	1
valid_sources[0x70]	5891	1			T1	278		T4	217		T7	2
valid_sources[0x71]	5306	1			T1	236		T4	213		T7	1
valid_sources[0x72]	3380	1			T1	261		T4	193		T7	2
valid_sources[0x73]	6433	1			T1	263		T4	219		T18	7
valid_sources[0x74]	5890	1			T1	238		T4	202		T18	1
valid_sources[0x75]	4565	1			T1	273		T4	197		T5	32
valid_sources[0x76]	5635	1			T1	253		T4	183		T6	2
valid_sources[0x77]	3783	1			T1	264		T4	191		T18	2
valid_sources[0x78]	5940	1			T1	272		T4	200		T7	1
valid_sources[0x79]	5402	1			T1	258		T4	233		T18	1
valid_sources[0x7a]	4461	1			T1	262		T4	203		T7	1
valid_sources[0x7b]	5256	1			T1	274		T4	198		T18	2
valid_sources[0x7c]	4006	1			T1	261		T4	186		T7	1
valid_sources[0x7d]	5149	1			T1	277		T4	221		T5	22
valid_sources[0x7e]	7166	1			T1	246		T4	183		T6	1
valid_sources[0x7f]	6255	1			T1	245		T4	203		T6	1
valid_sources[0x80]	6530	1			T1	242		T4	164		T12	13

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

298496

1

T1

13790

T2

19

T4

10666

values[0x0]

all_enables

biggest_size

442168

1

T1

20510

T4

16145

T11

15747

values[0x1]

all_enables

biggest_size

441727

1

T1

20490

T4

16308

T11

15824