Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	92646	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1683492

1

T1

3

T2

54376

T3

11

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	483927	1			T1	3		T2	14420		T3	70
values[0x0]	634289	1			T2	20569		T12	30524		T13	15559
values[0x1]	657922	1			T2	21318		T12	31239		T13	16263

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46459	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1729679

1

T1

3

T2

55287

T3

44

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6678	1			T2	250		T12	333		T67	1
valid_sources[0x01]	6124	1			T2	238		T12	331		T67	1
valid_sources[0x02]	6610	1			T2	213		T11	2		T12	358
valid_sources[0x03]	6086	1			T2	235		T6	1		T12	314
valid_sources[0x04]	7753	1			T2	211		T8	1		T19	8
valid_sources[0x05]	6637	1			T2	196		T3	2		T12	297
valid_sources[0x06]	8661	1			T2	230		T12	336		T130	1
valid_sources[0x07]	6041	1			T2	232		T6	1		T8	2
valid_sources[0x08]	6902	1			T2	242		T19	2		T12	327
valid_sources[0x09]	7325	1			T2	230		T6	1		T12	406
valid_sources[0x0a]	6703	1			T2	247		T8	1		T12	360
valid_sources[0x0b]	7173	1			T2	215		T12	293		T66	4
valid_sources[0x0c]	8172	1			T2	210		T12	295		T13	198
valid_sources[0x0d]	7469	1			T2	229		T8	1		T12	357
valid_sources[0x0e]	7314	1			T2	215		T3	1		T12	271
valid_sources[0x0f]	6080	1			T2	235		T3	1		T19	1
valid_sources[0x10]	6308	1			T2	177		T6	1		T12	318
valid_sources[0x11]	7262	1			T2	230		T12	323		T67	2
valid_sources[0x12]	7017	1			T2	244		T8	1		T12	337
valid_sources[0x13]	7749	1			T2	225		T12	372		T63	15
valid_sources[0x14]	6480	1			T2	239		T8	2		T12	298
valid_sources[0x15]	6061	1			T2	203		T12	255		T111	20
valid_sources[0x16]	6655	1			T2	210		T3	1		T12	277
valid_sources[0x17]	7110	1			T2	213		T19	1		T12	320
valid_sources[0x18]	6020	1			T2	243		T8	1		T12	311
valid_sources[0x19]	6759	1			T2	193		T6	1		T12	273
valid_sources[0x1a]	8632	1			T2	204		T3	1		T6	1
valid_sources[0x1b]	6574	1			T2	246		T12	285		T13	200
valid_sources[0x1c]	6912	1			T2	208		T3	1		T12	341
valid_sources[0x1d]	8548	1			T2	218		T12	375		T67	3
valid_sources[0x1e]	7404	1			T2	206		T3	1		T12	307
valid_sources[0x1f]	7093	1			T2	222		T12	325		T13	197
valid_sources[0x20]	5774	1			T2	203		T12	301		T67	1
valid_sources[0x21]	6615	1			T2	207		T12	310		T67	3
valid_sources[0x22]	6407	1			T2	218		T12	280		T67	1
valid_sources[0x23]	7175	1			T2	217		T12	344		T67	2
valid_sources[0x24]	6588	1			T2	243		T3	1		T11	5
valid_sources[0x25]	7966	1			T2	246		T12	383		T67	1
valid_sources[0x26]	6583	1			T2	198		T3	1		T8	2
valid_sources[0x27]	6263	1			T2	226		T12	341		T67	1
valid_sources[0x28]	6688	1			T2	215		T3	1		T12	345
valid_sources[0x29]	6746	1			T2	226		T9	11		T12	365
valid_sources[0x2a]	6187	1			T2	210		T8	1		T12	357
valid_sources[0x2b]	7187	1			T2	228		T3	1		T6	1
valid_sources[0x2c]	6783	1			T2	227		T12	364		T13	235
valid_sources[0x2d]	6678	1			T2	227		T3	1		T12	304
valid_sources[0x2e]	5817	1			T2	219		T6	1		T12	362
valid_sources[0x2f]	6978	1			T2	237		T18	46		T12	306
valid_sources[0x30]	6348	1			T2	212		T3	1		T19	3
valid_sources[0x31]	7021	1			T2	223		T19	7		T12	324
valid_sources[0x32]	7642	1			T2	226		T12	316		T67	1
valid_sources[0x33]	6852	1			T2	230		T11	3		T12	313
valid_sources[0x34]	6799	1			T2	246		T3	1		T9	22
valid_sources[0x35]	6347	1			T2	216		T3	1		T6	1
valid_sources[0x36]	6808	1			T2	243		T12	328		T66	2
valid_sources[0x37]	7722	1			T2	240		T12	316		T66	1
valid_sources[0x38]	6547	1			T2	227		T12	289		T78	1
valid_sources[0x39]	6875	1			T2	237		T12	311		T67	3
valid_sources[0x3a]	7229	1			T2	200		T3	2		T12	340
valid_sources[0x3b]	6058	1			T2	227		T3	2		T12	321
valid_sources[0x3c]	6916	1			T2	217		T12	302		T64	24
valid_sources[0x3d]	6712	1			T2	222		T3	1		T12	318
valid_sources[0x3e]	6673	1			T1	1		T2	208		T12	341
valid_sources[0x3f]	6050	1			T2	210		T8	1		T12	348
valid_sources[0x40]	6002	1			T2	211		T6	1		T11	3
valid_sources[0x41]	6338	1			T2	191		T6	1		T12	288
valid_sources[0x42]	7121	1			T2	212		T8	2		T12	300
valid_sources[0x43]	6558	1			T2	205		T8	1		T12	284
valid_sources[0x44]	6643	1			T2	198		T8	1		T12	315
valid_sources[0x45]	7505	1			T2	197		T8	1		T12	324
valid_sources[0x46]	6855	1			T2	233		T3	1		T12	323
valid_sources[0x47]	6192	1			T2	256		T19	3		T11	5
valid_sources[0x48]	6666	1			T2	221		T12	319		T67	5
valid_sources[0x49]	6797	1			T2	204		T3	1		T12	312
valid_sources[0x4a]	6445	1			T2	205		T12	324		T67	3
valid_sources[0x4b]	6811	1			T2	223		T11	6		T12	294
valid_sources[0x4c]	7675	1			T2	243		T12	297		T67	1
valid_sources[0x4d]	6167	1			T2	215		T6	2		T12	296
valid_sources[0x4e]	7240	1			T2	250		T12	360		T67	2
valid_sources[0x4f]	7170	1			T2	230		T3	1		T8	1
valid_sources[0x50]	6572	1			T2	205		T3	2		T6	1
valid_sources[0x51]	7121	1			T2	225		T19	1		T12	263
valid_sources[0x52]	6980	1			T2	192		T3	1		T12	313
valid_sources[0x53]	7725	1			T2	205		T3	1		T12	292
valid_sources[0x54]	6736	1			T2	200		T12	345		T67	1
valid_sources[0x55]	7078	1			T2	219		T12	278		T67	2
valid_sources[0x56]	5763	1			T2	227		T3	2		T12	291
valid_sources[0x57]	6711	1			T2	228		T12	332		T67	1
valid_sources[0x58]	6912	1			T2	241		T3	1		T12	317
valid_sources[0x59]	7206	1			T2	222		T12	334		T13	196
valid_sources[0x5a]	7011	1			T2	244		T3	1		T6	1
valid_sources[0x5b]	6502	1			T2	244		T6	1		T12	373
valid_sources[0x5c]	6435	1			T2	211		T9	47		T12	314
valid_sources[0x5d]	7087	1			T2	232		T6	1		T12	340
valid_sources[0x5e]	6882	1			T2	229		T19	3		T11	3
valid_sources[0x5f]	7053	1			T2	195		T8	1		T12	362
valid_sources[0x60]	5804	1			T2	220		T8	2		T12	319
valid_sources[0x61]	6959	1			T2	193		T12	324		T66	1
valid_sources[0x62]	6471	1			T2	202		T12	351		T13	216
valid_sources[0x63]	8063	1			T2	217		T3	1		T19	2
valid_sources[0x64]	8022	1			T2	225		T8	1		T12	339
valid_sources[0x65]	7502	1			T2	215		T12	340		T64	14
valid_sources[0x66]	7823	1			T2	241		T8	1		T12	389
valid_sources[0x67]	5860	1			T2	210		T3	1		T8	1
valid_sources[0x68]	7774	1			T2	233		T3	2		T12	268
valid_sources[0x69]	6402	1			T2	215		T3	1		T12	266
valid_sources[0x6a]	8097	1			T2	218		T12	338		T67	2
valid_sources[0x6b]	6862	1			T2	213		T3	1		T12	321
valid_sources[0x6c]	6276	1			T2	206		T12	304		T67	1
valid_sources[0x6d]	7360	1			T2	242		T6	1		T11	1
valid_sources[0x6e]	7296	1			T2	221		T11	1		T12	310
valid_sources[0x6f]	8079	1			T2	220		T12	331		T67	1
valid_sources[0x70]	6501	1			T2	215		T12	387		T110	7
valid_sources[0x71]	7048	1			T2	234		T19	3		T12	279
valid_sources[0x72]	6582	1			T2	215		T11	1		T12	304
valid_sources[0x73]	6361	1			T2	208		T8	1		T12	356
valid_sources[0x74]	7144	1			T2	231		T12	343		T66	3
valid_sources[0x75]	6864	1			T2	208		T12	342		T66	1
valid_sources[0x76]	7522	1			T2	224		T12	346		T66	1
valid_sources[0x77]	6652	1			T2	208		T19	1		T12	351
valid_sources[0x78]	6741	1			T2	235		T12	351		T66	1
valid_sources[0x79]	6315	1			T2	211		T3	1		T12	345
valid_sources[0x7a]	7852	1			T2	223		T6	1		T12	286
valid_sources[0x7b]	8217	1			T2	222		T3	1		T12	310
valid_sources[0x7c]	6657	1			T2	222		T3	1		T12	315
valid_sources[0x7d]	6558	1			T2	216		T8	1		T12	337
valid_sources[0x7e]	6393	1			T2	243		T12	322		T67	2
valid_sources[0x7f]	8201	1			T2	215		T12	317		T67	2
valid_sources[0x80]	7097	1			T2	248		T19	4		T12	323

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

425316

1

T1

3

T2

13562

T3

11

values[0x0]

all_enables

biggest_size

628660

1

T2

20398

T12

30292

T13

15403

values[0x1]

all_enables

biggest_size

629516

1

T2

20416

T12

29974

T13

15471

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	137827	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1293179

1

T1

8

T2

37247

T3

16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	362735	1			T1	16		T2	10235		T3	32
values[0x0]	494090	1			T2	14232		T7	6		T10	5
values[0x1]	574181	1			T2	16739		T7	8		T37	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64397	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1366609

1

T1

8

T2

39508

T3

17

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6539	1			T2	155		T19	1		T12	1077
valid_sources[0x01]	5316	1			T2	148		T12	387		T67	1
valid_sources[0x02]	5970	1			T2	168		T12	535		T67	3
valid_sources[0x03]	5322	1			T2	157		T3	1		T5	1
valid_sources[0x04]	5555	1			T2	173		T3	1		T18	1
valid_sources[0x05]	5203	1			T2	154		T12	301		T67	1
valid_sources[0x06]	6032	1			T2	162		T12	473		T110	3
valid_sources[0x07]	5386	1			T2	171		T12	190		T64	1
valid_sources[0x08]	6448	1			T2	150		T12	349		T13	147
valid_sources[0x09]	5301	1			T2	150		T18	2		T12	331
valid_sources[0x0a]	5583	1			T2	157		T12	8		T67	1
valid_sources[0x0b]	5016	1			T2	151		T12	102		T13	135
valid_sources[0x0c]	5684	1			T2	139		T12	3		T13	116
valid_sources[0x0d]	5798	1			T2	168		T3	2		T10	1
valid_sources[0x0e]	5513	1			T2	145		T7	3		T12	555
valid_sources[0x0f]	5159	1			T2	138		T12	133		T65	2
valid_sources[0x10]	4892	1			T2	157		T7	2		T12	247
valid_sources[0x11]	5009	1			T1	1		T2	167		T12	311
valid_sources[0x12]	5346	1			T2	162		T67	1		T13	124
valid_sources[0x13]	5150	1			T2	162		T12	3		T67	1
valid_sources[0x14]	5887	1			T2	179		T3	1		T12	24
valid_sources[0x15]	5632	1			T2	177		T12	411		T66	1
valid_sources[0x16]	5097	1			T1	1		T2	163		T12	324
valid_sources[0x17]	5961	1			T2	143		T3	1		T12	351
valid_sources[0x18]	6484	1			T2	151		T12	842		T13	131
valid_sources[0x19]	5046	1			T2	152		T19	1		T67	1
valid_sources[0x1a]	5013	1			T2	152		T3	1		T5	1
valid_sources[0x1b]	4719	1			T2	169		T5	2		T10	1
valid_sources[0x1c]	5620	1			T2	160		T12	244		T64	2
valid_sources[0x1d]	5761	1			T2	177		T18	1		T12	86
valid_sources[0x1e]	4935	1			T2	192		T19	1		T12	316
valid_sources[0x1f]	4886	1			T2	181		T12	341		T13	100
valid_sources[0x20]	5586	1			T2	156		T12	231		T65	1
valid_sources[0x21]	5472	1			T2	162		T5	1		T19	1
valid_sources[0x22]	4900	1			T2	128		T37	1		T12	69
valid_sources[0x23]	5526	1			T2	174		T19	1		T12	515
valid_sources[0x24]	5333	1			T2	188		T12	180		T65	1
valid_sources[0x25]	6091	1			T2	170		T4	3		T19	1
valid_sources[0x26]	5180	1			T2	141		T37	1		T12	301
valid_sources[0x27]	5115	1			T2	194		T12	382		T64	1
valid_sources[0x28]	5861	1			T2	192		T12	352		T110	1
valid_sources[0x29]	5445	1			T2	148		T3	1		T12	370
valid_sources[0x2a]	5183	1			T2	174		T12	9		T131	1
valid_sources[0x2b]	5026	1			T2	154		T12	143		T110	1
valid_sources[0x2c]	5915	1			T2	156		T12	196		T131	1
valid_sources[0x2d]	5398	1			T2	168		T3	1		T12	172
valid_sources[0x2e]	6123	1			T2	168		T67	1		T13	129
valid_sources[0x2f]	6450	1			T2	143		T4	1		T12	355
valid_sources[0x30]	5452	1			T2	176		T19	1		T12	248
valid_sources[0x31]	5461	1			T2	173		T12	359		T13	123
valid_sources[0x32]	4711	1			T2	166		T12	10		T67	2
valid_sources[0x33]	5079	1			T2	186		T12	198		T66	3
valid_sources[0x34]	5553	1			T2	162		T12	83		T67	1
valid_sources[0x35]	5008	1			T2	157		T12	314		T67	2
valid_sources[0x36]	5602	1			T2	163		T4	1		T19	1
valid_sources[0x37]	5811	1			T2	172		T12	219		T110	1
valid_sources[0x38]	5569	1			T2	169		T12	199		T67	2
valid_sources[0x39]	5337	1			T2	163		T12	85		T58	1
valid_sources[0x3a]	5451	1			T1	4		T2	170		T3	1
valid_sources[0x3b]	6652	1			T2	164		T12	305		T67	2
valid_sources[0x3c]	5598	1			T2	170		T12	607		T64	2
valid_sources[0x3d]	4776	1			T2	158		T3	1		T12	167
valid_sources[0x3e]	7075	1			T1	1		T2	185		T12	618
valid_sources[0x3f]	4932	1			T2	171		T12	397		T13	95
valid_sources[0x40]	6368	1			T2	156		T18	1		T12	336
valid_sources[0x41]	5303	1			T2	168		T18	1		T12	150
valid_sources[0x42]	4912	1			T2	134		T12	235		T67	1
valid_sources[0x43]	5432	1			T2	176		T12	220		T78	2
valid_sources[0x44]	6097	1			T2	171		T12	104		T13	141
valid_sources[0x45]	5284	1			T2	150		T12	309		T13	157
valid_sources[0x46]	5906	1			T2	140		T12	247		T67	1
valid_sources[0x47]	5724	1			T1	2		T2	147		T12	398
valid_sources[0x48]	7096	1			T2	187		T12	581		T78	1
valid_sources[0x49]	6046	1			T2	165		T12	367		T65	1
valid_sources[0x4a]	6163	1			T2	182		T18	1		T12	527
valid_sources[0x4b]	5519	1			T2	190		T11	32		T12	388
valid_sources[0x4c]	6572	1			T2	142		T37	1		T12	274
valid_sources[0x4d]	6544	1			T2	165		T12	293		T65	9
valid_sources[0x4e]	7119	1			T1	1		T2	128		T12	430
valid_sources[0x4f]	5084	1			T2	159		T12	525		T67	2
valid_sources[0x50]	5313	1			T2	140		T12	307		T67	2
valid_sources[0x51]	5296	1			T2	170		T12	3		T67	1
valid_sources[0x52]	6534	1			T2	154		T4	2		T12	959
valid_sources[0x53]	5830	1			T1	2		T2	158		T4	1
valid_sources[0x54]	6175	1			T2	149		T12	316		T58	1
valid_sources[0x55]	4972	1			T2	176		T12	92		T67	2
valid_sources[0x56]	6534	1			T2	169		T3	1		T37	1
valid_sources[0x57]	5584	1			T2	168		T12	182		T31	2
valid_sources[0x58]	5489	1			T2	187		T3	1		T12	67
valid_sources[0x59]	5975	1			T2	169		T19	1		T12	273
valid_sources[0x5a]	6042	1			T2	172		T12	449		T64	1
valid_sources[0x5b]	5642	1			T2	158		T12	178		T67	2
valid_sources[0x5c]	5943	1			T2	152		T12	205		T78	1
valid_sources[0x5d]	6788	1			T2	170		T12	408		T66	2
valid_sources[0x5e]	4890	1			T2	131		T19	1		T12	180
valid_sources[0x5f]	5845	1			T2	158		T18	1		T37	1
valid_sources[0x60]	6417	1			T2	168		T4	1		T12	212
valid_sources[0x61]	5647	1			T2	163		T12	274		T78	2
valid_sources[0x62]	5789	1			T2	153		T7	1		T12	389
valid_sources[0x63]	6300	1			T2	163		T4	1		T12	6
valid_sources[0x64]	5343	1			T2	186		T5	1		T18	1
valid_sources[0x65]	6041	1			T2	158		T19	1		T12	288
valid_sources[0x66]	6137	1			T2	161		T12	93		T13	85
valid_sources[0x67]	5354	1			T2	178		T12	177		T78	1
valid_sources[0x68]	6611	1			T2	152		T3	1		T12	683
valid_sources[0x69]	5349	1			T2	148		T12	423		T65	2
valid_sources[0x6a]	6353	1			T2	178		T12	342		T13	150
valid_sources[0x6b]	5425	1			T2	145		T19	2		T12	542
valid_sources[0x6c]	5734	1			T2	152		T12	67		T67	1
valid_sources[0x6d]	5522	1			T2	179		T12	11		T31	1
valid_sources[0x6e]	5125	1			T2	145		T19	1		T12	251
valid_sources[0x6f]	5618	1			T2	168		T3	1		T12	782
valid_sources[0x70]	5440	1			T2	166		T18	1		T19	1
valid_sources[0x71]	5107	1			T2	150		T12	96		T13	95
valid_sources[0x72]	4968	1			T2	154		T12	398		T67	2
valid_sources[0x73]	5369	1			T2	163		T12	1		T67	1
valid_sources[0x74]	5432	1			T2	150		T4	1		T12	3
valid_sources[0x75]	5474	1			T2	161		T19	1		T12	664
valid_sources[0x76]	6183	1			T2	170		T12	756		T65	1
valid_sources[0x77]	5952	1			T2	174		T12	190		T31	1
valid_sources[0x78]	5950	1			T2	175		T12	674		T13	154
valid_sources[0x79]	5487	1			T2	162		T37	1		T12	407
valid_sources[0x7a]	6430	1			T2	165		T3	1		T12	196
valid_sources[0x7b]	5773	1			T2	160		T7	1		T19	1
valid_sources[0x7c]	5295	1			T2	162		T12	477		T31	1
valid_sources[0x7d]	4963	1			T2	184		T12	4		T110	1
valid_sources[0x7e]	5339	1			T2	144		T19	1		T12	351
valid_sources[0x7f]	6702	1			T2	163		T12	371		T64	3
valid_sources[0x80]	5124	1			T2	164		T12	288		T110	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

327010

1

T1

8

T2

9451

T3

16

values[0x0]

all_enables

biggest_size

483151

1

T2

13932

T7

1

T10

2

values[0x1]

all_enables

biggest_size

483018

1

T2

13864

T37

1

T12

22494