Unified Coverage Report :: Module :: rom_ctrl_mux

Module : rom_ctrl_mux

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
95.24	100.00	85.71			100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_mux	95.24	100.00	85.71			100.00

---

Module Instance : tb.dut.u_mux

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
95.24	100.00	85.71			100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
95.24	100.00	85.71			100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
94.98	100.00	98.28	97.33		100.00	79.31	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_sel_bus_q_flop	100.00	100.00				100.00
u_sel_bus_qq_flop	100.00	100.00				100.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : rom_ctrl_mux

	Line No.	Total	Covered	Percent
TOTAL		17	17	100.00
CONT_ASSIGN	68	1	1	100.00
CONT_ASSIGN	77	1	1	100.00
CONT_ASSIGN	83	1	1	100.00
CONT_ASSIGN	91	1	1	100.00
CONT_ASSIGN	97	1	1	100.00
CONT_ASSIGN	101	1	1	100.00
ALWAYS	104	3	3	100.00
CONT_ASSIGN	111	1	1	100.00
CONT_ASSIGN	114	1	1	100.00
CONT_ASSIGN	115	1	1	100.00
CONT_ASSIGN	118	1	1	100.00
CONT_ASSIGN	120	1	1	100.00
CONT_ASSIGN	122	1	1	100.00
CONT_ASSIGN	123	1	1	100.00
CONT_ASSIGN	124	1	1	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' or '../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
68	1	1
77	1	1
83	1	1
91	1	1
97	1	1
101	1	1
104	1	1
105	1	1
107	1	1
111	1	1
114	1	1
115	1	1
118	1	1
120	1	1
122	1	1
123	1	1
124	1	1

---

Cond Coverage for Module : rom_ctrl_mux

	Total	Covered	Percent
Conditions	7	6	85.71
Logical	7	6	85.71
Non-Logical	0	0
Event	0	0

 LINE       101
 EXPRESSION (sel_invalid | sel_reverted | sel_q_reverted)
             -----1-----   ------2-----   -------3------

-1-	-2-	-3-	Status	Tests
0	0	0	Covered	T1,T2,T3
0	0	1	Not Covered
0	1	0	Covered	T15,T30,T32
1	0	0	Covered	T32,T31,T24

 LINE       107
 EXPRESSION (alert_q | alert_d)
             ---1---   ---2---

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Covered	T15,T30,T32
1	0	Covered	T15,T30,T32

---

Branch Coverage for Module : rom_ctrl_mux

	Line No.	Total	Covered	Percent
Branches		2	2	100.00
IF	104	2	2	100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv' or '../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_mux.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	104	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3