Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	37655	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

523152

1

T1

6

T6

40

T7

48528

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	159655	1			T1	6		T6	373		T7	12418
values[0x0]	196530	1			T7	18322		T19	5905		T20	33303
values[0x1]	204622	1			T7	19201		T19	6178		T20	34758

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	18261	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

542546

1

T1

6

T6

218

T7

49153

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2218	1			T7	203		T8	3		T113	1
valid_sources[0x01]	2093	1			T6	2		T7	170		T8	2
valid_sources[0x02]	2275	1			T7	215		T8	1		T15	2
valid_sources[0x03]	2154	1			T6	3		T7	188		T8	1
valid_sources[0x04]	2251	1			T6	7		T7	185		T8	3
valid_sources[0x05]	2208	1			T6	1		T7	221		T15	1
valid_sources[0x06]	2179	1			T6	2		T7	170		T8	1
valid_sources[0x07]	2320	1			T6	4		T7	180		T8	1
valid_sources[0x08]	2268	1			T6	1		T7	222		T8	1
valid_sources[0x09]	2316	1			T7	223		T8	2		T38	1
valid_sources[0x0a]	2235	1			T7	215		T8	1		T112	3
valid_sources[0x0b]	2194	1			T7	173		T8	1		T11	4
valid_sources[0x0c]	2121	1			T7	180		T8	1		T42	1
valid_sources[0x0d]	2241	1			T7	221		T112	1		T113	4
valid_sources[0x0e]	2284	1			T7	217		T8	1		T16	1
valid_sources[0x0f]	2272	1			T6	1		T7	202		T8	2
valid_sources[0x10]	2164	1			T6	1		T7	215		T61	2
valid_sources[0x11]	2332	1			T7	170		T15	1		T111	1
valid_sources[0x12]	2163	1			T6	2		T7	203		T16	1
valid_sources[0x13]	2204	1			T6	1		T7	184		T8	2
valid_sources[0x14]	2248	1			T6	1		T7	253		T8	3
valid_sources[0x15]	2354	1			T6	4		T7	241		T8	1
valid_sources[0x16]	2288	1			T7	190		T8	1		T15	1
valid_sources[0x17]	2104	1			T7	211		T8	1		T61	1
valid_sources[0x18]	2202	1			T7	186		T111	5		T126	1
valid_sources[0x19]	2053	1			T7	177		T8	1		T15	1
valid_sources[0x1a]	2128	1			T6	3		T7	230		T8	2
valid_sources[0x1b]	2130	1			T7	222		T8	1		T12	2
valid_sources[0x1c]	2257	1			T7	214		T15	1		T16	1
valid_sources[0x1d]	2169	1			T6	3		T7	190		T8	2
valid_sources[0x1e]	2174	1			T6	2		T7	157		T8	3
valid_sources[0x1f]	2171	1			T6	10		T7	182		T8	2
valid_sources[0x20]	2193	1			T6	3		T7	214		T61	2
valid_sources[0x21]	2217	1			T6	3		T7	194		T8	2
valid_sources[0x22]	2119	1			T7	191		T8	3		T61	2
valid_sources[0x23]	2111	1			T7	194		T8	1		T16	1
valid_sources[0x24]	2321	1			T7	185		T8	1		T61	2
valid_sources[0x25]	2176	1			T7	188		T15	2		T112	2
valid_sources[0x26]	2302	1			T6	2		T7	163		T8	2
valid_sources[0x27]	2217	1			T6	3		T7	187		T8	1
valid_sources[0x28]	2082	1			T6	1		T7	181		T8	2
valid_sources[0x29]	2061	1			T6	4		T7	237		T16	2
valid_sources[0x2a]	2281	1			T6	3		T7	173		T8	1
valid_sources[0x2b]	2276	1			T7	196		T8	1		T61	1
valid_sources[0x2c]	2414	1			T6	1		T7	197		T61	1
valid_sources[0x2d]	2183	1			T6	1		T7	221		T16	3
valid_sources[0x2e]	2155	1			T7	169		T8	1		T39	2
valid_sources[0x2f]	2071	1			T6	1		T7	162		T60	1
valid_sources[0x30]	2161	1			T6	2		T7	182		T61	1
valid_sources[0x31]	2154	1			T6	2		T7	182		T61	3
valid_sources[0x32]	2248	1			T1	2		T6	1		T7	178
valid_sources[0x33]	2151	1			T6	2		T7	164		T61	2
valid_sources[0x34]	2111	1			T6	2		T7	196		T8	1
valid_sources[0x35]	2224	1			T7	229		T8	1		T112	2
valid_sources[0x36]	2338	1			T7	235		T61	1		T38	1
valid_sources[0x37]	2228	1			T6	2		T7	187		T8	1
valid_sources[0x38]	2207	1			T7	224		T12	1		T61	2
valid_sources[0x39]	2266	1			T7	227		T8	2		T11	3
valid_sources[0x3a]	2178	1			T7	170		T16	1		T12	2
valid_sources[0x3b]	2192	1			T7	183		T8	2		T16	1
valid_sources[0x3c]	2069	1			T6	3		T7	173		T8	2
valid_sources[0x3d]	2119	1			T7	186		T61	2		T60	1
valid_sources[0x3e]	2242	1			T6	4		T7	196		T8	1
valid_sources[0x3f]	2111	1			T7	182		T8	1		T61	1
valid_sources[0x40]	2217	1			T7	159		T8	1		T15	1
valid_sources[0x41]	2152	1			T7	184		T8	1		T16	1
valid_sources[0x42]	2142	1			T6	1		T7	197		T8	2
valid_sources[0x43]	2171	1			T6	2		T7	187		T61	3
valid_sources[0x44]	2207	1			T7	208		T17	12		T13	4
valid_sources[0x45]	2352	1			T6	1		T7	217		T16	1
valid_sources[0x46]	2252	1			T6	1		T7	177		T15	1
valid_sources[0x47]	2123	1			T6	1		T7	213		T12	2
valid_sources[0x48]	2216	1			T7	182		T8	1		T61	1
valid_sources[0x49]	2271	1			T6	4		T7	250		T8	1
valid_sources[0x4a]	2308	1			T1	1		T6	8		T7	186
valid_sources[0x4b]	2102	1			T7	179		T8	1		T16	1
valid_sources[0x4c]	2180	1			T7	247		T16	1		T61	2
valid_sources[0x4d]	2270	1			T6	1		T7	176		T113	5
valid_sources[0x4e]	2112	1			T7	197		T8	2		T16	3
valid_sources[0x4f]	2218	1			T6	5		T7	220		T8	2
valid_sources[0x50]	2166	1			T6	6		T7	199		T8	3
valid_sources[0x51]	2206	1			T6	3		T7	222		T11	15
valid_sources[0x52]	2196	1			T6	3		T7	181		T8	2
valid_sources[0x53]	2312	1			T6	2		T7	208		T16	1
valid_sources[0x54]	2169	1			T6	1		T7	204		T16	1
valid_sources[0x55]	2388	1			T7	207		T8	2		T61	1
valid_sources[0x56]	2352	1			T6	1		T7	225		T8	2
valid_sources[0x57]	2154	1			T6	2		T7	146		T8	1
valid_sources[0x58]	2083	1			T6	4		T7	201		T8	2
valid_sources[0x59]	2015	1			T6	3		T7	183		T8	2
valid_sources[0x5a]	2229	1			T7	199		T8	2		T15	3
valid_sources[0x5b]	2134	1			T6	2		T7	191		T11	8
valid_sources[0x5c]	2143	1			T6	2		T7	212		T17	4
valid_sources[0x5d]	2166	1			T6	3		T7	168		T8	1
valid_sources[0x5e]	2174	1			T6	1		T7	180		T61	1
valid_sources[0x5f]	2305	1			T6	4		T7	218		T8	1
valid_sources[0x60]	2148	1			T7	218		T12	3		T61	2
valid_sources[0x61]	2226	1			T7	173		T8	2		T16	1
valid_sources[0x62]	1993	1			T7	161		T8	1		T39	1
valid_sources[0x63]	2233	1			T6	3		T7	223		T114	41
valid_sources[0x64]	2052	1			T7	216		T16	2		T111	1
valid_sources[0x65]	2137	1			T6	6		T7	216		T8	1
valid_sources[0x66]	2237	1			T6	3		T7	201		T8	2
valid_sources[0x67]	2266	1			T6	5		T7	227		T8	1
valid_sources[0x68]	2143	1			T6	1		T7	180		T8	1
valid_sources[0x69]	2118	1			T7	188		T8	1		T60	2
valid_sources[0x6a]	2317	1			T7	182		T8	3		T16	3
valid_sources[0x6b]	2103	1			T7	150		T16	1		T61	1
valid_sources[0x6c]	2192	1			T6	2		T7	217		T8	2
valid_sources[0x6d]	2198	1			T7	173		T60	6		T113	6
valid_sources[0x6e]	2235	1			T7	172		T61	3		T112	2
valid_sources[0x6f]	2178	1			T6	3		T7	201		T8	1
valid_sources[0x70]	2360	1			T6	1		T7	215		T15	1
valid_sources[0x71]	2075	1			T6	2		T7	189		T61	1
valid_sources[0x72]	2218	1			T7	164		T8	1		T15	4
valid_sources[0x73]	2124	1			T6	2		T7	197		T8	2
valid_sources[0x74]	2143	1			T6	1		T7	197		T16	2
valid_sources[0x75]	2186	1			T7	150		T8	2		T61	2
valid_sources[0x76]	2140	1			T7	169		T8	1		T127	1
valid_sources[0x77]	2266	1			T6	2		T7	224		T12	3
valid_sources[0x78]	2105	1			T6	1		T7	165		T61	4
valid_sources[0x79]	2230	1			T7	199		T8	1		T61	2
valid_sources[0x7a]	2056	1			T7	186		T8	1		T16	1
valid_sources[0x7b]	2194	1			T1	3		T7	208		T12	1
valid_sources[0x7c]	2103	1			T7	173		T8	2		T16	1
valid_sources[0x7d]	2137	1			T6	1		T7	218		T61	1
valid_sources[0x7e]	2020	1			T7	160		T8	2		T111	3
valid_sources[0x7f]	2205	1			T6	1		T7	160		T8	2
valid_sources[0x80]	2318	1			T7	288		T8	3		T61	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

132869

1

T1

6

T6

40

T7

12024

values[0x0]

all_enables

biggest_size

194778

1

T7

18163

T19

5872

T20

32981

values[0x1]

all_enables

biggest_size

195505

1

T7

18341

T19

5934

T20

33186

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45253	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

416654

1

T1

11

T4

7

T7

40011

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	119198	1			T1	31		T2	1		T5	1
values[0x0]	159576	1			T3	2		T4	8		T7	15315
values[0x1]	183133	1			T3	3		T4	4		T7	17536

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21923	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

439984

1

T1

14

T2

1

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2449	1			T1	1		T7	550		T111	1
valid_sources[0x01]	2354	1			T7	14		T61	1		T111	2
valid_sources[0x02]	1756	1			T7	239		T111	1		T19	34
valid_sources[0x03]	1520	1			T7	208		T111	1		T127	1
valid_sources[0x04]	1953	1			T7	203		T61	1		T111	2
valid_sources[0x05]	1595	1			T7	200		T61	1		T23	4
valid_sources[0x06]	1600	1			T7	26		T16	1		T128	3
valid_sources[0x07]	1654	1			T7	168		T19	70		T46	1
valid_sources[0x08]	1747	1			T7	320		T13	4		T129	1
valid_sources[0x09]	1424	1			T7	147		T16	1		T64	1
valid_sources[0x0a]	1718	1			T7	268		T16	1		T29	1
valid_sources[0x0b]	1425	1			T7	144		T13	5		T80	1
valid_sources[0x0c]	2047	1			T7	504		T61	2		T19	36
valid_sources[0x0d]	1742	1			T7	7		T16	1		T41	10
valid_sources[0x0e]	1842	1			T7	270		T111	3		T19	74
valid_sources[0x0f]	1723	1			T7	120		T61	2		T130	1
valid_sources[0x10]	1744	1			T7	14		T61	1		T111	1
valid_sources[0x11]	1843	1			T7	439		T60	1		T129	1
valid_sources[0x12]	1705	1			T7	99		T15	1		T23	3
valid_sources[0x13]	2420	1			T7	296		T67	5		T19	87
valid_sources[0x14]	2004	1			T4	1		T7	7		T61	2
valid_sources[0x15]	1591	1			T7	218		T16	1		T23	5
valid_sources[0x16]	2024	1			T7	424		T64	1		T19	44
valid_sources[0x17]	1643	1			T1	2		T7	20		T14	2
valid_sources[0x18]	1719	1			T7	182		T64	1		T49	1
valid_sources[0x19]	1626	1			T7	177		T13	1		T19	79
valid_sources[0x1a]	2110	1			T7	427		T14	2		T61	2
valid_sources[0x1b]	1581	1			T7	84		T12	2		T19	61
valid_sources[0x1c]	1315	1			T7	37		T15	1		T14	1
valid_sources[0x1d]	1350	1			T7	32		T15	1		T61	1
valid_sources[0x1e]	1361	1			T1	2		T7	46		T127	1
valid_sources[0x1f]	1722	1			T7	148		T15	1		T19	58
valid_sources[0x20]	1650	1			T7	30		T111	1		T19	35
valid_sources[0x21]	1772	1			T7	170		T16	1		T19	15
valid_sources[0x22]	2119	1			T7	36		T16	1		T127	1
valid_sources[0x23]	2258	1			T7	353		T64	2		T19	24
valid_sources[0x24]	1492	1			T7	62		T111	1		T13	3
valid_sources[0x25]	1995	1			T7	131		T15	1		T12	2
valid_sources[0x26]	1635	1			T7	21		T14	1		T111	1
valid_sources[0x27]	1614	1			T7	11		T131	3		T19	53
valid_sources[0x28]	1664	1			T1	3		T7	16		T10	14
valid_sources[0x29]	1895	1			T7	273		T12	2		T127	1
valid_sources[0x2a]	2308	1			T7	231		T11	2		T61	1
valid_sources[0x2b]	1859	1			T7	425		T111	3		T132	1
valid_sources[0x2c]	1596	1			T7	89		T12	2		T19	49
valid_sources[0x2d]	1832	1			T7	169		T127	1		T19	46
valid_sources[0x2e]	1870	1			T7	149		T15	1		T61	1
valid_sources[0x2f]	1622	1			T7	145		T19	40		T133	4
valid_sources[0x30]	2008	1			T1	1		T7	177		T61	1
valid_sources[0x31]	1756	1			T7	199		T12	2		T23	2
valid_sources[0x32]	1724	1			T7	144		T16	1		T60	1
valid_sources[0x33]	1575	1			T7	186		T61	1		T31	1
valid_sources[0x34]	1681	1			T7	86		T60	1		T130	2
valid_sources[0x35]	1836	1			T7	362		T61	1		T134	14
valid_sources[0x36]	2308	1			T4	1		T7	341		T16	1
valid_sources[0x37]	2436	1			T7	172		T61	1		T19	98
valid_sources[0x38]	1817	1			T7	139		T14	1		T13	1
valid_sources[0x39]	1387	1			T7	11		T13	1		T129	1
valid_sources[0x3a]	1466	1			T7	70		T61	2		T135	1
valid_sources[0x3b]	1759	1			T7	189		T61	5		T19	59
valid_sources[0x3c]	1957	1			T7	155		T41	11		T130	2
valid_sources[0x3d]	1897	1			T1	2		T7	406		T13	2
valid_sources[0x3e]	2161	1			T7	119		T14	4		T61	1
valid_sources[0x3f]	1741	1			T7	250		T14	4		T19	12
valid_sources[0x40]	1868	1			T7	103		T12	1		T61	1
valid_sources[0x41]	1239	1			T7	28		T13	1		T127	1
valid_sources[0x42]	1760	1			T7	158		T14	1		T19	41
valid_sources[0x43]	1939	1			T1	1		T7	156		T15	2
valid_sources[0x44]	1505	1			T7	18		T61	1		T19	19
valid_sources[0x45]	1671	1			T7	134		T129	1		T19	57
valid_sources[0x46]	2231	1			T7	273		T15	1		T61	1
valid_sources[0x47]	1875	1			T7	186		T34	1		T19	71
valid_sources[0x48]	1809	1			T7	190		T49	1		T129	1
valid_sources[0x49]	1617	1			T7	17		T14	1		T130	1
valid_sources[0x4a]	1835	1			T7	245		T61	3		T19	37
valid_sources[0x4b]	1517	1			T7	20		T16	1		T61	1
valid_sources[0x4c]	1701	1			T7	33		T15	1		T61	1
valid_sources[0x4d]	1603	1			T7	97		T127	1		T129	1
valid_sources[0x4e]	1508	1			T7	42		T49	1		T136	5
valid_sources[0x4f]	1911	1			T7	150		T14	1		T128	4
valid_sources[0x50]	2041	1			T7	171		T137	1		T19	47
valid_sources[0x51]	1863	1			T1	1		T7	159		T128	4
valid_sources[0x52]	1995	1			T7	126		T61	3		T23	5
valid_sources[0x53]	1512	1			T7	33		T111	1		T60	1
valid_sources[0x54]	2540	1			T7	634		T16	1		T61	1
valid_sources[0x55]	1706	1			T7	159		T16	1		T61	1
valid_sources[0x56]	1810	1			T7	190		T130	2		T131	3
valid_sources[0x57]	1447	1			T7	132		T14	1		T16	1
valid_sources[0x58]	1435	1			T7	71		T15	1		T61	1
valid_sources[0x59]	1770	1			T7	135		T14	1		T60	7
valid_sources[0x5a]	2106	1			T7	177		T61	1		T13	2
valid_sources[0x5b]	2225	1			T7	7		T14	2		T130	1
valid_sources[0x5c]	1589	1			T7	217		T127	2		T19	50
valid_sources[0x5d]	1945	1			T7	138		T16	1		T19	84
valid_sources[0x5e]	2366	1			T7	303		T13	2		T130	1
valid_sources[0x5f]	1908	1			T7	97		T23	1		T34	1
valid_sources[0x60]	2256	1			T7	123		T12	1		T49	1
valid_sources[0x61]	1739	1			T7	75		T15	1		T80	1
valid_sources[0x62]	1792	1			T7	118		T19	26		T138	1
valid_sources[0x63]	2082	1			T7	118		T61	1		T135	2
valid_sources[0x64]	1896	1			T7	43		T37	1		T19	56
valid_sources[0x65]	1869	1			T7	129		T111	1		T19	67
valid_sources[0x66]	1526	1			T3	1		T7	212		T60	5
valid_sources[0x67]	1690	1			T7	160		T13	1		T131	13
valid_sources[0x68]	1402	1			T7	5		T111	1		T13	2
valid_sources[0x69]	1540	1			T7	364		T12	2		T61	1
valid_sources[0x6a]	2047	1			T7	3		T19	46		T20	700
valid_sources[0x6b]	1765	1			T4	1		T7	28		T111	1
valid_sources[0x6c]	1800	1			T1	1		T7	188		T61	1
valid_sources[0x6d]	1618	1			T1	1		T7	209		T61	2
valid_sources[0x6e]	1641	1			T7	31		T14	1		T61	1
valid_sources[0x6f]	1956	1			T1	1		T7	538		T111	1
valid_sources[0x70]	1790	1			T7	15		T12	2		T19	59
valid_sources[0x71]	1876	1			T3	4		T7	99		T61	1
valid_sources[0x72]	1872	1			T2	1		T7	284		T11	6
valid_sources[0x73]	1951	1			T4	1		T7	270		T137	1
valid_sources[0x74]	2202	1			T7	541		T12	2		T19	46
valid_sources[0x75]	1617	1			T7	12		T61	1		T23	2
valid_sources[0x76]	1941	1			T7	231		T37	1		T19	54
valid_sources[0x77]	2249	1			T7	357		T16	1		T111	1
valid_sources[0x78]	1575	1			T7	267		T23	3		T111	2
valid_sources[0x79]	1759	1			T7	155		T14	1		T13	1
valid_sources[0x7a]	1718	1			T7	67		T111	3		T49	1
valid_sources[0x7b]	2071	1			T4	1		T7	512		T128	8
valid_sources[0x7c]	1666	1			T1	2		T7	99		T14	1
valid_sources[0x7d]	2061	1			T7	102		T15	1		T61	1
valid_sources[0x7e]	2101	1			T7	361		T60	6		T127	1
valid_sources[0x7f]	1735	1			T7	110		T14	1		T12	4
valid_sources[0x80]	1935	1			T7	85		T14	1		T127	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

106103

1

T1

11

T7

10094

T15

16

values[0x0]

all_enables

biggest_size

155927

1

T4

4

T7

15040

T9

4

values[0x1]

all_enables

biggest_size

154624

1

T4

3

T7

14877

T10

1