Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44324	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

866290

1

T5

16

T6

9

T8

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	245875	1			T5	160		T6	85		T8	77
values[0x0]	325743	1			T11	79611		T22	27472		T23	11851
values[0x1]	338996	1			T11	82841		T22	28589		T23	12153

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	22367	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

888247

1

T5

94

T6

46

T8

51

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4543	1			T11	887		T28	1		T29	2
valid_sources[0x01]	2583	1			T11	796		T28	1		T13	3
valid_sources[0x02]	2594	1			T11	743		T15	8		T29	4
valid_sources[0x03]	3726	1			T11	719		T33	8		T96	5
valid_sources[0x04]	2974	1			T11	845		T12	1		T28	1
valid_sources[0x05]	3066	1			T11	961		T12	1		T29	2
valid_sources[0x06]	3062	1			T11	859		T111	2		T112	2
valid_sources[0x07]	3466	1			T5	1		T8	2		T11	858
valid_sources[0x08]	4315	1			T5	1		T6	3		T11	928
valid_sources[0x09]	2591	1			T11	809		T33	3		T76	1
valid_sources[0x0a]	3967	1			T8	1		T11	856		T16	4
valid_sources[0x0b]	2860	1			T8	3		T10	14		T11	801
valid_sources[0x0c]	3322	1			T11	782		T15	13		T13	1
valid_sources[0x0d]	3555	1			T6	1		T11	847		T112	2
valid_sources[0x0e]	4826	1			T5	1		T11	902		T28	2
valid_sources[0x0f]	3199	1			T11	820		T28	1		T96	1
valid_sources[0x10]	3180	1			T11	810		T15	1		T96	2
valid_sources[0x11]	3798	1			T8	1		T11	860		T29	1
valid_sources[0x12]	3072	1			T11	986		T33	1		T13	2
valid_sources[0x13]	3466	1			T5	1		T6	1		T11	885
valid_sources[0x14]	3906	1			T11	725		T16	1		T28	1
valid_sources[0x15]	3493	1			T6	1		T11	949		T16	5
valid_sources[0x16]	3760	1			T6	2		T11	965		T12	2
valid_sources[0x17]	3785	1			T5	2		T6	1		T11	925
valid_sources[0x18]	2589	1			T11	835		T12	1		T28	1
valid_sources[0x19]	4117	1			T6	1		T8	1		T11	845
valid_sources[0x1a]	4090	1			T5	1		T8	1		T11	974
valid_sources[0x1b]	3709	1			T8	1		T11	768		T12	1
valid_sources[0x1c]	5933	1			T8	1		T11	853		T28	2
valid_sources[0x1d]	3253	1			T5	3		T6	1		T11	877
valid_sources[0x1e]	3991	1			T6	1		T14	2		T11	780
valid_sources[0x1f]	3926	1			T5	3		T6	1		T11	912
valid_sources[0x20]	2950	1			T5	1		T11	939		T28	2
valid_sources[0x21]	3493	1			T5	1		T8	2		T11	772
valid_sources[0x22]	4580	1			T5	2		T11	931		T12	1
valid_sources[0x23]	2862	1			T5	1		T6	1		T11	835
valid_sources[0x24]	3234	1			T5	3		T11	936		T15	7
valid_sources[0x25]	3501	1			T11	819		T15	18		T16	4
valid_sources[0x26]	4656	1			T11	851		T16	1		T28	3
valid_sources[0x27]	3680	1			T5	2		T10	24		T11	857
valid_sources[0x28]	3690	1			T8	1		T11	754		T76	1
valid_sources[0x29]	3976	1			T5	2		T11	910		T28	1
valid_sources[0x2a]	3183	1			T6	1		T11	927		T112	1
valid_sources[0x2b]	2875	1			T5	2		T11	792		T15	7
valid_sources[0x2c]	2883	1			T5	4		T11	822		T15	8
valid_sources[0x2d]	2935	1			T5	1		T8	1		T11	771
valid_sources[0x2e]	3832	1			T11	846		T28	1		T111	2
valid_sources[0x2f]	4173	1			T10	49		T11	896		T16	2
valid_sources[0x30]	2843	1			T5	1		T6	1		T11	850
valid_sources[0x31]	3580	1			T11	696		T16	1		T111	1
valid_sources[0x32]	3887	1			T5	1		T8	1		T11	800
valid_sources[0x33]	4022	1			T11	983		T28	3		T96	1
valid_sources[0x34]	4146	1			T9	2		T11	868		T16	9
valid_sources[0x35]	3853	1			T6	1		T8	2		T11	747
valid_sources[0x36]	5322	1			T8	1		T11	820		T15	7
valid_sources[0x37]	4558	1			T6	1		T8	2		T11	916
valid_sources[0x38]	3968	1			T5	1		T6	1		T11	767
valid_sources[0x39]	3508	1			T6	2		T11	831		T28	1
valid_sources[0x3a]	2661	1			T11	700		T77	1		T111	1
valid_sources[0x3b]	2452	1			T11	705		T15	1		T13	1
valid_sources[0x3c]	3516	1			T11	830		T12	1		T96	2
valid_sources[0x3d]	2838	1			T5	2		T11	972		T28	2
valid_sources[0x3e]	3450	1			T11	796		T15	4		T29	1
valid_sources[0x3f]	4829	1			T11	823		T16	8		T113	4
valid_sources[0x40]	3755	1			T5	1		T6	1		T11	901
valid_sources[0x41]	3017	1			T11	833		T12	3		T33	3
valid_sources[0x42]	3254	1			T6	1		T11	902		T76	1
valid_sources[0x43]	4729	1			T5	1		T6	1		T8	1
valid_sources[0x44]	3020	1			T11	818		T29	2		T96	8
valid_sources[0x45]	2846	1			T6	1		T11	818		T15	7
valid_sources[0x46]	4055	1			T5	2		T11	868		T33	3
valid_sources[0x47]	4274	1			T6	1		T11	915		T16	1
valid_sources[0x48]	3773	1			T11	781		T28	1		T111	2
valid_sources[0x49]	3417	1			T5	1		T11	956		T16	16
valid_sources[0x4a]	3709	1			T8	1		T11	858		T28	2
valid_sources[0x4b]	3123	1			T5	1		T6	1		T8	1
valid_sources[0x4c]	3021	1			T11	808		T12	2		T29	2
valid_sources[0x4d]	3693	1			T8	1		T11	839		T16	1
valid_sources[0x4e]	3597	1			T6	1		T11	889		T15	6
valid_sources[0x4f]	3523	1			T5	2		T11	788		T28	1
valid_sources[0x50]	3546	1			T11	637		T15	2		T28	1
valid_sources[0x51]	3901	1			T11	894		T96	4		T77	1
valid_sources[0x52]	5727	1			T5	1		T11	856		T28	4
valid_sources[0x53]	2958	1			T6	1		T11	802		T28	2
valid_sources[0x54]	2769	1			T9	1		T11	906		T28	1
valid_sources[0x55]	4589	1			T6	1		T11	822		T12	1
valid_sources[0x56]	3666	1			T5	1		T11	851		T28	1
valid_sources[0x57]	3458	1			T8	1		T11	800		T12	1
valid_sources[0x58]	3423	1			T11	896		T28	2		T96	2
valid_sources[0x59]	3885	1			T5	1		T11	811		T16	4
valid_sources[0x5a]	2581	1			T5	1		T6	2		T11	849
valid_sources[0x5b]	3535	1			T5	1		T6	2		T8	1
valid_sources[0x5c]	3554	1			T8	1		T11	848		T96	1
valid_sources[0x5d]	3498	1			T5	1		T11	808		T28	1
valid_sources[0x5e]	3930	1			T5	1		T10	14		T11	838
valid_sources[0x5f]	3229	1			T11	840		T16	13		T111	1
valid_sources[0x60]	4417	1			T11	1003		T15	1		T96	1
valid_sources[0x61]	4367	1			T11	874		T29	1		T111	2
valid_sources[0x62]	3036	1			T5	2		T11	799		T28	1
valid_sources[0x63]	4158	1			T5	1		T11	839		T15	5
valid_sources[0x64]	3401	1			T6	2		T8	1		T11	879
valid_sources[0x65]	3955	1			T11	932		T76	3		T111	1
valid_sources[0x66]	4190	1			T5	1		T6	1		T11	806
valid_sources[0x67]	3122	1			T5	5		T6	1		T11	836
valid_sources[0x68]	3889	1			T5	2		T11	909		T12	1
valid_sources[0x69]	4227	1			T11	912		T16	1		T111	1
valid_sources[0x6a]	3984	1			T5	2		T8	1		T11	1023
valid_sources[0x6b]	4313	1			T6	1		T8	3		T11	822
valid_sources[0x6c]	3451	1			T6	1		T11	750		T12	1
valid_sources[0x6d]	3848	1			T5	2		T6	1		T9	1
valid_sources[0x6e]	3648	1			T6	1		T8	2		T11	876
valid_sources[0x6f]	3627	1			T5	1		T8	1		T11	784
valid_sources[0x70]	3553	1			T5	2		T11	900		T16	13
valid_sources[0x71]	3061	1			T11	845		T28	1		T38	2
valid_sources[0x72]	4284	1			T5	2		T9	1		T11	829
valid_sources[0x73]	4269	1			T11	913		T29	1		T13	7
valid_sources[0x74]	3332	1			T11	864		T15	3		T16	14
valid_sources[0x75]	2677	1			T5	1		T11	812		T111	1
valid_sources[0x76]	3737	1			T5	1		T11	889		T15	14
valid_sources[0x77]	3215	1			T11	881		T15	10		T77	1
valid_sources[0x78]	3994	1			T11	836		T16	2		T28	1
valid_sources[0x79]	4150	1			T11	983		T15	11		T12	1
valid_sources[0x7a]	3165	1			T11	773		T28	1		T29	1
valid_sources[0x7b]	3368	1			T5	1		T11	834		T28	1
valid_sources[0x7c]	3028	1			T5	1		T6	1		T8	2
valid_sources[0x7d]	4442	1			T11	843		T17	8		T28	1
valid_sources[0x7e]	3882	1			T5	1		T6	1		T11	812
valid_sources[0x7f]	3187	1			T11	821		T111	1		T112	1
valid_sources[0x80]	3303	1			T11	835		T28	2		T33	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

218854

1

T5

16

T6

9

T8

9

values[0x0]

all_enables

biggest_size

322893

1

T11

78944

T22

27208

T23

11764

values[0x1]

all_enables

biggest_size

324543

1

T11

79379

T22

27274

T23

11661

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69811	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

656170

1

T1

1

T2

7

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	183710	1			T3	1		T4	1		T5	64
values[0x0]	250747	1			T1	4		T2	7		T7	6
values[0x1]	291524	1			T1	5		T2	7		T7	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32744	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

693237

1

T1

2

T2

8

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2974	1			T11	657		T33	1		T22	257
valid_sources[0x01]	2764	1			T1	9		T14	2		T11	643
valid_sources[0x02]	2898	1			T11	662		T33	1		T34	1
valid_sources[0x03]	3064	1			T11	656		T36	2		T22	234
valid_sources[0x04]	3165	1			T11	718		T22	215		T114	2
valid_sources[0x05]	2817	1			T11	703		T16	1		T33	1
valid_sources[0x06]	2364	1			T11	713		T115	1		T65	1
valid_sources[0x07]	3447	1			T6	32		T10	42		T11	653
valid_sources[0x08]	3225	1			T11	621		T33	1		T36	1
valid_sources[0x09]	3139	1			T10	5		T11	679		T13	2
valid_sources[0x0a]	2968	1			T11	689		T22	216		T23	69
valid_sources[0x0b]	3074	1			T11	664		T16	1		T115	1
valid_sources[0x0c]	2749	1			T9	1		T11	644		T39	4
valid_sources[0x0d]	3096	1			T11	690		T22	229		T23	103
valid_sources[0x0e]	2597	1			T11	648		T33	2		T35	1
valid_sources[0x0f]	2895	1			T11	668		T16	1		T19	10
valid_sources[0x10]	2623	1			T8	1		T9	1		T11	690
valid_sources[0x11]	2852	1			T11	635		T13	2		T36	1
valid_sources[0x12]	2817	1			T8	1		T14	1		T11	699
valid_sources[0x13]	2933	1			T11	637		T22	186		T23	95
valid_sources[0x14]	2258	1			T2	7		T11	668		T22	232
valid_sources[0x15]	2562	1			T11	688		T33	1		T22	248
valid_sources[0x16]	3124	1			T11	700		T33	3		T34	1
valid_sources[0x17]	2776	1			T11	630		T16	1		T34	1
valid_sources[0x18]	2430	1			T11	682		T115	1		T40	2
valid_sources[0x19]	2862	1			T8	2		T11	672		T36	1
valid_sources[0x1a]	2747	1			T11	673		T37	3		T116	3
valid_sources[0x1b]	2241	1			T8	2		T11	648		T117	1
valid_sources[0x1c]	2515	1			T11	690		T33	1		T36	2
valid_sources[0x1d]	2832	1			T14	1		T11	728		T33	1
valid_sources[0x1e]	2751	1			T5	64		T11	676		T22	218
valid_sources[0x1f]	2705	1			T11	660		T33	1		T18	1
valid_sources[0x20]	3001	1			T11	702		T22	217		T23	138
valid_sources[0x21]	2785	1			T10	4		T14	2		T11	671
valid_sources[0x22]	2744	1			T8	1		T10	2		T11	677
valid_sources[0x23]	3003	1			T10	1		T14	3		T11	659
valid_sources[0x24]	3224	1			T11	726		T13	1		T79	1
valid_sources[0x25]	2498	1			T8	2		T14	1		T11	690
valid_sources[0x26]	3496	1			T14	2		T11	708		T22	203
valid_sources[0x27]	3076	1			T11	708		T77	4		T113	1
valid_sources[0x28]	2855	1			T11	730		T39	1		T22	244
valid_sources[0x29]	3160	1			T14	1		T11	702		T16	1
valid_sources[0x2a]	2706	1			T11	703		T33	3		T79	1
valid_sources[0x2b]	2691	1			T14	1		T11	687		T33	1
valid_sources[0x2c]	3331	1			T11	617		T118	1		T22	177
valid_sources[0x2d]	3032	1			T14	1		T11	712		T116	2
valid_sources[0x2e]	2856	1			T8	1		T11	642		T37	3
valid_sources[0x2f]	2965	1			T9	3		T11	666		T33	1
valid_sources[0x30]	2960	1			T2	2		T11	690		T33	3
valid_sources[0x31]	2659	1			T11	664		T33	1		T22	283
valid_sources[0x32]	2807	1			T11	694		T79	1		T22	272
valid_sources[0x33]	3456	1			T11	723		T16	1		T63	1
valid_sources[0x34]	2697	1			T11	634		T22	294		T23	101
valid_sources[0x35]	2861	1			T11	732		T33	2		T36	1
valid_sources[0x36]	3193	1			T11	636		T18	1		T116	2
valid_sources[0x37]	2630	1			T11	752		T34	1		T37	9
valid_sources[0x38]	2428	1			T14	1		T11	690		T33	1
valid_sources[0x39]	3120	1			T14	1		T11	650		T33	2
valid_sources[0x3a]	2847	1			T7	1		T11	677		T113	2
valid_sources[0x3b]	2645	1			T8	1		T11	693		T33	1
valid_sources[0x3c]	3185	1			T14	4		T11	650		T32	1
valid_sources[0x3d]	3178	1			T7	1		T11	681		T61	1
valid_sources[0x3e]	2726	1			T14	1		T11	704		T33	1
valid_sources[0x3f]	2605	1			T11	676		T77	2		T115	1
valid_sources[0x40]	2675	1			T11	666		T33	2		T79	1
valid_sources[0x41]	2589	1			T11	717		T33	1		T118	3
valid_sources[0x42]	2443	1			T2	1		T11	671		T16	1
valid_sources[0x43]	3410	1			T11	661		T115	1		T22	228
valid_sources[0x44]	2727	1			T14	1		T11	735		T16	1
valid_sources[0x45]	2795	1			T11	681		T36	1		T22	214
valid_sources[0x46]	2652	1			T11	705		T66	1		T22	237
valid_sources[0x47]	2933	1			T11	687		T22	205		T119	1
valid_sources[0x48]	2966	1			T11	712		T33	1		T115	2
valid_sources[0x49]	2738	1			T8	1		T11	609		T113	4
valid_sources[0x4a]	3143	1			T11	693		T33	1		T13	1
valid_sources[0x4b]	2565	1			T11	707		T33	2		T111	128
valid_sources[0x4c]	3075	1			T11	681		T12	1		T22	236
valid_sources[0x4d]	2384	1			T11	716		T33	1		T22	210
valid_sources[0x4e]	2641	1			T14	2		T11	707		T33	2
valid_sources[0x4f]	3043	1			T11	653		T22	235		T120	1
valid_sources[0x50]	2731	1			T11	701		T78	4		T22	243
valid_sources[0x51]	2654	1			T11	644		T115	2		T22	225
valid_sources[0x52]	2580	1			T11	741		T33	3		T22	237
valid_sources[0x53]	3330	1			T11	694		T34	1		T20	2
valid_sources[0x54]	2704	1			T11	663		T34	2		T22	181
valid_sources[0x55]	2449	1			T11	731		T115	1		T22	214
valid_sources[0x56]	2637	1			T11	689		T33	1		T34	1
valid_sources[0x57]	2927	1			T11	695		T22	243		T121	2
valid_sources[0x58]	2369	1			T11	701		T34	1		T22	297
valid_sources[0x59]	2884	1			T11	680		T113	5		T79	1
valid_sources[0x5a]	3087	1			T9	1		T11	690		T24	1
valid_sources[0x5b]	2500	1			T11	711		T16	1		T33	1
valid_sources[0x5c]	2480	1			T11	701		T22	204		T23	87
valid_sources[0x5d]	3542	1			T2	1		T10	4		T11	664
valid_sources[0x5e]	2853	1			T8	2		T11	719		T16	2
valid_sources[0x5f]	2570	1			T9	1		T10	23		T11	673
valid_sources[0x60]	2604	1			T11	682		T22	251		T23	74
valid_sources[0x61]	2663	1			T9	1		T11	612		T22	220
valid_sources[0x62]	2785	1			T11	684		T22	223		T23	81
valid_sources[0x63]	3078	1			T11	651		T34	1		T13	1
valid_sources[0x64]	2445	1			T11	673		T79	1		T117	1
valid_sources[0x65]	2672	1			T11	677		T33	1		T116	6
valid_sources[0x66]	2975	1			T11	670		T33	2		T39	1
valid_sources[0x67]	2926	1			T11	688		T22	197		T23	56
valid_sources[0x68]	2394	1			T8	1		T11	748		T36	2
valid_sources[0x69]	3353	1			T11	669		T61	1		T22	220
valid_sources[0x6a]	3043	1			T11	588		T12	4		T63	1
valid_sources[0x6b]	2748	1			T11	710		T16	3		T33	1
valid_sources[0x6c]	2691	1			T11	638		T12	1		T22	211
valid_sources[0x6d]	2685	1			T11	728		T13	1		T36	1
valid_sources[0x6e]	2415	1			T11	662		T38	19		T22	222
valid_sources[0x6f]	2747	1			T11	679		T34	1		T39	1
valid_sources[0x70]	3202	1			T8	1		T11	693		T39	3
valid_sources[0x71]	3020	1			T11	695		T79	1		T22	198
valid_sources[0x72]	3134	1			T9	1		T11	731		T33	2
valid_sources[0x73]	2772	1			T11	646		T13	2		T36	1
valid_sources[0x74]	2677	1			T11	740		T12	1		T27	1
valid_sources[0x75]	2735	1			T11	649		T37	4		T115	1
valid_sources[0x76]	3141	1			T11	674		T33	1		T22	163
valid_sources[0x77]	3158	1			T11	639		T12	1		T13	1
valid_sources[0x78]	2344	1			T11	710		T33	1		T36	2
valid_sources[0x79]	3192	1			T8	1		T11	720		T33	1
valid_sources[0x7a]	2779	1			T8	1		T11	691		T116	3
valid_sources[0x7b]	2566	1			T11	678		T16	3		T13	1
valid_sources[0x7c]	2730	1			T11	669		T113	4		T79	1
valid_sources[0x7d]	3248	1			T11	675		T33	1		T34	1
valid_sources[0x7e]	2904	1			T11	686		T33	1		T36	1
valid_sources[0x7f]	2700	1			T11	670		T34	1		T39	1
valid_sources[0x80]	2744	1			T11	720		T34	1		T79	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

165925

1

T3

1

T5

38

T6

14

values[0x0]

all_enables

biggest_size

245000

1

T1

1

T2

5

T7

3

values[0x1]

all_enables

biggest_size

245245

1

T2

2

T11

59698

T63

1