Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50894	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1044314

1

T2

6

T3

3

T8

24

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	292425	1			T2	6		T3	3		T8	199
values[0x0]	393769	1			T13	31474		T14	19787		T15	94339
values[0x1]	409014	1			T13	32375		T14	20324		T15	97525

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25930	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1069278

1

T2

6

T3

3

T8

124

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4455	1			T8	2		T30	4		T60	1
valid_sources[0x01]	4335	1			T30	1		T99	1		T97	5
valid_sources[0x02]	3800	1			T18	1		T30	1		T97	3
valid_sources[0x03]	3856	1			T8	1		T30	1		T97	1
valid_sources[0x04]	5112	1			T16	2		T99	2		T97	2
valid_sources[0x05]	4707	1			T8	1		T12	2		T30	3
valid_sources[0x06]	4954	1			T29	1		T30	1		T99	4
valid_sources[0x07]	4772	1			T16	9		T30	3		T97	1
valid_sources[0x08]	4147	1			T8	2		T11	15		T97	1
valid_sources[0x09]	3381	1			T16	3		T30	2		T97	2
valid_sources[0x0a]	4545	1			T16	4		T12	3		T30	1
valid_sources[0x0b]	3810	1			T8	1		T30	1		T97	1
valid_sources[0x0c]	3717	1			T8	3		T29	1		T99	1
valid_sources[0x0d]	3470	1			T8	1		T12	1		T30	1
valid_sources[0x0e]	3582	1			T16	1		T18	3		T99	1
valid_sources[0x0f]	3912	1			T8	1		T60	3		T97	3
valid_sources[0x10]	3136	1			T12	2		T18	1		T30	3
valid_sources[0x11]	4189	1			T16	4		T97	1		T13	663
valid_sources[0x12]	3258	1			T30	2		T98	5		T113	3
valid_sources[0x13]	4112	1			T8	1		T12	1		T76	1
valid_sources[0x14]	5710	1			T99	1		T97	2		T76	1
valid_sources[0x15]	3864	1			T8	1		T20	1		T29	1
valid_sources[0x16]	4624	1			T30	2		T99	4		T97	1
valid_sources[0x17]	3203	1			T20	3		T12	1		T97	1
valid_sources[0x18]	5289	1			T8	3		T29	1		T75	1
valid_sources[0x19]	4529	1			T8	1		T16	3		T18	10
valid_sources[0x1a]	3876	1			T8	3		T18	4		T30	1
valid_sources[0x1b]	4534	1			T8	2		T20	1		T29	1
valid_sources[0x1c]	4570	1			T8	1		T16	2		T29	3
valid_sources[0x1d]	5248	1			T8	4		T18	6		T30	2
valid_sources[0x1e]	3645	1			T18	6		T30	1		T97	2
valid_sources[0x1f]	6295	1			T29	3		T30	1		T99	1
valid_sources[0x20]	5525	1			T18	5		T30	2		T13	181
valid_sources[0x21]	4939	1			T12	1		T97	2		T13	377
valid_sources[0x22]	4160	1			T16	1		T97	1		T75	1
valid_sources[0x23]	3729	1			T8	3		T16	1		T18	3
valid_sources[0x24]	4258	1			T16	5		T17	38		T20	1
valid_sources[0x25]	3123	1			T29	1		T30	1		T97	1
valid_sources[0x26]	3219	1			T8	2		T29	1		T30	3
valid_sources[0x27]	4944	1			T16	6		T30	2		T99	1
valid_sources[0x28]	4169	1			T8	2		T30	1		T97	2
valid_sources[0x29]	3816	1			T8	3		T16	3		T75	2
valid_sources[0x2a]	5242	1			T12	2		T97	1		T98	7
valid_sources[0x2b]	4638	1			T76	1		T13	500		T14	199
valid_sources[0x2c]	4725	1			T30	1		T97	1		T114	30
valid_sources[0x2d]	5303	1			T30	1		T97	1		T98	6
valid_sources[0x2e]	3147	1			T8	1		T30	2		T75	4
valid_sources[0x2f]	3295	1			T8	2		T16	23		T30	3
valid_sources[0x30]	4138	1			T8	1		T16	2		T12	3
valid_sources[0x31]	3287	1			T30	1		T97	3		T75	1
valid_sources[0x32]	5112	1			T8	2		T16	6		T18	3
valid_sources[0x33]	4082	1			T8	2		T20	3		T30	1
valid_sources[0x34]	4093	1			T30	1		T97	1		T113	2
valid_sources[0x35]	5426	1			T8	2		T20	1		T30	5
valid_sources[0x36]	4798	1			T18	1		T29	1		T30	2
valid_sources[0x37]	5237	1			T8	1		T29	1		T30	2
valid_sources[0x38]	4295	1			T8	1		T18	4		T30	2
valid_sources[0x39]	3565	1			T30	1		T13	440		T14	204
valid_sources[0x3a]	4620	1			T8	2		T16	1		T12	2
valid_sources[0x3b]	3725	1			T8	1		T30	3		T97	1
valid_sources[0x3c]	3557	1			T8	2		T30	4		T99	1
valid_sources[0x3d]	6892	1			T8	1		T18	9		T30	1
valid_sources[0x3e]	4044	1			T8	1		T30	1		T97	1
valid_sources[0x3f]	3472	1			T29	1		T30	1		T98	1
valid_sources[0x40]	3216	1			T8	1		T12	2		T29	2
valid_sources[0x41]	5588	1			T97	4		T98	3		T21	1
valid_sources[0x42]	5600	1			T8	2		T29	2		T30	1
valid_sources[0x43]	3972	1			T99	1		T113	1		T14	224
valid_sources[0x44]	4460	1			T29	1		T30	2		T97	4
valid_sources[0x45]	5100	1			T8	2		T16	4		T18	1
valid_sources[0x46]	3403	1			T8	1		T30	1		T97	1
valid_sources[0x47]	4591	1			T8	3		T18	5		T30	1
valid_sources[0x48]	4286	1			T8	1		T18	11		T30	2
valid_sources[0x49]	4952	1			T8	2		T16	3		T12	1
valid_sources[0x4a]	5024	1			T16	2		T12	1		T30	3
valid_sources[0x4b]	4369	1			T8	1		T20	1		T30	1
valid_sources[0x4c]	5500	1			T8	1		T30	2		T99	1
valid_sources[0x4d]	5333	1			T8	2		T20	2		T12	2
valid_sources[0x4e]	3754	1			T3	3		T20	1		T30	1
valid_sources[0x4f]	4731	1			T18	9		T29	1		T97	2
valid_sources[0x50]	4366	1			T8	2		T20	1		T30	1
valid_sources[0x51]	4310	1			T8	1		T99	3		T97	2
valid_sources[0x52]	3400	1			T97	2		T115	1		T13	414
valid_sources[0x53]	4319	1			T8	1		T97	3		T78	3
valid_sources[0x54]	3363	1			T8	1		T30	1		T60	1
valid_sources[0x55]	3755	1			T20	2		T30	1		T99	2
valid_sources[0x56]	5157	1			T16	2		T29	1		T30	1
valid_sources[0x57]	3886	1			T13	853		T14	201		T15	888
valid_sources[0x58]	3513	1			T18	5		T97	1		T14	200
valid_sources[0x59]	4344	1			T16	2		T20	3		T60	1
valid_sources[0x5a]	5766	1			T20	2		T18	11		T30	1
valid_sources[0x5b]	4106	1			T16	17		T29	2		T97	2
valid_sources[0x5c]	5018	1			T8	3		T20	1		T12	2
valid_sources[0x5d]	3236	1			T8	4		T18	1		T30	1
valid_sources[0x5e]	3406	1			T8	2		T18	2		T97	4
valid_sources[0x5f]	4325	1			T8	1		T20	4		T30	1
valid_sources[0x60]	3634	1			T18	1		T97	2		T116	6
valid_sources[0x61]	4473	1			T8	1		T97	4		T13	7
valid_sources[0x62]	3743	1			T16	4		T17	23		T12	1
valid_sources[0x63]	5149	1			T30	1		T116	2		T115	1
valid_sources[0x64]	4314	1			T12	2		T98	2		T116	1
valid_sources[0x65]	3563	1			T12	2		T18	2		T30	1
valid_sources[0x66]	4620	1			T16	1		T12	2		T30	2
valid_sources[0x67]	4582	1			T8	1		T18	6		T30	1
valid_sources[0x68]	3794	1			T16	1		T18	7		T99	1
valid_sources[0x69]	3896	1			T8	1		T18	2		T30	1
valid_sources[0x6a]	3922	1			T11	31		T30	3		T99	1
valid_sources[0x6b]	5245	1			T8	2		T16	1		T19	35
valid_sources[0x6c]	5106	1			T16	3		T20	1		T29	3
valid_sources[0x6d]	3661	1			T75	2		T113	3		T35	1
valid_sources[0x6e]	3681	1			T20	6		T30	1		T97	1
valid_sources[0x6f]	3883	1			T12	2		T113	2		T78	1
valid_sources[0x70]	3817	1			T29	1		T97	3		T75	2
valid_sources[0x71]	3500	1			T16	4		T12	1		T30	2
valid_sources[0x72]	5053	1			T8	1		T30	2		T97	3
valid_sources[0x73]	5006	1			T8	1		T20	2		T29	2
valid_sources[0x74]	3299	1			T16	1		T20	2		T97	2
valid_sources[0x75]	4150	1			T8	1		T12	1		T30	3
valid_sources[0x76]	5041	1			T8	2		T60	3		T97	3
valid_sources[0x77]	4132	1			T2	6		T30	1		T99	1
valid_sources[0x78]	4226	1			T16	1		T30	1		T97	1
valid_sources[0x79]	3689	1			T8	1		T16	9		T20	1
valid_sources[0x7a]	4770	1			T16	1		T18	1		T30	1
valid_sources[0x7b]	5279	1			T16	2		T30	1		T76	1
valid_sources[0x7c]	4046	1			T16	3		T30	1		T97	1
valid_sources[0x7d]	3813	1			T30	2		T97	1		T78	1
valid_sources[0x7e]	3134	1			T8	1		T97	1		T98	2
valid_sources[0x7f]	4677	1			T8	1		T13	253		T14	191
valid_sources[0x80]	5243	1			T8	2		T30	1		T99	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

263049

1

T2

6

T3

3

T8

24

values[0x0]

all_enables

biggest_size

390330

1

T13

31191

T14

19606

T15

93567

values[0x1]

all_enables

biggest_size

390935

1

T13

30898

T14

19398

T15

93345

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	82672	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

810593

1

T1

1

T2

9

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	225422	1			T2	18		T3	17		T5	1
values[0x0]	309679	1			T1	6		T4	4		T6	10
values[0x1]	358164	1			T1	3		T4	5		T6	13

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	38272	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

854993

1

T1

1

T2

10

T3

9

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4570	1			T8	1		T27	2		T115	3
valid_sources[0x01]	3530	1			T3	1		T13	297		T14	201
valid_sources[0x02]	3784	1			T3	1		T8	2		T98	1
valid_sources[0x03]	4110	1			T75	1		T13	125		T14	183
valid_sources[0x04]	3463	1			T8	4		T13	492		T14	180
valid_sources[0x05]	4009	1			T60	1		T65	2		T115	4
valid_sources[0x06]	3298	1			T8	1		T13	172		T14	185
valid_sources[0x07]	3363	1			T99	5		T13	186		T14	178
valid_sources[0x08]	3061	1			T21	1		T75	1		T13	319
valid_sources[0x09]	3653	1			T18	2		T32	1		T13	340
valid_sources[0x0a]	2727	1			T21	1		T32	1		T13	38
valid_sources[0x0b]	2799	1			T10	1		T60	1		T13	280
valid_sources[0x0c]	3581	1			T18	2		T13	30		T14	181
valid_sources[0x0d]	3100	1			T32	3		T34	2		T13	280
valid_sources[0x0e]	3153	1			T18	1		T13	80		T54	1
valid_sources[0x0f]	3765	1			T4	2		T8	1		T13	441
valid_sources[0x10]	3519	1			T8	2		T18	5		T32	1
valid_sources[0x11]	3949	1			T60	1		T13	149		T14	146
valid_sources[0x12]	3734	1			T13	728		T36	1		T14	172
valid_sources[0x13]	4168	1			T13	70		T14	163		T15	871
valid_sources[0x14]	3937	1			T18	9		T60	1		T13	596
valid_sources[0x15]	3528	1			T13	184		T14	182		T15	856
valid_sources[0x16]	3022	1			T13	76		T14	160		T15	744
valid_sources[0x17]	3722	1			T75	1		T13	15		T14	172
valid_sources[0x18]	4090	1			T3	1		T12	3		T13	742
valid_sources[0x19]	3670	1			T27	1		T13	689		T14	176
valid_sources[0x1a]	2686	1			T5	1		T18	1		T13	21
valid_sources[0x1b]	3390	1			T8	1		T13	263		T14	164
valid_sources[0x1c]	4107	1			T1	9		T20	2		T13	509
valid_sources[0x1d]	3240	1			T6	2		T18	1		T13	478
valid_sources[0x1e]	3801	1			T13	214		T14	168		T15	868
valid_sources[0x1f]	3228	1			T2	11		T8	1		T31	2
valid_sources[0x20]	4021	1			T6	2		T99	2		T13	684
valid_sources[0x21]	3031	1			T3	1		T8	3		T18	2
valid_sources[0x22]	3739	1			T13	21		T14	147		T15	809
valid_sources[0x23]	4131	1			T8	2		T13	585		T14	175
valid_sources[0x24]	3845	1			T34	1		T13	544		T36	1
valid_sources[0x25]	3045	1			T8	1		T12	3		T18	7
valid_sources[0x26]	3060	1			T21	1		T75	1		T13	372
valid_sources[0x27]	3235	1			T3	1		T8	3		T13	285
valid_sources[0x28]	3313	1			T98	2		T13	304		T14	149
valid_sources[0x29]	3749	1			T18	3		T60	1		T13	408
valid_sources[0x2a]	4023	1			T13	803		T14	189		T15	831
valid_sources[0x2b]	3089	1			T13	196		T14	183		T15	817
valid_sources[0x2c]	3889	1			T13	521		T14	205		T15	785
valid_sources[0x2d]	3496	1			T18	1		T99	2		T32	1
valid_sources[0x2e]	3472	1			T8	3		T13	257		T54	3
valid_sources[0x2f]	3015	1			T6	4		T28	3		T60	1
valid_sources[0x30]	3550	1			T13	274		T14	177		T15	763
valid_sources[0x31]	3486	1			T98	7		T32	1		T66	1
valid_sources[0x32]	2888	1			T20	3		T13	48		T36	2
valid_sources[0x33]	3379	1			T21	1		T65	2		T13	360
valid_sources[0x34]	3189	1			T13	33		T14	194		T15	877
valid_sources[0x35]	3072	1			T21	1		T13	252		T14	141
valid_sources[0x36]	3548	1			T18	6		T60	2		T13	403
valid_sources[0x37]	4022	1			T13	345		T14	161		T56	1
valid_sources[0x38]	3014	1			T98	3		T13	22		T14	193
valid_sources[0x39]	3327	1			T22	20		T13	40		T54	1
valid_sources[0x3a]	3303	1			T3	1		T115	3		T13	278
valid_sources[0x3b]	2970	1			T4	1		T20	4		T98	2
valid_sources[0x3c]	3846	1			T75	1		T13	256		T54	3
valid_sources[0x3d]	3662	1			T8	2		T29	32		T75	1
valid_sources[0x3e]	3632	1			T13	217		T36	1		T54	1
valid_sources[0x3f]	2998	1			T60	1		T66	1		T13	97
valid_sources[0x40]	3502	1			T18	8		T31	1		T60	4
valid_sources[0x41]	3390	1			T60	1		T13	224		T14	205
valid_sources[0x42]	3279	1			T18	7		T98	4		T34	1
valid_sources[0x43]	3649	1			T99	2		T13	370		T14	166
valid_sources[0x44]	3329	1			T18	3		T60	1		T32	1
valid_sources[0x45]	3367	1			T13	23		T14	211		T15	719
valid_sources[0x46]	4001	1			T13	411		T14	175		T15	814
valid_sources[0x47]	3184	1			T115	1		T13	364		T14	135
valid_sources[0x48]	3898	1			T60	2		T115	1		T13	488
valid_sources[0x49]	3507	1			T8	1		T13	217		T36	1
valid_sources[0x4a]	4528	1			T32	1		T114	32		T13	433
valid_sources[0x4b]	2829	1			T13	63		T14	172		T15	747
valid_sources[0x4c]	3665	1			T60	1		T13	23		T54	1
valid_sources[0x4d]	3942	1			T34	1		T13	523		T14	168
valid_sources[0x4e]	2917	1			T98	1		T13	63		T14	222
valid_sources[0x4f]	3836	1			T8	2		T60	1		T13	336
valid_sources[0x50]	3294	1			T8	2		T13	225		T14	164
valid_sources[0x51]	3239	1			T75	1		T13	275		T14	168
valid_sources[0x52]	3116	1			T32	1		T13	171		T14	167
valid_sources[0x53]	3562	1			T3	1		T13	372		T36	1
valid_sources[0x54]	2893	1			T78	3		T13	316		T14	184
valid_sources[0x55]	4597	1			T8	1		T13	473		T36	1
valid_sources[0x56]	3083	1			T98	3		T34	1		T13	157
valid_sources[0x57]	4043	1			T99	1		T13	306		T14	173
valid_sources[0x58]	2917	1			T13	186		T14	177		T15	813
valid_sources[0x59]	4066	1			T13	267		T14	164		T56	1
valid_sources[0x5a]	3036	1			T8	1		T66	1		T13	148
valid_sources[0x5b]	2962	1			T13	39		T14	155		T15	911
valid_sources[0x5c]	3598	1			T19	32		T63	2		T13	485
valid_sources[0x5d]	3505	1			T99	3		T21	1		T13	118
valid_sources[0x5e]	4061	1			T8	1		T75	1		T13	210
valid_sources[0x5f]	3464	1			T8	6		T18	2		T60	1
valid_sources[0x60]	2740	1			T21	2		T65	2		T34	1
valid_sources[0x61]	3774	1			T6	1		T18	6		T98	1
valid_sources[0x62]	3516	1			T34	1		T13	405		T14	162
valid_sources[0x63]	2830	1			T20	1		T13	213		T14	190
valid_sources[0x64]	3529	1			T66	1		T13	277		T14	179
valid_sources[0x65]	3177	1			T21	1		T13	54		T14	174
valid_sources[0x66]	3324	1			T18	1		T75	1		T13	261
valid_sources[0x67]	3709	1			T3	1		T8	1		T60	1
valid_sources[0x68]	3176	1			T8	1		T13	63		T14	167
valid_sources[0x69]	4169	1			T31	1		T13	559		T14	164
valid_sources[0x6a]	4300	1			T13	227		T14	156		T15	859
valid_sources[0x6b]	3536	1			T18	1		T98	5		T13	391
valid_sources[0x6c]	3371	1			T8	2		T32	3		T13	201
valid_sources[0x6d]	3793	1			T8	2		T13	325		T54	1
valid_sources[0x6e]	3363	1			T32	1		T13	263		T14	149
valid_sources[0x6f]	2958	1			T60	1		T13	196		T14	182
valid_sources[0x70]	3409	1			T18	8		T98	1		T13	438
valid_sources[0x71]	3955	1			T13	145		T36	1		T14	192
valid_sources[0x72]	3784	1			T98	2		T21	1		T13	373
valid_sources[0x73]	2781	1			T13	15		T14	139		T15	689
valid_sources[0x74]	3160	1			T98	2		T13	409		T14	196
valid_sources[0x75]	3839	1			T17	64		T78	8		T13	391
valid_sources[0x76]	3461	1			T13	439		T14	231		T15	792
valid_sources[0x77]	3450	1			T13	98		T14	134		T15	761
valid_sources[0x78]	3147	1			T60	2		T32	1		T65	1
valid_sources[0x79]	4095	1			T6	9		T18	2		T98	3
valid_sources[0x7a]	3729	1			T8	1		T13	682		T14	170
valid_sources[0x7b]	3169	1			T3	1		T32	1		T13	8
valid_sources[0x7c]	4011	1			T18	5		T78	3		T13	47
valid_sources[0x7d]	3995	1			T3	1		T63	1		T13	455
valid_sources[0x7e]	3172	1			T13	94		T54	1		T14	147
valid_sources[0x7f]	3560	1			T13	465		T14	155		T15	748
valid_sources[0x80]	2800	1			T6	2		T13	100		T14	135

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

205088

1

T2

9

T3

8

T8

59

values[0x0]

all_enables

biggest_size

303016

1

T1

1

T4

1

T6

5

values[0x1]

all_enables

biggest_size

302489

1

T6

1

T27

1

T13

24339