Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30082	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

264346

1

T3

14

T4

4

T5

26

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	92545	1			T3	161		T4	43		T5	248
values[0x0]	98965	1			T19	301		T20	676		T21	845
values[0x1]	102918	1			T19	355		T20	711		T21	947

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14235	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

280193

1

T3

93

T4

26

T5

160

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	976	1			T13	1		T133	5		T33	1
valid_sources[0x01]	1085	1			T3	1		T4	1		T14	1
valid_sources[0x02]	1030	1			T33	2		T135	1		T156	4
valid_sources[0x03]	949	1			T14	1		T135	3		T34	1
valid_sources[0x04]	977	1			T15	1		T135	1		T34	2
valid_sources[0x05]	977	1			T134	1		T135	3		T136	2
valid_sources[0x06]	1052	1			T3	1		T135	2		T156	1
valid_sources[0x07]	1193	1			T135	4		T157	1		T156	1
valid_sources[0x08]	1455	1			T5	15		T13	1		T156	3
valid_sources[0x09]	1271	1			T152	2		T156	2		T19	4
valid_sources[0x0a]	1027	1			T33	1		T135	3		T34	1
valid_sources[0x0b]	1356	1			T3	1		T135	1		T156	1
valid_sources[0x0c]	1302	1			T3	1		T6	1		T84	3
valid_sources[0x0d]	1046	1			T3	2		T33	2		T135	2
valid_sources[0x0e]	977	1			T3	1		T152	2		T135	3
valid_sources[0x0f]	1056	1			T16	18		T133	1		T33	1
valid_sources[0x10]	1345	1			T10	34		T101	3		T33	5
valid_sources[0x11]	1067	1			T4	1		T10	36		T33	1
valid_sources[0x12]	1200	1			T3	1		T14	2		T133	3
valid_sources[0x13]	975	1			T3	3		T4	1		T133	10
valid_sources[0x14]	1210	1			T5	34		T6	1		T11	1
valid_sources[0x15]	1226	1			T3	2		T13	1		T133	8
valid_sources[0x16]	1198	1			T3	3		T134	3		T33	1
valid_sources[0x17]	1009	1			T14	1		T135	1		T136	8
valid_sources[0x18]	1009	1			T33	1		T135	1		T156	1
valid_sources[0x19]	1002	1			T3	1		T15	1		T135	4
valid_sources[0x1a]	1040	1			T32	24		T135	2		T156	1
valid_sources[0x1b]	1061	1			T3	2		T10	10		T14	1
valid_sources[0x1c]	1086	1			T14	2		T32	17		T135	2
valid_sources[0x1d]	1017	1			T33	1		T152	2		T135	4
valid_sources[0x1e]	931	1			T3	4		T14	4		T33	1
valid_sources[0x1f]	1037	1			T3	1		T14	1		T16	15
valid_sources[0x20]	1339	1			T11	1		T136	5		T137	39
valid_sources[0x21]	1451	1			T16	16		T134	4		T135	3
valid_sources[0x22]	948	1			T3	1		T152	2		T135	2
valid_sources[0x23]	988	1			T156	2		T19	4		T76	1
valid_sources[0x24]	970	1			T15	1		T11	1		T102	1
valid_sources[0x25]	1204	1			T3	1		T11	1		T33	2
valid_sources[0x26]	1343	1			T3	1		T134	1		T156	1
valid_sources[0x27]	1140	1			T3	2		T135	2		T156	1
valid_sources[0x28]	952	1			T19	3		T72	1		T76	4
valid_sources[0x29]	1044	1			T133	2		T135	1		T156	1
valid_sources[0x2a]	963	1			T133	1		T134	2		T33	2
valid_sources[0x2b]	1052	1			T13	1		T135	2		T34	1
valid_sources[0x2c]	1086	1			T3	1		T33	3		T135	1
valid_sources[0x2d]	1118	1			T133	10		T134	1		T34	1
valid_sources[0x2e]	1250	1			T3	1		T13	1		T134	1
valid_sources[0x2f]	1048	1			T13	1		T11	1		T33	4
valid_sources[0x30]	991	1			T4	1		T157	1		T156	1
valid_sources[0x31]	1040	1			T13	2		T16	10		T135	3
valid_sources[0x32]	1079	1			T3	1		T4	1		T33	2
valid_sources[0x33]	933	1			T3	1		T14	1		T33	1
valid_sources[0x34]	974	1			T13	1		T134	1		T135	1
valid_sources[0x35]	1127	1			T3	1		T152	1		T158	6
valid_sources[0x36]	1069	1			T11	1		T84	5		T156	3
valid_sources[0x37]	1125	1			T13	1		T14	1		T101	4
valid_sources[0x38]	1621	1			T3	1		T15	1		T14	1
valid_sources[0x39]	933	1			T33	1		T102	2		T135	1
valid_sources[0x3a]	1078	1			T3	1		T4	1		T33	1
valid_sources[0x3b]	953	1			T135	1		T156	1		T136	2
valid_sources[0x3c]	954	1			T4	1		T134	1		T33	1
valid_sources[0x3d]	936	1			T13	1		T15	1		T102	2
valid_sources[0x3e]	1022	1			T4	1		T33	1		T152	1
valid_sources[0x3f]	965	1			T134	1		T157	1		T156	1
valid_sources[0x40]	1205	1			T133	2		T33	1		T152	1
valid_sources[0x41]	921	1			T4	1		T14	2		T133	3
valid_sources[0x42]	1006	1			T4	2		T13	1		T156	1
valid_sources[0x43]	968	1			T3	2		T101	1		T102	1
valid_sources[0x44]	938	1			T3	4		T33	1		T152	1
valid_sources[0x45]	1077	1			T4	2		T5	16		T102	1
valid_sources[0x46]	1336	1			T3	1		T135	1		T19	4
valid_sources[0x47]	1102	1			T4	1		T16	18		T11	1
valid_sources[0x48]	1028	1			T3	2		T34	1		T156	2
valid_sources[0x49]	1068	1			T6	2		T34	1		T19	2
valid_sources[0x4a]	3034	1			T101	3		T102	2		T135	2
valid_sources[0x4b]	981	1			T3	1		T5	36		T14	1
valid_sources[0x4c]	1025	1			T33	3		T135	2		T156	2
valid_sources[0x4d]	1166	1			T11	2		T133	5		T135	2
valid_sources[0x4e]	1174	1			T6	1		T33	1		T102	1
valid_sources[0x4f]	1351	1			T3	1		T102	1		T156	1
valid_sources[0x50]	1213	1			T157	1		T156	1		T19	6
valid_sources[0x51]	1105	1			T3	1		T4	1		T8	16
valid_sources[0x52]	969	1			T3	2		T8	51		T59	15
valid_sources[0x53]	1003	1			T11	1		T102	1		T19	4
valid_sources[0x54]	1159	1			T3	1		T13	1		T135	1
valid_sources[0x55]	931	1			T3	2		T14	1		T135	1
valid_sources[0x56]	1101	1			T3	3		T5	10		T14	2
valid_sources[0x57]	1024	1			T3	1		T10	20		T33	2
valid_sources[0x58]	1227	1			T135	1		T156	1		T19	4
valid_sources[0x59]	1063	1			T33	2		T135	2		T34	1
valid_sources[0x5a]	1148	1			T3	2		T135	2		T156	1
valid_sources[0x5b]	1051	1			T134	2		T152	2		T159	1
valid_sources[0x5c]	1088	1			T5	92		T13	1		T15	1
valid_sources[0x5d]	1178	1			T33	2		T152	3		T135	1
valid_sources[0x5e]	2022	1			T3	1		T15	1		T134	1
valid_sources[0x5f]	949	1			T6	2		T133	16		T33	4
valid_sources[0x60]	1453	1			T4	2		T134	1		T33	2
valid_sources[0x61]	1396	1			T33	2		T135	1		T157	1
valid_sources[0x62]	926	1			T3	2		T14	1		T157	1
valid_sources[0x63]	1009	1			T3	1		T15	1		T152	1
valid_sources[0x64]	1027	1			T3	1		T133	2		T32	14
valid_sources[0x65]	1229	1			T3	1		T32	27		T34	2
valid_sources[0x66]	1187	1			T101	8		T152	1		T135	3
valid_sources[0x67]	1411	1			T3	1		T4	1		T134	1
valid_sources[0x68]	987	1			T3	1		T15	1		T11	2
valid_sources[0x69]	964	1			T3	1		T4	1		T152	2
valid_sources[0x6a]	1048	1			T11	1		T33	1		T135	1
valid_sources[0x6b]	1041	1			T4	1		T134	2		T33	1
valid_sources[0x6c]	1161	1			T3	2		T33	1		T135	1
valid_sources[0x6d]	1084	1			T10	34		T134	4		T33	1
valid_sources[0x6e]	1414	1			T3	2		T135	1		T156	1
valid_sources[0x6f]	1516	1			T5	23		T33	2		T156	3
valid_sources[0x70]	1151	1			T3	1		T101	1		T135	1
valid_sources[0x71]	1001	1			T133	2		T33	1		T156	1
valid_sources[0x72]	1104	1			T3	5		T14	2		T33	1
valid_sources[0x73]	1067	1			T135	1		T34	1		T157	5
valid_sources[0x74]	1001	1			T3	1		T11	2		T33	1
valid_sources[0x75]	1353	1			T3	1		T152	1		T135	1
valid_sources[0x76]	1074	1			T4	1		T101	2		T152	1
valid_sources[0x77]	1297	1			T15	1		T156	2		T19	3
valid_sources[0x78]	1395	1			T11	1		T156	1		T19	5
valid_sources[0x79]	1258	1			T3	1		T15	1		T134	1
valid_sources[0x7a]	1096	1			T133	3		T33	1		T152	1
valid_sources[0x7b]	977	1			T11	2		T135	3		T156	1
valid_sources[0x7c]	1107	1			T135	3		T19	3		T73	2
valid_sources[0x7d]	934	1			T33	1		T135	1		T156	2
valid_sources[0x7e]	1524	1			T3	1		T135	2		T156	1
valid_sources[0x7f]	1010	1			T14	1		T133	4		T134	1
valid_sources[0x80]	1016	1			T11	1		T152	2		T156	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

67866

1

T3

14

T4

4

T5

26

values[0x0]

all_enables

biggest_size

98094

1

T19

300

T20

669

T21

835

values[0x1]

all_enables

biggest_size

98386

1

T19

349

T20

691

T21

903

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28153	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

244651

1

T1

1

T2

4

T4

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	73752	1			T4	16		T6	16		T9	1
values[0x0]	93768	1			T1	3		T2	10		T7	3
values[0x1]	105284	1			T1	3		T2	4		T7	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15092	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

257712

1

T1

1

T2

4

T4

7

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1897	1			T19	4		T160	1		T20	5
valid_sources[0x01]	1236	1			T161	2		T19	11		T20	8
valid_sources[0x02]	955	1			T103	1		T20	8		T21	11
valid_sources[0x03]	1156	1			T33	2		T157	9		T19	5
valid_sources[0x04]	1041	1			T19	7		T20	8		T21	23
valid_sources[0x05]	1134	1			T20	3		T21	16		T47	4
valid_sources[0x06]	966	1			T102	1		T19	8		T20	8
valid_sources[0x07]	1061	1			T4	1		T19	11		T20	6
valid_sources[0x08]	994	1			T17	3		T19	7		T76	1
valid_sources[0x09]	1248	1			T11	1		T102	1		T19	1
valid_sources[0x0a]	1068	1			T103	2		T19	5		T20	8
valid_sources[0x0b]	1421	1			T19	8		T104	3		T20	8
valid_sources[0x0c]	941	1			T19	12		T20	5		T21	12
valid_sources[0x0d]	1169	1			T19	4		T20	5		T21	19
valid_sources[0x0e]	1077	1			T19	9		T20	4		T21	10
valid_sources[0x0f]	1534	1			T19	23		T20	7		T21	3
valid_sources[0x10]	901	1			T19	8		T78	7		T104	1
valid_sources[0x11]	1138	1			T17	2		T35	1		T34	1
valid_sources[0x12]	947	1			T49	1		T161	1		T19	10
valid_sources[0x13]	1006	1			T6	1		T19	6		T76	3
valid_sources[0x14]	1031	1			T19	6		T20	11		T21	25
valid_sources[0x15]	928	1			T103	1		T19	7		T20	3
valid_sources[0x16]	974	1			T11	1		T103	1		T20	6
valid_sources[0x17]	1161	1			T20	11		T162	15		T21	5
valid_sources[0x18]	816	1			T19	1		T75	1		T20	10
valid_sources[0x19]	1339	1			T20	2		T21	26		T47	1
valid_sources[0x1a]	920	1			T19	8		T20	6		T21	12
valid_sources[0x1b]	950	1			T19	2		T104	1		T20	6
valid_sources[0x1c]	911	1			T11	1		T19	1		T20	3
valid_sources[0x1d]	919	1			T59	1		T19	6		T76	2
valid_sources[0x1e]	1251	1			T7	2		T19	5		T20	2
valid_sources[0x1f]	1143	1			T75	1		T20	8		T163	1
valid_sources[0x20]	910	1			T103	1		T19	4		T20	9
valid_sources[0x21]	993	1			T19	18		T20	5		T21	17
valid_sources[0x22]	984	1			T103	1		T19	19		T20	2
valid_sources[0x23]	1028	1			T19	3		T20	5		T21	25
valid_sources[0x24]	1156	1			T19	5		T20	6		T21	3
valid_sources[0x25]	1043	1			T11	1		T19	2		T20	12
valid_sources[0x26]	848	1			T88	8		T103	1		T19	2
valid_sources[0x27]	1096	1			T19	9		T76	1		T20	4
valid_sources[0x28]	1435	1			T6	1		T34	1		T19	4
valid_sources[0x29]	1020	1			T19	8		T20	12		T21	5
valid_sources[0x2a]	999	1			T6	3		T17	3		T101	3
valid_sources[0x2b]	937	1			T19	22		T20	6		T21	11
valid_sources[0x2c]	1126	1			T19	15		T20	10		T21	1
valid_sources[0x2d]	1031	1			T19	1		T20	4		T21	1
valid_sources[0x2e]	1144	1			T19	2		T20	4		T21	7
valid_sources[0x2f]	1228	1			T20	8		T21	7		T47	3
valid_sources[0x30]	940	1			T34	3		T19	16		T20	3
valid_sources[0x31]	1044	1			T19	6		T104	1		T20	6
valid_sources[0x32]	1112	1			T19	6		T20	9		T21	3
valid_sources[0x33]	930	1			T14	1		T19	2		T72	3
valid_sources[0x34]	843	1			T20	3		T21	1		T47	6
valid_sources[0x35]	1030	1			T59	4		T56	1		T103	1
valid_sources[0x36]	927	1			T34	1		T161	1		T164	1
valid_sources[0x37]	1099	1			T1	1		T49	1		T84	16
valid_sources[0x38]	1115	1			T20	7		T21	14		T47	2
valid_sources[0x39]	999	1			T33	2		T20	16		T21	22
valid_sources[0x3a]	900	1			T19	12		T76	1		T20	5
valid_sources[0x3b]	974	1			T19	3		T104	3		T20	10
valid_sources[0x3c]	1214	1			T34	2		T76	1		T20	4
valid_sources[0x3d]	961	1			T103	1		T19	4		T75	1
valid_sources[0x3e]	1091	1			T19	2		T104	1		T20	8
valid_sources[0x3f]	1080	1			T55	1		T19	13		T165	1
valid_sources[0x40]	988	1			T11	1		T34	2		T19	8
valid_sources[0x41]	1058	1			T102	2		T19	5		T79	32
valid_sources[0x42]	979	1			T11	1		T19	2		T20	5
valid_sources[0x43]	1011	1			T33	4		T103	1		T19	10
valid_sources[0x44]	995	1			T19	16		T20	10		T21	23
valid_sources[0x45]	926	1			T101	3		T20	7		T21	1
valid_sources[0x46]	1424	1			T19	20		T20	2		T21	8
valid_sources[0x47]	1118	1			T33	9		T19	12		T76	1
valid_sources[0x48]	1115	1			T19	1		T20	4		T21	6
valid_sources[0x49]	1070	1			T90	3		T103	1		T19	2
valid_sources[0x4a]	858	1			T161	1		T103	1		T19	5
valid_sources[0x4b]	915	1			T19	6		T76	1		T20	2
valid_sources[0x4c]	1112	1			T14	1		T20	8		T21	1
valid_sources[0x4d]	1307	1			T102	1		T19	2		T165	1
valid_sources[0x4e]	874	1			T11	1		T19	1		T104	1
valid_sources[0x4f]	1020	1			T19	12		T20	3		T163	1
valid_sources[0x50]	1376	1			T19	11		T166	2		T20	2
valid_sources[0x51]	1203	1			T103	1		T165	1		T20	9
valid_sources[0x52]	1286	1			T19	1		T20	5		T21	20
valid_sources[0x53]	950	1			T34	1		T103	1		T19	1
valid_sources[0x54]	1362	1			T103	1		T19	3		T160	1
valid_sources[0x55]	929	1			T20	5		T21	48		T47	2
valid_sources[0x56]	879	1			T49	1		T19	8		T20	8
valid_sources[0x57]	792	1			T4	3		T19	15		T20	6
valid_sources[0x58]	843	1			T19	12		T104	2		T20	7
valid_sources[0x59]	849	1			T9	1		T20	6		T21	2
valid_sources[0x5a]	928	1			T2	4		T6	2		T19	12
valid_sources[0x5b]	1052	1			T58	1		T19	3		T20	9
valid_sources[0x5c]	1060	1			T19	6		T20	10		T21	5
valid_sources[0x5d]	1072	1			T14	2		T103	1		T76	2
valid_sources[0x5e]	1166	1			T34	1		T19	2		T20	4
valid_sources[0x5f]	1021	1			T19	6		T104	2		T20	12
valid_sources[0x60]	1130	1			T103	1		T19	16		T20	10
valid_sources[0x61]	895	1			T59	1		T33	6		T19	1
valid_sources[0x62]	910	1			T4	3		T20	6		T163	1
valid_sources[0x63]	1047	1			T1	2		T34	6		T19	4
valid_sources[0x64]	1225	1			T15	16		T34	2		T19	8
valid_sources[0x65]	1122	1			T19	5		T20	5		T21	5
valid_sources[0x66]	861	1			T19	7		T20	4		T21	10
valid_sources[0x67]	1260	1			T101	3		T20	7		T21	22
valid_sources[0x68]	1039	1			T19	2		T20	11		T21	14
valid_sources[0x69]	923	1			T19	6		T20	10		T21	4
valid_sources[0x6a]	1259	1			T19	4		T20	7		T21	8
valid_sources[0x6b]	1413	1			T34	2		T19	7		T104	1
valid_sources[0x6c]	987	1			T103	1		T19	6		T104	1
valid_sources[0x6d]	786	1			T103	1		T19	20		T75	6
valid_sources[0x6e]	1036	1			T14	2		T19	11		T76	2
valid_sources[0x6f]	1047	1			T76	1		T20	5		T21	5
valid_sources[0x70]	1165	1			T19	1		T20	11		T21	3
valid_sources[0x71]	1049	1			T2	1		T19	3		T76	1
valid_sources[0x72]	833	1			T19	17		T20	7		T21	3
valid_sources[0x73]	1132	1			T19	1		T20	6		T21	11
valid_sources[0x74]	1333	1			T11	1		T34	2		T19	5
valid_sources[0x75]	1097	1			T2	1		T31	1		T157	3
valid_sources[0x76]	1021	1			T4	2		T19	8		T76	1
valid_sources[0x77]	951	1			T19	1		T104	1		T20	4
valid_sources[0x78]	962	1			T19	4		T20	3		T21	5
valid_sources[0x79]	1062	1			T20	1		T21	8		T47	4
valid_sources[0x7a]	973	1			T19	11		T20	6		T21	7
valid_sources[0x7b]	1004	1			T4	1		T19	4		T20	10
valid_sources[0x7c]	959	1			T19	11		T20	6		T21	8
valid_sources[0x7d]	957	1			T90	5		T20	9		T163	1
valid_sources[0x7e]	1048	1			T19	17		T75	2		T20	9
valid_sources[0x7f]	905	1			T76	3		T20	5		T21	27
valid_sources[0x80]	1022	1			T102	2		T34	1		T19	5

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

63076

1

T4

6

T6

9

T13

9

values[0x0]

all_enables

biggest_size

91530

1

T1

1

T2

4

T7

2

values[0x1]

all_enables

biggest_size

90045

1

T17

2

T18

2

T88

1