Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
79.45 93.96 82.01 87.61 73.08 82.50 98.42 38.60


Total tests in report: 310
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
49.87 49.87 80.77 80.77 47.25 47.25 20.23 20.23 44.87 44.87 62.33 62.33 91.55 91.55 2.06 2.06 /workspace/coverage/default/1.rv_dm_ndmreset_req.2288791654
58.47 8.61 83.43 2.67 57.14 9.89 53.78 33.55 52.56 7.69 66.67 4.33 91.97 0.42 3.74 1.68 /workspace/coverage/default/43.rv_dm_stress_all.1498141746
65.37 6.90 86.96 3.52 62.50 5.36 74.46 20.68 62.82 10.26 73.00 6.33 93.45 1.48 4.39 0.65 /workspace/coverage/default/5.rv_dm_bad_sba_tl_access.918733921
71.05 5.68 87.21 0.25 67.03 4.53 76.55 2.09 70.51 7.69 74.17 1.17 94.51 1.06 27.38 22.99 /workspace/coverage/cover_reg_top/28.rv_dm_tap_fsm_rand_reset.1920573917
74.17 3.12 91.24 4.03 74.45 7.42 81.90 5.35 70.51 0.00 76.50 2.33 95.99 1.48 28.60 1.21 /workspace/coverage/default/7.rv_dm_alert_test.1161296997
76.00 1.83 91.39 0.15 77.20 2.75 84.07 2.17 70.51 0.00 77.67 1.17 95.99 0.00 35.14 6.54 /workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.4032872783
77.39 1.40 93.00 1.61 79.81 2.61 84.07 0.00 73.08 2.56 80.00 2.33 95.99 0.00 35.79 0.65 /workspace/coverage/default/49.rv_dm_stress_all.560116627
77.74 0.34 93.00 0.00 80.36 0.55 85.64 1.57 73.08 0.00 80.00 0.00 96.09 0.11 35.98 0.19 /workspace/coverage/default/2.rv_dm_sec_cm.2346980390
78.02 0.29 93.00 0.00 80.36 0.00 85.64 0.00 73.08 0.00 80.00 0.00 97.25 1.16 36.82 0.84 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.2442937581
78.23 0.21 93.00 0.00 80.36 0.00 86.36 0.72 73.08 0.00 80.00 0.00 97.25 0.00 37.57 0.75 /workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.1521589827
78.42 0.19 93.25 0.25 80.77 0.41 86.36 0.00 73.08 0.00 80.67 0.67 97.25 0.00 37.57 0.00 /workspace/coverage/default/1.rv_dm_cmderr_exception.2734762217
78.54 0.12 93.25 0.00 80.91 0.14 86.85 0.48 73.08 0.00 80.67 0.00 97.25 0.00 37.76 0.19 /workspace/coverage/cover_reg_top/15.rv_dm_tap_fsm_rand_reset.2384334106
78.65 0.11 93.55 0.30 80.91 0.00 86.85 0.00 73.08 0.00 81.17 0.50 97.25 0.00 37.76 0.00 /workspace/coverage/default/0.rv_dm_abstractcmd_status.2002419170
78.76 0.11 93.66 0.10 81.04 0.14 86.85 0.00 73.08 0.00 81.67 0.50 97.25 0.00 37.76 0.00 /workspace/coverage/default/0.rv_dm_rom_read_access.1044397679
78.85 0.09 93.66 0.00 81.18 0.14 87.09 0.24 73.08 0.00 81.67 0.00 97.25 0.00 38.04 0.28 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.252829364
78.94 0.09 93.66 0.00 81.18 0.00 87.21 0.12 73.08 0.00 81.67 0.00 97.78 0.53 38.04 0.00 /workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.4122380800
79.02 0.08 93.71 0.05 81.46 0.27 87.25 0.04 73.08 0.00 81.83 0.17 97.78 0.00 38.04 0.00 /workspace/coverage/default/1.rv_dm_progbuf_busy.1072369727
79.08 0.06 93.81 0.10 81.59 0.14 87.29 0.04 73.08 0.00 82.00 0.17 97.78 0.00 38.04 0.00 /workspace/coverage/default/18.rv_dm_alert_test.1748426827
79.15 0.06 93.91 0.10 81.59 0.00 87.29 0.00 73.08 0.00 82.33 0.33 97.78 0.00 38.04 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.91373058
79.20 0.06 93.91 0.00 81.59 0.00 87.29 0.00 73.08 0.00 82.33 0.00 98.10 0.32 38.13 0.09 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.2836053796
79.25 0.05 93.96 0.05 81.73 0.14 87.29 0.00 73.08 0.00 82.50 0.17 98.10 0.00 38.13 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3541335881
79.29 0.04 93.96 0.00 81.73 0.00 87.37 0.08 73.08 0.00 82.50 0.00 98.10 0.00 38.32 0.19 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.2020249876
79.33 0.03 93.96 0.00 81.73 0.00 87.61 0.24 73.08 0.00 82.50 0.00 98.10 0.00 38.32 0.00 /workspace/coverage/default/8.rv_dm_sba_tl_access.3957065640
79.36 0.03 93.96 0.00 81.73 0.00 87.61 0.00 73.08 0.00 82.50 0.00 98.31 0.21 38.32 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.3061481518
79.38 0.03 93.96 0.00 81.73 0.00 87.61 0.00 73.08 0.00 82.50 0.00 98.31 0.00 38.50 0.19 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.3116560067
79.40 0.02 93.96 0.00 81.87 0.14 87.61 0.00 73.08 0.00 82.50 0.00 98.31 0.00 38.50 0.00 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.3924111031
79.42 0.02 93.96 0.00 82.01 0.14 87.61 0.00 73.08 0.00 82.50 0.00 98.31 0.00 38.50 0.00 /workspace/coverage/default/45.rv_dm_stress_all.3556660428
79.44 0.02 93.96 0.00 82.01 0.00 87.61 0.00 73.08 0.00 82.50 0.00 98.42 0.11 38.50 0.00 /workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.4014156198
79.45 0.01 93.96 0.00 82.01 0.00 87.61 0.00 73.08 0.00 82.50 0.00 98.42 0.00 38.60 0.09 /workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.3961695140

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2139846400
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.4143737293
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.4251818314
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.1605023483
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.3980798337
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.4185679439
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.740971209
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2583732083
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.1491599402
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.3780135769
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.3916800068
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.152225085
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.2678841268
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.1532434174
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2237645079
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.2732790277
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.2054948639
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.820770539
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.1909051030
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.4277747555
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.1848181432
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2771742035
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.3629561635
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.4192961052
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.115287986
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.3531694987
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.3878833826
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.3346803601
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.923539725
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2421632044
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.3425031499
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.37198232
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.2558867001
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.2492953161
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.4187603270
/workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.1424453288
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.861626045
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.1521602669
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.3991712970
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.479577139
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3915936675
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.3980894363
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.671427772
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.2765797686
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2637476330
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.3546939076
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.1584001027
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.392965945
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.1738795548
/workspace/coverage/cover_reg_top/12.rv_dm_tap_fsm_rand_reset.549814064
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.1714352757
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.3223521016
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.4233219104
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.3902838469
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.3531522596
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.2548523782
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.890974405
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.3898275422
/workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.1767472446
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1505016828
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.949637766
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.1109732059
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.3770100860
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.338503489
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.2223233907
/workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3746330513
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.561572419
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.197472126
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.209332870
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.651392646
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.1938398288
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.4124870354
/workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.1463867973
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.1945317759
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.2936206812
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2874551105
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.209911091
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.3415222211
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.1421028395
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.1557386095
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.4271675756
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.967768851
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.3307214231
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.245420539
/workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3078547057
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.2924209187
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.3665367166
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.1656846592
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.1750709232
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.2791167916
/workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.1063197909
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.3710136315
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.2160208672
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.570126286
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.2029123925
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.2738603291
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.2369887864
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.514539727
/workspace/coverage/cover_reg_top/19.rv_dm_tap_fsm_rand_reset.787587515
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.3619350498
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1642720340
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.1339640610
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3692269237
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.62414307
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.2415021949
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.3563527354
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.534292530
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.4034464534
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.1612527181
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.3648875598
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.2022303938
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.3896389118
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.2833423250
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2540604246
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.3673589759
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.2081030912
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2329675828
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.1369384517
/workspace/coverage/cover_reg_top/23.rv_dm_tap_fsm_rand_reset.2840181840
/workspace/coverage/cover_reg_top/24.rv_dm_tap_fsm_rand_reset.2909901033
/workspace/coverage/cover_reg_top/29.rv_dm_tap_fsm_rand_reset.2563260591
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.559950690
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.2404337480
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2125961131
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.4149884943
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.3695346437
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.2404687313
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.1727639310
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.2120589692
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.3826724706
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.3263372266
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1041255582
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.4004832733
/workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.3920573482
/workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.1405016057
/workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.3152535440
/workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.1683327064
/workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.1281923564
/workspace/coverage/cover_reg_top/31.rv_dm_tap_fsm_rand_reset.1355618654
/workspace/coverage/cover_reg_top/37.rv_dm_tap_fsm_rand_reset.3718879679
/workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.1520096941
/workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.2224028679
/workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2000713359
/workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.1479653121
/workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.1425524795
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.857288800
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.3014161665
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2300035433
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.936579812
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.184897418
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1280223337
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.2335903556
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.964324075
/workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.3093876748
/workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3422216904
/workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.3290040107
/workspace/coverage/cover_reg_top/4.rv_dm_tap_fsm_rand_reset.2447354023
/workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.1218708398
/workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.1041680035
/workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.3712328340
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.3356409475
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.561069534
/workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.1550340814
/workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.4193957786
/workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.119203814
/workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.39432045
/workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.4148232211
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.3237575170
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.4243801780
/workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.2360894740
/workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.1457385002
/workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.3507895493
/workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.2859181414
/workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.605032694
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.2656960311
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.984210146
/workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.707760685
/workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.2789412913
/workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.4053335433
/workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.2638189445
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.3567697516
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.3802616352
/workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.2893546776
/workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.1197878308
/workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.1836975308
/workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.241056709
/workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.579808244
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.2059933463
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.2873945301
/workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.762082472
/workspace/coverage/cover_reg_top/9.rv_dm_tap_fsm_rand_reset.3365128276
/workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.1693809213
/workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.1361355503
/workspace/coverage/default/0.rv_dm_alert_test.2625048572
/workspace/coverage/default/0.rv_dm_cmderr_busy.171385468
/workspace/coverage/default/0.rv_dm_cmderr_exception.1401344120
/workspace/coverage/default/0.rv_dm_cmderr_not_supported.3753883451
/workspace/coverage/default/0.rv_dm_dataaddr_rw_access.166414521
/workspace/coverage/default/0.rv_dm_hart_unavail.785401239
/workspace/coverage/default/0.rv_dm_jtag_dmi_debug_disabled.4006995256
/workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.911067897
/workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.2997906532
/workspace/coverage/default/0.rv_dm_mem_tl_access_halted.647455530
/workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.1919128853
/workspace/coverage/default/0.rv_dm_ndmreset_req.1383882182
/workspace/coverage/default/0.rv_dm_progbuf_busy.364852253
/workspace/coverage/default/0.rv_dm_sec_cm.3716840188
/workspace/coverage/default/0.rv_dm_tap_fsm.73973783
/workspace/coverage/default/1.rv_dm_abstractcmd_status.1301056228
/workspace/coverage/default/1.rv_dm_alert_test.3270571370
/workspace/coverage/default/1.rv_dm_cmderr_busy.1821556795
/workspace/coverage/default/1.rv_dm_cmderr_halt_resume.24370178
/workspace/coverage/default/1.rv_dm_cmderr_not_supported.60241505
/workspace/coverage/default/1.rv_dm_dataaddr_rw_access.1508467128
/workspace/coverage/default/1.rv_dm_hart_unavail.2736709242
/workspace/coverage/default/1.rv_dm_jtag_dmi_dm_inactive.3352944420
/workspace/coverage/default/1.rv_dm_jtag_dtm_hard_reset.2268508273
/workspace/coverage/default/1.rv_dm_mem_tl_access_halted.497334639
/workspace/coverage/default/1.rv_dm_mem_tl_access_resuming.3787965903
/workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.2536628068
/workspace/coverage/default/1.rv_dm_rom_read_access.75987203
/workspace/coverage/default/1.rv_dm_sec_cm.3982714340
/workspace/coverage/default/1.rv_dm_smoke.4269065037
/workspace/coverage/default/10.rv_dm_alert_test.3886439010
/workspace/coverage/default/10.rv_dm_bad_sba_tl_access.2253174768
/workspace/coverage/default/11.rv_dm_alert_test.565063023
/workspace/coverage/default/12.rv_dm_alert_test.887543295
/workspace/coverage/default/13.rv_dm_alert_test.3127086024
/workspace/coverage/default/14.rv_dm_alert_test.2712471459
/workspace/coverage/default/15.rv_dm_alert_test.3239882712
/workspace/coverage/default/15.rv_dm_sba_tl_access.3895586060
/workspace/coverage/default/15.rv_dm_stress_all.4010901155
/workspace/coverage/default/16.rv_dm_alert_test.2461579373
/workspace/coverage/default/17.rv_dm_alert_test.583180105
/workspace/coverage/default/17.rv_dm_sba_tl_access.106005748
/workspace/coverage/default/19.rv_dm_alert_test.236401496
/workspace/coverage/default/2.rv_dm_alert_test.2970865626
/workspace/coverage/default/2.rv_dm_hart_unavail.3313821507
/workspace/coverage/default/20.rv_dm_alert_test.3086273222
/workspace/coverage/default/21.rv_dm_alert_test.2228335682
/workspace/coverage/default/22.rv_dm_alert_test.728675512
/workspace/coverage/default/23.rv_dm_alert_test.2533426409
/workspace/coverage/default/24.rv_dm_alert_test.2222954277
/workspace/coverage/default/25.rv_dm_alert_test.590071188
/workspace/coverage/default/25.rv_dm_stress_all.724297145
/workspace/coverage/default/26.rv_dm_alert_test.1313958545
/workspace/coverage/default/27.rv_dm_alert_test.2385233791
/workspace/coverage/default/28.rv_dm_alert_test.4289294505
/workspace/coverage/default/29.rv_dm_alert_test.2467498614
/workspace/coverage/default/3.rv_dm_alert_test.2801362466
/workspace/coverage/default/3.rv_dm_hart_unavail.2811090207
/workspace/coverage/default/3.rv_dm_sec_cm.970352137
/workspace/coverage/default/30.rv_dm_alert_test.2051407002
/workspace/coverage/default/31.rv_dm_alert_test.4014710664
/workspace/coverage/default/32.rv_dm_alert_test.1175193294
/workspace/coverage/default/33.rv_dm_alert_test.2795509981
/workspace/coverage/default/34.rv_dm_alert_test.1202254337
/workspace/coverage/default/35.rv_dm_alert_test.1279697445
/workspace/coverage/default/36.rv_dm_alert_test.3615134770
/workspace/coverage/default/37.rv_dm_alert_test.2469551521
/workspace/coverage/default/38.rv_dm_alert_test.1626168892
/workspace/coverage/default/39.rv_dm_alert_test.2188218285
/workspace/coverage/default/39.rv_dm_stress_all.796547869
/workspace/coverage/default/4.rv_dm_alert_test.1430757133
/workspace/coverage/default/4.rv_dm_hart_unavail.2932339247
/workspace/coverage/default/4.rv_dm_sec_cm.1258056617
/workspace/coverage/default/40.rv_dm_alert_test.590953399
/workspace/coverage/default/41.rv_dm_alert_test.2482999757
/workspace/coverage/default/42.rv_dm_alert_test.1232008137
/workspace/coverage/default/43.rv_dm_alert_test.990836887
/workspace/coverage/default/44.rv_dm_alert_test.765148175
/workspace/coverage/default/45.rv_dm_alert_test.1274463272
/workspace/coverage/default/46.rv_dm_alert_test.2777480803
/workspace/coverage/default/47.rv_dm_alert_test.2421804311
/workspace/coverage/default/48.rv_dm_alert_test.3049580479
/workspace/coverage/default/49.rv_dm_alert_test.285886060
/workspace/coverage/default/5.rv_dm_alert_test.3746622073
/workspace/coverage/default/6.rv_dm_alert_test.1616004289
/workspace/coverage/default/7.rv_dm_sba_tl_access.1550423351
/workspace/coverage/default/8.rv_dm_alert_test.288604679
/workspace/coverage/default/9.rv_dm_alert_test.4170899174



Total test records in report: 310
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/1.rv_dm_ndmreset_req.2288791654 May 02 01:57:51 PM PDT 24 May 02 01:57:54 PM PDT 24 722439721 ps
T2 /workspace/coverage/default/20.rv_dm_alert_test.3086273222 May 02 01:58:48 PM PDT 24 May 02 01:58:50 PM PDT 24 29978028 ps
T3 /workspace/coverage/default/21.rv_dm_alert_test.2228335682 May 02 01:58:55 PM PDT 24 May 02 01:58:57 PM PDT 24 24719444 ps
T7 /workspace/coverage/default/0.rv_dm_cmderr_not_supported.3753883451 May 02 01:57:22 PM PDT 24 May 02 01:57:27 PM PDT 24 893920164 ps
T4 /workspace/coverage/default/13.rv_dm_alert_test.3127086024 May 02 01:58:30 PM PDT 24 May 02 01:58:32 PM PDT 24 66174515 ps
T8 /workspace/coverage/default/0.rv_dm_mem_tl_access_resuming.1919128853 May 02 01:57:22 PM PDT 24 May 02 01:57:24 PM PDT 24 721225786 ps
T5 /workspace/coverage/default/17.rv_dm_alert_test.583180105 May 02 01:58:48 PM PDT 24 May 02 01:58:50 PM PDT 24 31223363 ps
T6 /workspace/coverage/default/3.rv_dm_alert_test.2801362466 May 02 01:57:58 PM PDT 24 May 02 01:58:00 PM PDT 24 38051335 ps
T45 /workspace/coverage/default/36.rv_dm_alert_test.3615134770 May 02 01:59:03 PM PDT 24 May 02 01:59:06 PM PDT 24 40456069 ps
T42 /workspace/coverage/default/7.rv_dm_alert_test.1161296997 May 02 01:58:16 PM PDT 24 May 02 01:58:18 PM PDT 24 21048977 ps
T30 /workspace/coverage/default/0.rv_dm_hart_unavail.785401239 May 02 01:57:24 PM PDT 24 May 02 01:57:26 PM PDT 24 66523241 ps
T55 /workspace/coverage/default/30.rv_dm_alert_test.2051407002 May 02 01:58:52 PM PDT 24 May 02 01:58:53 PM PDT 24 41788456 ps
T26 /workspace/coverage/default/1.rv_dm_smoke.4269065037 May 02 01:57:37 PM PDT 24 May 02 01:57:39 PM PDT 24 268371310 ps
T76 /workspace/coverage/default/10.rv_dm_alert_test.3886439010 May 02 01:58:26 PM PDT 24 May 02 01:58:27 PM PDT 24 47702275 ps
T9 /workspace/coverage/default/43.rv_dm_stress_all.1498141746 May 02 01:59:17 PM PDT 24 May 02 01:59:24 PM PDT 24 3436937963 ps
T56 /workspace/coverage/default/14.rv_dm_alert_test.2712471459 May 02 01:58:41 PM PDT 24 May 02 01:58:43 PM PDT 24 27619054 ps
T44 /workspace/coverage/default/15.rv_dm_alert_test.3239882712 May 02 01:58:39 PM PDT 24 May 02 01:58:41 PM PDT 24 19281559 ps
T12 /workspace/coverage/default/1.rv_dm_cmderr_not_supported.60241505 May 02 01:57:37 PM PDT 24 May 02 01:57:41 PM PDT 24 928628679 ps
T19 /workspace/coverage/default/0.rv_dm_ndmreset_req.1383882182 May 02 01:57:24 PM PDT 24 May 02 01:57:27 PM PDT 24 1858028347 ps
T118 /workspace/coverage/default/3.rv_dm_hart_unavail.2811090207 May 02 01:57:58 PM PDT 24 May 02 01:58:00 PM PDT 24 70314507 ps
T36 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.2997906532 May 02 01:57:30 PM PDT 24 May 02 01:57:33 PM PDT 24 274394181 ps
T119 /workspace/coverage/default/31.rv_dm_alert_test.4014710664 May 02 01:59:06 PM PDT 24 May 02 01:59:09 PM PDT 24 64229865 ps
T120 /workspace/coverage/default/23.rv_dm_alert_test.2533426409 May 02 01:58:50 PM PDT 24 May 02 01:58:52 PM PDT 24 61583357 ps
T54 /workspace/coverage/default/32.rv_dm_alert_test.1175193294 May 02 01:59:05 PM PDT 24 May 02 01:59:08 PM PDT 24 154409915 ps
T59 /workspace/coverage/default/42.rv_dm_alert_test.1232008137 May 02 01:59:14 PM PDT 24 May 02 01:59:16 PM PDT 24 20913447 ps
T13 /workspace/coverage/default/1.rv_dm_abstractcmd_status.1301056228 May 02 01:57:54 PM PDT 24 May 02 01:57:56 PM PDT 24 62986687 ps
T145 /workspace/coverage/default/9.rv_dm_alert_test.4170899174 May 02 01:58:22 PM PDT 24 May 02 01:58:24 PM PDT 24 86727377 ps
T157 /workspace/coverage/default/35.rv_dm_alert_test.1279697445 May 02 01:59:04 PM PDT 24 May 02 01:59:06 PM PDT 24 31406516 ps
T43 /workspace/coverage/default/18.rv_dm_alert_test.1748426827 May 02 01:58:46 PM PDT 24 May 02 01:58:48 PM PDT 24 33614290 ps
T123 /workspace/coverage/default/47.rv_dm_alert_test.2421804311 May 02 01:59:16 PM PDT 24 May 02 01:59:18 PM PDT 24 26987008 ps
T153 /workspace/coverage/default/1.rv_dm_alert_test.3270571370 May 02 01:57:51 PM PDT 24 May 02 01:57:54 PM PDT 24 59746613 ps
T113 /workspace/coverage/default/26.rv_dm_alert_test.1313958545 May 02 01:58:54 PM PDT 24 May 02 01:58:56 PM PDT 24 32146028 ps
T20 /workspace/coverage/default/0.rv_dm_dataaddr_rw_access.166414521 May 02 01:57:24 PM PDT 24 May 02 01:57:26 PM PDT 24 86800526 ps
T150 /workspace/coverage/default/48.rv_dm_alert_test.3049580479 May 02 01:59:18 PM PDT 24 May 02 01:59:20 PM PDT 24 19246859 ps
T37 /workspace/coverage/default/0.rv_dm_jtag_dmi_debug_disabled.4006995256 May 02 01:57:32 PM PDT 24 May 02 01:57:35 PM PDT 24 226474616 ps
T14 /workspace/coverage/default/1.rv_dm_progbuf_busy.1072369727 May 02 01:57:53 PM PDT 24 May 02 01:57:57 PM PDT 24 579353395 ps
T58 /workspace/coverage/default/28.rv_dm_alert_test.4289294505 May 02 01:58:54 PM PDT 24 May 02 01:58:56 PM PDT 24 31889004 ps
T38 /workspace/coverage/default/4.rv_dm_sec_cm.1258056617 May 02 01:58:07 PM PDT 24 May 02 01:58:10 PM PDT 24 1199692768 ps
T39 /workspace/coverage/default/2.rv_dm_sec_cm.2346980390 May 02 01:58:01 PM PDT 24 May 02 01:58:04 PM PDT 24 483932354 ps
T62 /workspace/coverage/default/41.rv_dm_alert_test.2482999757 May 02 01:59:03 PM PDT 24 May 02 01:59:06 PM PDT 24 53744056 ps
T57 /workspace/coverage/default/34.rv_dm_alert_test.1202254337 May 02 01:59:04 PM PDT 24 May 02 01:59:07 PM PDT 24 26195058 ps
T32 /workspace/coverage/default/15.rv_dm_sba_tl_access.3895586060 May 02 01:58:42 PM PDT 24 May 02 01:58:50 PM PDT 24 4984428492 ps
T33 /workspace/coverage/default/5.rv_dm_bad_sba_tl_access.918733921 May 02 01:58:10 PM PDT 24 May 02 01:58:16 PM PDT 24 1897513977 ps
T63 /workspace/coverage/default/44.rv_dm_alert_test.765148175 May 02 01:59:17 PM PDT 24 May 02 01:59:19 PM PDT 24 121837482 ps
T15 /workspace/coverage/default/1.rv_dm_cmderr_busy.1821556795 May 02 01:57:36 PM PDT 24 May 02 01:57:49 PM PDT 24 3357311303 ps
T64 /workspace/coverage/default/4.rv_dm_hart_unavail.2932339247 May 02 01:58:07 PM PDT 24 May 02 01:58:10 PM PDT 24 142142250 ps
T65 /workspace/coverage/default/40.rv_dm_alert_test.590953399 May 02 01:59:06 PM PDT 24 May 02 01:59:09 PM PDT 24 16481202 ps
T16 /workspace/coverage/default/45.rv_dm_stress_all.3556660428 May 02 01:59:15 PM PDT 24 May 02 01:59:29 PM PDT 24 3553576315 ps
T22 /workspace/coverage/default/1.rv_dm_cmderr_exception.2734762217 May 02 01:57:45 PM PDT 24 May 02 01:57:48 PM PDT 24 3695687489 ps
T77 /workspace/coverage/default/25.rv_dm_alert_test.590071188 May 02 01:58:53 PM PDT 24 May 02 01:58:55 PM PDT 24 32963576 ps
T34 /workspace/coverage/default/17.rv_dm_sba_tl_access.106005748 May 02 01:58:39 PM PDT 24 May 02 01:58:45 PM PDT 24 2876116000 ps
T90 /workspace/coverage/default/7.rv_dm_sba_tl_access.1550423351 May 02 01:58:18 PM PDT 24 May 02 01:58:21 PM PDT 24 747177796 ps
T158 /workspace/coverage/default/29.rv_dm_alert_test.2467498614 May 02 01:58:53 PM PDT 24 May 02 01:58:55 PM PDT 24 44430440 ps
T159 /workspace/coverage/default/22.rv_dm_alert_test.728675512 May 02 01:58:46 PM PDT 24 May 02 01:58:48 PM PDT 24 31969719 ps
T17 /workspace/coverage/default/1.rv_dm_rom_read_access.75987203 May 02 01:57:51 PM PDT 24 May 02 01:57:53 PM PDT 24 34230202 ps
T160 /workspace/coverage/default/1.rv_dm_jtag_dmi_dm_inactive.3352944420 May 02 01:57:51 PM PDT 24 May 02 01:57:54 PM PDT 24 239274221 ps
T154 /workspace/coverage/default/2.rv_dm_alert_test.2970865626 May 02 01:58:00 PM PDT 24 May 02 01:58:02 PM PDT 24 17311739 ps
T149 /workspace/coverage/default/16.rv_dm_alert_test.2461579373 May 02 01:58:46 PM PDT 24 May 02 01:58:48 PM PDT 24 44593374 ps
T146 /workspace/coverage/default/39.rv_dm_alert_test.2188218285 May 02 01:59:05 PM PDT 24 May 02 01:59:08 PM PDT 24 24416895 ps
T23 /workspace/coverage/default/0.rv_dm_cmderr_exception.1401344120 May 02 01:57:24 PM PDT 24 May 02 01:57:26 PM PDT 24 95785670 ps
T18 /workspace/coverage/default/0.rv_dm_rom_read_access.1044397679 May 02 01:57:31 PM PDT 24 May 02 01:57:33 PM PDT 24 32389715 ps
T161 /workspace/coverage/default/27.rv_dm_alert_test.2385233791 May 02 01:58:53 PM PDT 24 May 02 01:58:56 PM PDT 24 54009070 ps
T162 /workspace/coverage/default/6.rv_dm_alert_test.1616004289 May 02 01:58:19 PM PDT 24 May 02 01:58:20 PM PDT 24 19898636 ps
T66 /workspace/coverage/default/0.rv_dm_tap_fsm.73973783 May 02 01:57:13 PM PDT 24 May 02 01:57:18 PM PDT 24 3039044618 ps
T163 /workspace/coverage/default/0.rv_dm_mem_tl_access_halted.647455530 May 02 01:57:22 PM PDT 24 May 02 01:57:25 PM PDT 24 56649268 ps
T164 /workspace/coverage/default/5.rv_dm_alert_test.3746622073 May 02 01:58:07 PM PDT 24 May 02 01:58:10 PM PDT 24 33978721 ps
T40 /workspace/coverage/default/3.rv_dm_sec_cm.970352137 May 02 01:57:59 PM PDT 24 May 02 01:58:01 PM PDT 24 366304936 ps
T31 /workspace/coverage/default/0.rv_dm_cmderr_busy.171385468 May 02 01:57:22 PM PDT 24 May 02 01:57:31 PM PDT 24 4880586829 ps
T152 /workspace/coverage/default/46.rv_dm_alert_test.2777480803 May 02 01:59:16 PM PDT 24 May 02 01:59:18 PM PDT 24 33098232 ps
T156 /workspace/coverage/default/19.rv_dm_alert_test.236401496 May 02 01:58:47 PM PDT 24 May 02 01:58:50 PM PDT 24 23052816 ps
T41 /workspace/coverage/default/39.rv_dm_stress_all.796547869 May 02 01:59:06 PM PDT 24 May 02 01:59:14 PM PDT 24 2842632426 ps
T165 /workspace/coverage/default/1.rv_dm_jtag_dtm_hard_reset.2268508273 May 02 01:57:51 PM PDT 24 May 02 01:57:55 PM PDT 24 544216701 ps
T144 /workspace/coverage/default/24.rv_dm_alert_test.2222954277 May 02 01:58:47 PM PDT 24 May 02 01:58:50 PM PDT 24 78745078 ps
T141 /workspace/coverage/default/45.rv_dm_alert_test.1274463272 May 02 01:59:16 PM PDT 24 May 02 01:59:17 PM PDT 24 23275672 ps
T27 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.91373058 May 02 01:57:28 PM PDT 24 May 02 01:57:30 PM PDT 24 149992974 ps
T29 /workspace/coverage/default/0.rv_dm_abstractcmd_status.2002419170 May 02 01:57:31 PM PDT 24 May 02 01:57:33 PM PDT 24 166976536 ps
T21 /workspace/coverage/default/0.rv_dm_progbuf_busy.364852253 May 02 01:57:30 PM PDT 24 May 02 01:57:32 PM PDT 24 53014812 ps
T142 /workspace/coverage/default/0.rv_dm_alert_test.2625048572 May 02 01:57:39 PM PDT 24 May 02 01:57:40 PM PDT 24 54858052 ps
T35 /workspace/coverage/default/10.rv_dm_bad_sba_tl_access.2253174768 May 02 01:58:28 PM PDT 24 May 02 01:58:30 PM PDT 24 795910906 ps
T166 /workspace/coverage/default/1.rv_dm_hart_unavail.2736709242 May 02 01:57:45 PM PDT 24 May 02 01:57:46 PM PDT 24 42974888 ps
T167 /workspace/coverage/default/4.rv_dm_alert_test.1430757133 May 02 01:58:08 PM PDT 24 May 02 01:58:10 PM PDT 24 17908643 ps
T60 /workspace/coverage/default/0.rv_dm_sec_cm.3716840188 May 02 01:57:37 PM PDT 24 May 02 01:57:38 PM PDT 24 96319848 ps
T61 /workspace/coverage/default/1.rv_dm_sec_cm.3982714340 May 02 01:57:53 PM PDT 24 May 02 01:57:56 PM PDT 24 218231191 ps
T168 /workspace/coverage/default/43.rv_dm_alert_test.990836887 May 02 01:59:15 PM PDT 24 May 02 01:59:17 PM PDT 24 51132623 ps
T139 /workspace/coverage/default/33.rv_dm_alert_test.2795509981 May 02 01:59:02 PM PDT 24 May 02 01:59:04 PM PDT 24 39405674 ps
T25 /workspace/coverage/default/25.rv_dm_stress_all.724297145 May 02 01:58:53 PM PDT 24 May 02 01:59:06 PM PDT 24 8371387526 ps
T155 /workspace/coverage/default/37.rv_dm_alert_test.2469551521 May 02 01:59:06 PM PDT 24 May 02 01:59:09 PM PDT 24 32655784 ps
T28 /workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.2536628068 May 02 01:57:52 PM PDT 24 May 02 01:57:55 PM PDT 24 175200191 ps
T151 /workspace/coverage/default/49.rv_dm_alert_test.285886060 May 02 01:59:15 PM PDT 24 May 02 01:59:16 PM PDT 24 20087965 ps
T10 /workspace/coverage/default/1.rv_dm_cmderr_halt_resume.24370178 May 02 01:57:46 PM PDT 24 May 02 01:57:48 PM PDT 24 104929503 ps
T169 /workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.911067897 May 02 01:57:29 PM PDT 24 May 02 01:57:30 PM PDT 24 104297263 ps
T68 /workspace/coverage/default/15.rv_dm_stress_all.4010901155 May 02 01:58:39 PM PDT 24 May 02 01:58:46 PM PDT 24 4681646295 ps
T138 /workspace/coverage/default/1.rv_dm_mem_tl_access_halted.497334639 May 02 01:57:44 PM PDT 24 May 02 01:57:46 PM PDT 24 49462079 ps
T73 /workspace/coverage/default/8.rv_dm_sba_tl_access.3957065640 May 02 01:58:16 PM PDT 24 May 02 01:58:21 PM PDT 24 1677972841 ps
T24 /workspace/coverage/default/49.rv_dm_stress_all.560116627 May 02 01:59:16 PM PDT 24 May 02 01:59:44 PM PDT 24 27651982622 ps
T143 /workspace/coverage/default/12.rv_dm_alert_test.887543295 May 02 01:58:30 PM PDT 24 May 02 01:58:32 PM PDT 24 18453701 ps
T11 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.3924111031 May 02 01:57:25 PM PDT 24 May 02 01:57:27 PM PDT 24 361425019 ps
T170 /workspace/coverage/default/1.rv_dm_dataaddr_rw_access.1508467128 May 02 01:57:45 PM PDT 24 May 02 01:57:47 PM PDT 24 62170073 ps
T140 /workspace/coverage/default/38.rv_dm_alert_test.1626168892 May 02 01:59:04 PM PDT 24 May 02 01:59:06 PM PDT 24 26768728 ps
T137 /workspace/coverage/default/1.rv_dm_mem_tl_access_resuming.3787965903 May 02 01:57:47 PM PDT 24 May 02 01:57:49 PM PDT 24 137073840 ps
T147 /workspace/coverage/default/11.rv_dm_alert_test.565063023 May 02 01:58:24 PM PDT 24 May 02 01:58:26 PM PDT 24 62227420 ps
T171 /workspace/coverage/default/2.rv_dm_hart_unavail.3313821507 May 02 01:58:02 PM PDT 24 May 02 01:58:04 PM PDT 24 113438121 ps
T172 /workspace/coverage/default/8.rv_dm_alert_test.288604679 May 02 01:58:20 PM PDT 24 May 02 01:58:23 PM PDT 24 16620284 ps
T71 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.984210146 May 02 01:50:51 PM PDT 24 May 02 01:50:53 PM PDT 24 65180169 ps
T50 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.2442937581 May 02 01:51:21 PM PDT 24 May 02 01:51:25 PM PDT 24 1034313517 ps
T49 /workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2421632044 May 02 01:50:32 PM PDT 24 May 02 01:50:38 PM PDT 24 693738619 ps
T91 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.3061481518 May 02 01:50:31 PM PDT 24 May 02 01:50:33 PM PDT 24 531649776 ps
T173 /workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.1405016057 May 02 01:50:41 PM PDT 24 May 02 01:50:43 PM PDT 24 39948507 ps
T51 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.890974405 May 02 01:51:10 PM PDT 24 May 02 01:51:15 PM PDT 24 311672282 ps
T53 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.2836053796 May 02 01:50:30 PM PDT 24 May 02 01:50:38 PM PDT 24 739076854 ps
T46 /workspace/coverage/cover_reg_top/28.rv_dm_tap_fsm_rand_reset.1920573917 May 02 01:51:19 PM PDT 24 May 02 01:51:50 PM PDT 24 8612285645 ps
T174 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.3356409475 May 02 01:50:53 PM PDT 24 May 02 01:50:57 PM PDT 24 462317830 ps
T52 /workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.3152535440 May 02 01:50:44 PM PDT 24 May 02 01:50:49 PM PDT 24 298568490 ps
T47 /workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.2859181414 May 02 01:50:53 PM PDT 24 May 02 01:50:58 PM PDT 24 1653812180 ps
T175 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.3629561635 May 02 01:50:30 PM PDT 24 May 02 01:50:33 PM PDT 24 1565909419 ps
T83 /workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.3980894363 May 02 01:51:00 PM PDT 24 May 02 01:51:09 PM PDT 24 240664812 ps
T75 /workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.3898275422 May 02 01:51:07 PM PDT 24 May 02 01:51:13 PM PDT 24 3267086876 ps
T48 /workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.4032872783 May 02 01:50:51 PM PDT 24 May 02 01:51:08 PM PDT 24 676370648 ps
T84 /workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.2360894740 May 02 01:50:54 PM PDT 24 May 02 01:51:04 PM PDT 24 3679973953 ps
T67 /workspace/coverage/cover_reg_top/15.rv_dm_tap_fsm_rand_reset.2384334106 May 02 01:51:10 PM PDT 24 May 02 01:51:37 PM PDT 24 13399822877 ps
T78 /workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.1909051030 May 02 01:50:44 PM PDT 24 May 02 01:50:50 PM PDT 24 82027725 ps
T79 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.1521602669 May 02 01:51:01 PM PDT 24 May 02 01:51:10 PM PDT 24 4069885835 ps
T176 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.3531522596 May 02 01:51:09 PM PDT 24 May 02 01:51:12 PM PDT 24 469278876 ps
T85 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.3991712970 May 02 01:50:58 PM PDT 24 May 02 01:51:01 PM PDT 24 79487356 ps
T72 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3541335881 May 02 01:50:33 PM PDT 24 May 02 01:50:35 PM PDT 24 269232145 ps
T177 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2771742035 May 02 01:50:30 PM PDT 24 May 02 01:51:23 PM PDT 24 11387455111 ps
T86 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3692269237 May 02 01:50:46 PM PDT 24 May 02 01:50:50 PM PDT 24 444144958 ps
T80 /workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2637476330 May 02 01:51:09 PM PDT 24 May 02 01:51:17 PM PDT 24 4694314467 ps
T87 /workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.2029123925 May 02 01:51:19 PM PDT 24 May 02 01:51:22 PM PDT 24 253250939 ps
T178 /workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2540604246 May 02 01:50:44 PM PDT 24 May 02 01:50:46 PM PDT 24 28366134 ps
T179 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.1584001027 May 02 01:51:00 PM PDT 24 May 02 01:51:03 PM PDT 24 497398142 ps
T92 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2300035433 May 02 01:50:50 PM PDT 24 May 02 01:50:53 PM PDT 24 523510539 ps
T81 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.252829364 May 02 01:51:23 PM PDT 24 May 02 01:51:41 PM PDT 24 726635597 ps
T82 /workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.671427772 May 02 01:50:58 PM PDT 24 May 02 01:51:02 PM PDT 24 139472612 ps
T180 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.479577139 May 02 01:50:58 PM PDT 24 May 02 01:51:02 PM PDT 24 376421976 ps
T181 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.2656960311 May 02 01:50:49 PM PDT 24 May 02 01:50:53 PM PDT 24 1206836406 ps
T89 /workspace/coverage/cover_reg_top/37.rv_dm_tap_fsm_rand_reset.3718879679 May 02 01:51:29 PM PDT 24 May 02 01:51:42 PM PDT 24 11321618667 ps
T114 /workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2329675828 May 02 01:50:46 PM PDT 24 May 02 01:50:52 PM PDT 24 784228018 ps
T88 /workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.4149884943 May 02 01:50:43 PM PDT 24 May 02 01:50:46 PM PDT 24 218843838 ps
T110 /workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.514539727 May 02 01:51:17 PM PDT 24 May 02 01:51:21 PM PDT 24 521698502 ps
T95 /workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.2638189445 May 02 01:50:59 PM PDT 24 May 02 01:51:03 PM PDT 24 70239636 ps
T122 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.2160208672 May 02 01:51:20 PM PDT 24 May 02 01:51:37 PM PDT 24 984762567 ps
T136 /workspace/coverage/cover_reg_top/29.rv_dm_tap_fsm_rand_reset.2563260591 May 02 01:51:21 PM PDT 24 May 02 01:51:38 PM PDT 24 6799804554 ps
T96 /workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.923539725 May 02 01:50:36 PM PDT 24 May 02 01:50:43 PM PDT 24 157116226 ps
T115 /workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2125961131 May 02 01:50:45 PM PDT 24 May 02 01:50:49 PM PDT 24 257469155 ps
T103 /workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.3961695140 May 02 01:50:32 PM PDT 24 May 02 01:51:06 PM PDT 24 2554891112 ps
T148 /workspace/coverage/cover_reg_top/12.rv_dm_tap_fsm_rand_reset.549814064 May 02 01:51:03 PM PDT 24 May 02 01:51:33 PM PDT 24 17674503308 ps
T111 /workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.707760685 May 02 01:50:55 PM PDT 24 May 02 01:51:00 PM PDT 24 786037209 ps
T74 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.4004832733 May 02 01:50:43 PM PDT 24 May 02 01:50:45 PM PDT 24 135896900 ps
T182 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.2059933463 May 02 01:51:00 PM PDT 24 May 02 01:51:04 PM PDT 24 725075060 ps
T116 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.2020249876 May 02 01:51:01 PM PDT 24 May 02 01:51:22 PM PDT 24 3105563582 ps
T183 /workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.245420539 May 02 01:51:20 PM PDT 24 May 02 01:51:25 PM PDT 24 190760255 ps
T184 /workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.37198232 May 02 01:51:01 PM PDT 24 May 02 01:51:07 PM PDT 24 2490927156 ps
T185 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.2873945301 May 02 01:51:01 PM PDT 24 May 02 01:51:04 PM PDT 24 134736954 ps
T112 /workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.338503489 May 02 01:51:09 PM PDT 24 May 02 01:51:18 PM PDT 24 521136244 ps
T117 /workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.1532434174 May 02 01:50:30 PM PDT 24 May 02 01:50:35 PM PDT 24 977128657 ps
T186 /workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.2678841268 May 02 01:50:36 PM PDT 24 May 02 01:50:37 PM PDT 24 85508304 ps
T104 /workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.197472126 May 02 01:51:10 PM PDT 24 May 02 01:51:13 PM PDT 24 28798644 ps
T187 /workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.2223233907 May 02 01:51:11 PM PDT 24 May 02 01:51:19 PM PDT 24 276501541 ps
T93 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.4034464534 May 02 01:50:45 PM PDT 24 May 02 01:50:52 PM PDT 24 1832719858 ps
T188 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.4243801780 May 02 01:50:51 PM PDT 24 May 02 01:50:53 PM PDT 24 90706131 ps
T105 /workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.1520096941 May 02 01:50:47 PM PDT 24 May 02 01:51:56 PM PDT 24 1154296147 ps
T189 /workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.2789412913 May 02 01:50:48 PM PDT 24 May 02 01:50:51 PM PDT 24 104398940 ps
T97 /workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.2791167916 May 02 01:51:19 PM PDT 24 May 02 01:51:28 PM PDT 24 422297287 ps
T190 /workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.762082472 May 02 01:51:00 PM PDT 24 May 02 01:51:10 PM PDT 24 2883885253 ps
T135 /workspace/coverage/cover_reg_top/19.rv_dm_tap_fsm_rand_reset.787587515 May 02 01:51:20 PM PDT 24 May 02 01:51:44 PM PDT 24 6398266122 ps
T191 /workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.3673589759 May 02 01:50:45 PM PDT 24 May 02 01:50:46 PM PDT 24 137878030 ps
T192 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3422216904 May 02 01:50:50 PM PDT 24 May 02 01:50:52 PM PDT 24 27806499 ps
T193 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.3567697516 May 02 01:50:53 PM PDT 24 May 02 01:50:55 PM PDT 24 678482654 ps
T194 /workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.62414307 May 02 01:50:43 PM PDT 24 May 02 01:50:48 PM PDT 24 58327161 ps
T195 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1280223337 May 02 01:50:50 PM PDT 24 May 02 01:50:54 PM PDT 24 5116801269 ps
T196 /workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.3920573482 May 02 01:50:45 PM PDT 24 May 02 01:50:47 PM PDT 24 16169197 ps
T121 /workspace/coverage/cover_reg_top/23.rv_dm_tap_fsm_rand_reset.2840181840 May 02 01:51:19 PM PDT 24 May 02 01:51:36 PM PDT 24 16557259410 ps
T197 /workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.3346803601 May 02 01:50:31 PM PDT 24 May 02 01:50:32 PM PDT 24 25832207 ps
T106 /workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.1605023483 May 02 01:50:29 PM PDT 24 May 02 01:50:32 PM PDT 24 189764241 ps
T128 /workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.1521589827 May 02 01:50:59 PM PDT 24 May 02 01:51:21 PM PDT 24 6508848248 ps
T198 /workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.3878833826 May 02 01:50:36 PM PDT 24 May 02 01:50:37 PM PDT 24 20006180 ps
T199 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1041255582 May 02 01:50:43 PM PDT 24 May 02 01:50:45 PM PDT 24 226294257 ps
T200 /workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.4193957786 May 02 01:50:51 PM PDT 24 May 02 01:50:58 PM PDT 24 1296839346 ps
T201 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.2492953161 May 02 01:51:01 PM PDT 24 May 02 01:51:04 PM PDT 24 89587996 ps
T202 /workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.561572419 May 02 01:51:07 PM PDT 24 May 02 01:51:11 PM PDT 24 1071055134 ps
T203 /workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.1421028395 May 02 01:51:10 PM PDT 24 May 02 01:51:13 PM PDT 24 147025227 ps
T204 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.115287986 May 02 01:50:33 PM PDT 24 May 02 01:50:35 PM PDT 24 180757295 ps
T69 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.964324075 May 02 01:50:44 PM PDT 24 May 02 01:50:46 PM PDT 24 162373059 ps
T205 /workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.152225085 May 02 01:50:33 PM PDT 24 May 02 01:50:35 PM PDT 24 31307465 ps
T206 /workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.2924209187 May 02 01:51:19 PM PDT 24 May 02 01:51:23 PM PDT 24 56119083 ps
T107 /workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.2404337480 May 02 01:50:41 PM PDT 24 May 02 01:50:44 PM PDT 24 50801507 ps
T207 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.3263372266 May 02 01:50:42 PM PDT 24 May 02 01:50:47 PM PDT 24 1113167458 ps
T208 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.3780135769 May 02 01:50:25 PM PDT 24 May 02 01:50:27 PM PDT 24 47298959 ps
T209 /workspace/coverage/cover_reg_top/24.rv_dm_tap_fsm_rand_reset.2909901033 May 02 01:51:21 PM PDT 24 May 02 01:51:56 PM PDT 24 14139623572 ps
T134 /workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.1836975308 May 02 01:51:03 PM PDT 24 May 02 01:51:15 PM PDT 24 1879434209 ps
T210 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.534292530 May 02 01:50:43 PM PDT 24 May 02 01:51:19 PM PDT 24 15858700644 ps
T126 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.3116560067 May 02 01:51:08 PM PDT 24 May 02 01:51:28 PM PDT 24 1219200078 ps
T211 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.3802616352 May 02 01:50:50 PM PDT 24 May 02 01:50:52 PM PDT 24 53650226 ps
T108 /workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.1425524795 May 02 01:50:54 PM PDT 24 May 02 01:50:58 PM PDT 24 39948705 ps
T124 /workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.1218708398 May 02 01:50:50 PM PDT 24 May 02 01:50:54 PM PDT 24 510328466 ps
T212 /workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.4233219104 May 02 01:51:12 PM PDT 24 May 02 01:51:18 PM PDT 24 2183617693 ps
T125 /workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.4124870354 May 02 01:51:11 PM PDT 24 May 02 01:51:19 PM PDT 24 476811569 ps
T213 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.740971209 May 02 01:50:31 PM PDT 24 May 02 01:50:35 PM PDT 24 1016928023 ps
T131 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.3507895493 May 02 01:50:48 PM PDT 24 May 02 01:51:06 PM PDT 24 2420701308 ps
T214 /workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.1938398288 May 02 01:51:10 PM PDT 24 May 02 01:51:15 PM PDT 24 217483079 ps
T215 /workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.1945317759 May 02 01:51:09 PM PDT 24 May 02 01:51:15 PM PDT 24 1088313060 ps
T216 /workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.1063197909 May 02 01:51:22 PM PDT 24 May 02 01:51:38 PM PDT 24 13659013418 ps
T217 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.1612527181 May 02 01:50:46 PM PDT 24 May 02 01:50:48 PM PDT 24 603306993 ps
T218 /workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.949637766 May 02 01:51:10 PM PDT 24 May 02 01:51:13 PM PDT 24 90347249 ps
T219 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.209911091 May 02 01:51:09 PM PDT 24 May 02 01:51:11 PM PDT 24 44548535 ps
T98 /workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.4122380800 May 02 01:50:44 PM PDT 24 May 02 01:52:08 PM PDT 24 28455411950 ps
T220 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.2833423250 May 02 01:50:43 PM PDT 24 May 02 01:50:44 PM PDT 24 72400420 ps
T221 /workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.241056709 May 02 01:50:57 PM PDT 24 May 02 01:51:05 PM PDT 24 2946989194 ps
T222 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.2548523782 May 02 01:51:11 PM PDT 24 May 02 01:51:13 PM PDT 24 26641361 ps
T223 /workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.39432045 May 02 01:50:50 PM PDT 24 May 02 01:50:53 PM PDT 24 64297860 ps
T224 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.4185679439 May 02 01:50:30 PM PDT 24 May 02 01:50:33 PM PDT 24 261702957 ps
T225 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.3531694987 May 02 01:50:33 PM PDT 24 May 02 01:50:35 PM PDT 24 131328300 ps
T226 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.3014161665 May 02 01:50:50 PM PDT 24 May 02 01:51:15 PM PDT 24 5405586188 ps
T227 /workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.1738795548 May 02 01:50:58 PM PDT 24 May 02 01:51:03 PM PDT 24 288718670 ps
T228 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.392965945 May 02 01:51:01 PM PDT 24 May 02 01:51:04 PM PDT 24 61470062 ps
T229 /workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.3619350498 May 02 01:51:18 PM PDT 24 May 02 01:51:23 PM PDT 24 56039068 ps
T230 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.2335903556 May 02 01:50:44 PM PDT 24 May 02 01:50:46 PM PDT 24 148525986 ps
T231 /workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.1457385002 May 02 01:50:52 PM PDT 24 May 02 01:50:59 PM PDT 24 403703128 ps
T232 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.1750709232 May 02 01:51:18 PM PDT 24 May 02 01:51:20 PM PDT 24 54799178 ps
T233 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.4187603270 May 02 01:50:59 PM PDT 24 May 02 01:51:04 PM PDT 24 299865214 ps
T109 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.2732790277 May 02 01:50:30 PM PDT 24 May 02 01:51:44 PM PDT 24 11365134306 ps
T234 /workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.1557386095 May 02 01:51:18 PM PDT 24 May 02 01:51:21 PM PDT 24 271244234 ps
T235 /workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.861626045 May 02 01:51:00 PM PDT 24 May 02 01:51:07 PM PDT 24 225749824 ps
T236 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.3648875598 May 02 01:50:45 PM PDT 24 May 02 01:50:47 PM PDT 24 41935013 ps
T132 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3746330513 May 02 01:51:08 PM PDT 24 May 02 01:51:19 PM PDT 24 1319649749 ps
T237 /workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.3546939076 May 02 01:51:01 PM PDT 24 May 02 01:51:06 PM PDT 24 70824940 ps
T238 /workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1642720340 May 02 01:50:45 PM PDT 24 May 02 01:51:19 PM PDT 24 1747679236 ps
T239 /workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.1479653121 May 02 01:50:52 PM PDT 24 May 02 01:51:02 PM PDT 24 3776841444 ps
T240 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.3826724706 May 02 01:50:42 PM PDT 24 May 02 01:50:43 PM PDT 24 132259560 ps
T130 /workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2237645079 May 02 01:50:30 PM PDT 24 May 02 01:50:41 PM PDT 24 7585574698 ps
T241 /workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.605032694 May 02 01:50:52 PM PDT 24 May 02 01:50:55 PM PDT 24 29166428 ps
T242 /workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.1424453288 May 02 01:50:59 PM PDT 24 May 02 01:51:13 PM PDT 24 11421847719 ps
T243 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.3237575170 May 02 01:50:51 PM PDT 24 May 02 01:50:54 PM PDT 24 2065949637 ps
T99 /workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.4014156198 May 02 01:50:59 PM PDT 24 May 02 01:51:03 PM PDT 24 109961949 ps
T244 /workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.4053335433 May 02 01:51:00 PM PDT 24 May 02 01:51:10 PM PDT 24 3109358587 ps
T245 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2139846400 May 02 01:50:24 PM PDT 24 May 02 01:51:46 PM PDT 24 8572173370 ps
T246 /workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.3307214231 May 02 01:51:23 PM PDT 24 May 02 01:51:29 PM PDT 24 824325818 ps
T247 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.936579812 May 02 01:50:52 PM PDT 24 May 02 01:50:54 PM PDT 24 255092171 ps
T248 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.3563527354 May 02 01:50:41 PM PDT 24 May 02 01:51:21 PM PDT 24 12410466417 ps
T249 /workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.3093876748 May 02 01:50:54 PM PDT 24 May 02 01:50:56 PM PDT 24 54136575 ps
T250 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.3712328340 May 02 01:50:50 PM PDT 24 May 02 01:50:54 PM PDT 24 144694218 ps
T251 /workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.1683327064 May 02 01:50:46 PM PDT 24 May 02 01:50:50 PM PDT 24 91346735 ps
T252 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.4271675756 May 02 01:51:19 PM PDT 24 May 02 01:51:25 PM PDT 24 2263494025 ps
T253 /workspace/coverage/cover_reg_top/31.rv_dm_tap_fsm_rand_reset.1355618654 May 02 01:51:20 PM PDT 24 May 02 01:51:45 PM PDT 24 24250904688 ps
T254 /workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.1197878308 May 02 01:50:54 PM PDT 24 May 02 01:50:58 PM PDT 24 63628617 ps
T255 /workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.1041680035 May 02 01:50:48 PM PDT 24 May 02 01:50:51 PM PDT 24 300017716 ps
T256 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.1281923564 May 02 01:50:45 PM PDT 24 May 02 01:51:05 PM PDT 24 1010586319 ps
T257 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.967768851 May 02 01:51:08 PM PDT 24 May 02 01:51:09 PM PDT 24 73734309 ps
T258 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.4192961052 May 02 01:50:30 PM PDT 24 May 02 01:50:32 PM PDT 24 1260315439 ps
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